Index: llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
===================================================================
--- llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -1733,7 +1733,8 @@
                     SPIRV::Decoration::SaturatedConversion, {});
   if (Builtin->IsRounded)
     buildOpDecorate(Call->ReturnRegister, MIRBuilder,
-                    SPIRV::Decoration::FPRoundingMode, {Builtin->RoundingMode});
+                    SPIRV::Decoration::FPRoundingMode,
+                    {(unsigned)Builtin->RoundingMode});
 
   unsigned Opcode = SPIRV::OpNop;
   if (GR->isScalarOrVectorOfType(Call->Arguments[0], SPIRV::OpTypeInt)) {
Index: llvm/lib/Target/SPIRV/SPIRVUtils.cpp
===================================================================
--- llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -208,6 +208,7 @@
   case AtomicOrdering::NotAtomic:
     return SPIRV::MemorySemantics::None;
   }
+  llvm_unreachable(nullptr);
 }
 
 MachineInstr *getDefInstrMaybeConstant(Register &ConstReg,