diff --git a/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir b/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir @@ -0,0 +1,123 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -start-before=if-converter -stop-after=if-converter -o - %s \ +# RUN: | FileCheck %s +--- | + ; ModuleID = 'reduced.ll' + source_filename = "reduced.ll" + target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" + target triple = "armv4t-unknown-linux-gnueabi" + + define void @tusb1210_chg_det_work(i1 %tobool.not) { + entry: + br i1 %tobool.not, label %if.else, label %if.then + + if.then: ; preds = %entry + callbr void asm sideeffect ".word b, ${1:l}, ${0:c}\0A\09", "i,!i"(ptr null) + to label %if.end [label %if.end.sink.split] + + if.else: ; preds = %entry + callbr void asm sideeffect ".word b, ${1:l}, ${0:c}\0A\09", "i,!i"(ptr null) + to label %if.end [label %if.end.sink.split] + + if.end.sink.split: ; preds = %if.else, %if.then + %.sink = phi i32 [ 1, %if.then ], [ 0, %if.else ] + store i32 %.sink, ptr null, align 4 + br label %if.end + + if.end: ; preds = %if.end.sink.split, %if.else, %if.then + ret void + } + +... +--- +name: tusb1210_chg_det_work +alignment: 4 +exposesReturnsTwice: false +legalized: false +regBankSelected: false +selected: false +failedISel: false +tracksRegLiveness: true +hasWinCFI: false +callsEHReturn: false +callsUnwindInit: false +hasEHCatchret: false +hasEHScopes: false +hasEHFunclets: false +debugInstrRef: false +failsVerification: false +tracksDebugUserValues: true +registers: [] +liveins: + - { reg: '$r0', virtual-reg: '' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 1 + adjustsStack: false + hasCalls: false + stackProtector: '' + functionContext: '' + maxCallFrameSize: 0 + cvBytesOfCalleeSavedRegisters: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false + hasTailCall: false + localFrameSize: 0 + savePoint: '' + restorePoint: '' +fixedStack: [] +stack: [] +callSites: [] +debugValueSubstitutions: [] +constants: [] +machineFunctionInfo: {} +body: | + ; CHECK-LABEL: name: tusb1210_chg_det_work + ; CHECK: bb.0.entry: + ; CHECK-NEXT: successors: + ; CHECK-NEXT: liveins: $r0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: TSTri killed renamable $r0, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr + ; CHECK-NEXT: renamable $r0 = MOVi 0, 1 /* CC::ne */, $cpsr, $noreg + ; CHECK-NEXT: dead renamable $r0 = MOVi 1, 0 /* CC::eq */, killed $cpsr, $noreg, implicit killed $r0 + ; FIXME: %bb.-1 is a dangling reference!!! + ; CHECK-NEXT: INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 0, 13 /* imm */, %bb.-1 + ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg + bb.0.entry: + successors: %bb.4(0x40000000), %bb.1(0x40000000) + liveins: $r0 + + TSTri killed renamable $r0, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr + Bcc %bb.4, 1 /* CC::ne */, killed $cpsr + + bb.1.if.then: + successors: %bb.3(0x80000000), %bb.2(0x00000000) + + renamable $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg + INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 0, 13 /* imm */, %bb.2 + B %bb.3 + + bb.2.if.end.sink.split (machine-block-address-taken, inlineasm-br-indirect-target): + successors: %bb.3(0x80000000) + liveins: $r0 + + renamable $r1 = MOVi 0, 14 /* CC::al */, $noreg, $noreg + STRi12 killed renamable $r0, killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (store (s32) into `ptr null`) + + bb.3.if.end: + BX_RET 14 /* CC::al */, $noreg + + bb.4.if.else: + successors: %bb.3(0x80000000), %bb.2(0x00000000) + + renamable $r0 = MOVi 0, 14 /* CC::al */, $noreg, $noreg + INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 0, 13 /* imm */, %bb.2 + B %bb.3 + +...