diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -515,6 +515,16 @@
 /// Insert BoundaryAlignFragment before instructions to align branches.
 void X86AsmBackend::emitInstructionBegin(MCObjectStreamer &OS,
                                          const MCInst &Inst, const MCSubtargetInfo &STI) {
+  if ((Inst.getOpcode() == X86::PREFETCHIT0 ||
+       Inst.getOpcode() == X86::PREFETCHIT1) &&
+      !isRIPRelative(Inst, *MCII)) {
+    OS.getAssembler().getContext().reportWarning(
+        Inst.getLoc(),
+        Twine((Inst.getOpcode() == X86::PREFETCHIT0 ? "prefetchit0"
+                                                    : "prefetchit1")) +
+            " is nop without RIP-relative memory operand");
+  }
+
   CanPadInst = canPadInst(Inst, OS);
 
   if (!canPadBranches(OS))
diff --git a/llvm/test/CodeGen/X86/prefetchi-warning.ll b/llvm/test/CodeGen/X86/prefetchi-warning.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/X86/prefetchi-warning.ll
@@ -0,0 +1,18 @@
+; -filetype=obj as the warning is from the assembler
+; RUN: llc -filetype=obj -mtriple=x86_64-- -mattr=+prefetchi < %s 2>&1 | FileCheck %s
+
+;CHECK: prefetchit1 is nop without RIP-relative memory operand
+define dso_local void @invalid_ptrt1(ptr %ptr) nounwind  {
+entry:
+  tail call void @llvm.prefetch(ptr %ptr, i32 0, i32 2, i32 0)
+  ret void
+}
+
+;CHECK: prefetchit0 is nop without RIP-relative memory operand
+define dso_local void @invalid_ptrt0(ptr %ptr) nounwind  {
+entry:
+  tail call void @llvm.prefetch(ptr %ptr, i32 0, i32 3, i32 0)
+  ret void
+}
+
+declare void @llvm.prefetch(ptr, i32, i32, i32) nounwind