diff --git a/llvm/test/CodeGen/RISCV/regcoal-constreg.mir b/llvm/test/CodeGen/RISCV/regcoal-constreg.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/regcoal-constreg.mir
@@ -0,0 +1,32 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=simple-register-coalescing %s -o - | FileCheck %s
+---
+name: func
+registers:
+  - { id: 0, class: gpr }
+body: |
+  ; CHECK-LABEL: name: func
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr = COPY $x0
+  ; CHECK-NEXT:   BEQ $x1, $x2, %bb.2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr = COPY $x0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   PseudoRET implicit [[COPY1]]
+  bb.0:
+    %0 = COPY $x0
+    BEQ $x1, $x2, %bb.2
+
+  bb.1:
+    %0 = COPY $x0
+
+  bb.2:
+    PseudoRET implicit %0
+
+...