diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -223,7 +223,7 @@
     // Look for literal addressing mode (see C1-143 ARM DDI 0487B.a)
     const MCInstrDesc &MCII = Info->get(Inst.getOpcode());
     for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I)
-      if (MCII.OpInfo[I].OperandType == MCOI::OPERAND_PCREL)
+      if (MCII.operands()[I].OperandType == MCOI::OPERAND_PCREL)
         return true;
 
     return false;
@@ -257,7 +257,7 @@
     // Literal addressing mode
     const MCInstrDesc &MCII = Info->get(Inst.getOpcode());
     for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) {
-      if (MCII.OpInfo[I].OperandType != MCOI::OPERAND_PCREL)
+      if (MCII.operands()[I].OperandType != MCOI::OPERAND_PCREL)
         continue;
 
       if (!Inst.getOperand(I).isImm()) {
@@ -302,7 +302,7 @@
     }
     const MCInstrDesc &MCII = Info->get(Inst.getOpcode());
     for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) {
-      if (MCII.OpInfo[I].OperandType == MCOI::OPERAND_PCREL)
+      if (MCII.operands()[I].OperandType == MCOI::OPERAND_PCREL)
         break;
       ++OI;
     }
diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
--- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -1681,7 +1681,7 @@
   bool requiresAlignedAddress(const MCInst &Inst) const override {
     const MCInstrDesc &Desc = Info->get(Inst.getOpcode());
     for (unsigned int I = 0; I < Desc.getNumOperands(); ++I) {
-      const MCOperandInfo &Op = Desc.OpInfo[I];
+      const MCOperandInfo &Op = Desc.operands()[I];
       if (Op.OperandType != MCOI::OPERAND_REGISTER)
         continue;
       if (Op.RegClass == X86::VR128RegClassID)