diff --git a/llvm/include/llvm/MC/MCInstrInfo.h b/llvm/include/llvm/MC/MCInstrInfo.h --- a/llvm/include/llvm/MC/MCInstrInfo.h +++ b/llvm/include/llvm/MC/MCInstrInfo.h @@ -62,7 +62,7 @@ /// specified instruction opcode. const MCInstrDesc &get(unsigned Opcode) const { assert(Opcode < NumOpcodes && "Invalid opcode!"); - return Desc[Opcode]; + return Desc[NumOpcodes - 1 - Opcode]; } /// Returns the name for the instructions with the given opcode. diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2503,7 +2503,8 @@ RegNum = 0; } else { unsigned NextOpIndex = Inst.getNumOperands(); - const MCInstrDesc &MCID = ARMInsts[Inst.getOpcode()]; + const MCInstrDesc &MCID = + ARMInsts[ARM::INSTRUCTION_LIST_END - 1 - Inst.getOpcode()]; int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO); assert(TiedOp >= 0 && "Inactive register in vpred_r is not tied to an output!"); diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp --- a/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -923,20 +923,19 @@ Records.startTimer("Emit operand info"); EmitOperandInfo(OS, OperandInfoIDs); - // Emit all of the MCInstrDesc records in their ENUM ordering. - // + // Emit all of the MCInstrDesc records in reverse ENUM ordering. Records.startTimer("Emit InstrDesc records"); OS << "\nextern const MCInstrDesc " << TargetName << "Insts[] = {\n"; ArrayRef NumberedInstructions = Target.getInstructionsByEnumValue(); SequenceToOffsetTable InstrNames; - unsigned Num = 0; - for (const CodeGenInstruction *Inst : NumberedInstructions) { + unsigned Num = NumberedInstructions.size(); + for (const CodeGenInstruction *Inst : llvm::reverse(NumberedInstructions)) { // Keep a list of the instruction names. InstrNames.add(std::string(Inst->TheDef->getName())); // Emit the record into the table. - emitRecord(*Inst, Num++, InstrInfo, EmittedLists, OperandInfoIDs, OS); + emitRecord(*Inst, --Num, InstrInfo, EmittedLists, OperandInfoIDs, OS); } OS << "};\n\n";