diff --git a/clang/include/clang/Basic/TargetBuiltins.h b/clang/include/clang/Basic/TargetBuiltins.h --- a/clang/include/clang/Basic/TargetBuiltins.h +++ b/clang/include/clang/Basic/TargetBuiltins.h @@ -288,6 +288,7 @@ bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; } bool isGatherPrefetch() const { return Flags & IsGatherPrefetch; } bool isReverseUSDOT() const { return Flags & ReverseUSDOT; } + bool isReverseMergeAnyBinOp() const { return Flags & ReverseMergeAnyBinOp; } bool isUndef() const { return Flags & IsUndef; } bool isTupleCreate() const { return Flags & IsTupleCreate; } bool isTupleGet() const { return Flags & IsTupleGet; } diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -205,6 +205,7 @@ def IsTupleCreate : FlagType<0x100000000>; def IsTupleGet : FlagType<0x200000000>; def IsTupleSet : FlagType<0x400000000>; +def ReverseMergeAnyBinOp : FlagType<0x800000000>; // e.g. Implement SUBR_X using SUB_X. // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h class ImmCheckType { @@ -758,32 +759,32 @@ //------------------------------------------------------------------------------ -multiclass SInstZPZZ flags=[]> { - def _M : SInst; - def _X : SInst; - def _Z : SInst; - - def _N_M : SInst; - def _N_X : SInst; - def _N_Z : SInst; -} - -defm SVABD_S : SInstZPZZ<"svabd", "csil", "aarch64_sve_sabd">; -defm SVABD_U : SInstZPZZ<"svabd", "UcUsUiUl", "aarch64_sve_uabd">; -defm SVADD : SInstZPZZ<"svadd", "csilUcUsUiUl", "aarch64_sve_add">; -defm SVDIV_S : SInstZPZZ<"svdiv", "il", "aarch64_sve_sdiv">; -defm SVDIV_U : SInstZPZZ<"svdiv", "UiUl", "aarch64_sve_udiv">; -defm SVDIVR_S : SInstZPZZ<"svdivr", "il", "aarch64_sve_sdivr">; -defm SVDIVR_U : SInstZPZZ<"svdivr", "UiUl", "aarch64_sve_udivr">; -defm SVMAX_S : SInstZPZZ<"svmax", "csil", "aarch64_sve_smax">; -defm SVMAX_U : SInstZPZZ<"svmax", "UcUsUiUl", "aarch64_sve_umax">; -defm SVMIN_S : SInstZPZZ<"svmin", "csil", "aarch64_sve_smin">; -defm SVMIN_U : SInstZPZZ<"svmin", "UcUsUiUl", "aarch64_sve_umin">; -defm SVMUL : SInstZPZZ<"svmul", "csilUcUsUiUl", "aarch64_sve_mul">; -defm SVMULH_S : SInstZPZZ<"svmulh", "csil", "aarch64_sve_smulh">; -defm SVMULH_U : SInstZPZZ<"svmulh", "UcUsUiUl", "aarch64_sve_umulh">; -defm SVSUB : SInstZPZZ<"svsub", "csilUcUsUiUl", "aarch64_sve_sub">; -defm SVSUBR : SInstZPZZ<"svsubr", "csilUcUsUiUl", "aarch64_sve_subr">; +multiclass SInstZPZZ flags=[]> { + def _M : SInst; + def _X : SInst; + def _Z : SInst; + + def _N_M : SInst; + def _N_X : SInst; + def _N_Z : SInst; +} + +defm SVABD_S : SInstZPZZ<"svabd", "csil", "aarch64_sve_sabd", "aarch64_sve_sabd_u">; +defm SVABD_U : SInstZPZZ<"svabd", "UcUsUiUl", "aarch64_sve_uabd", "aarch64_sve_uabd_u">; +defm SVADD : SInstZPZZ<"svadd", "csilUcUsUiUl", "aarch64_sve_add", "aarch64_sve_add_u">; +defm SVDIV_S : SInstZPZZ<"svdiv", "il", "aarch64_sve_sdiv", "aarch64_sve_sdiv_u">; +defm SVDIV_U : SInstZPZZ<"svdiv", "UiUl", "aarch64_sve_udiv", "aarch64_sve_udiv_u">; +defm SVDIVR_S : SInstZPZZ<"svdivr", "il", "aarch64_sve_sdivr", "aarch64_sve_sdiv_u", [ReverseMergeAnyBinOp]>; +defm SVDIVR_U : SInstZPZZ<"svdivr", "UiUl", "aarch64_sve_udivr", "aarch64_sve_udiv_u", [ReverseMergeAnyBinOp]>; +defm SVMAX_S : SInstZPZZ<"svmax", "csil", "aarch64_sve_smax", "aarch64_sve_smax_u">; +defm SVMAX_U : SInstZPZZ<"svmax", "UcUsUiUl", "aarch64_sve_umax", "aarch64_sve_umax_u">; +defm SVMIN_S : SInstZPZZ<"svmin", "csil", "aarch64_sve_smin", "aarch64_sve_smin_u">; +defm SVMIN_U : SInstZPZZ<"svmin", "UcUsUiUl", "aarch64_sve_umin", "aarch64_sve_umin_u">; +defm SVMUL : SInstZPZZ<"svmul", "csilUcUsUiUl", "aarch64_sve_mul", "aarch64_sve_mul_u">; +defm SVMULH_S : SInstZPZZ<"svmulh", "csil", "aarch64_sve_smulh", "aarch64_sve_smulh_u">; +defm SVMULH_U : SInstZPZZ<"svmulh", "UcUsUiUl", "aarch64_sve_umulh", "aarch64_sve_umulh_u">; +defm SVSUB : SInstZPZZ<"svsub", "csilUcUsUiUl", "aarch64_sve_sub", "aarch64_sve_sub_u">; +defm SVSUBR : SInstZPZZ<"svsubr", "csilUcUsUiUl", "aarch64_sve_subr", "aarch64_sve_sub_u", [ReverseMergeAnyBinOp]>; //------------------------------------------------------------------------------ @@ -824,24 +825,23 @@ //////////////////////////////////////////////////////////////////////////////// // Logical operations -defm SVAND : SInstZPZZ<"svand", "csilUcUsUiUl", "aarch64_sve_and">; -defm SVBIC : SInstZPZZ<"svbic", "csilUcUsUiUl", "aarch64_sve_bic">; -defm SVEOR : SInstZPZZ<"sveor", "csilUcUsUiUl", "aarch64_sve_eor">; -defm SVORR : SInstZPZZ<"svorr", "csilUcUsUiUl", "aarch64_sve_orr">; +defm SVAND : SInstZPZZ<"svand", "csilUcUsUiUl", "aarch64_sve_and", "aarch64_sve_and">; +defm SVBIC : SInstZPZZ<"svbic", "csilUcUsUiUl", "aarch64_sve_bic", "aarch64_sve_bic">; +defm SVEOR : SInstZPZZ<"sveor", "csilUcUsUiUl", "aarch64_sve_eor", "aarch64_sve_eor">; +defm SVORR : SInstZPZZ<"svorr", "csilUcUsUiUl", "aarch64_sve_orr", "aarch64_sve_orr">; defm SVCNOT : SInstZPZ<"svcnot", "csilUcUsUiUl", "aarch64_sve_cnot">; defm SVNOT : SInstZPZ<"svnot", "csilUcUsUiUl", "aarch64_sve_not">; //////////////////////////////////////////////////////////////////////////////// // Shifts - multiclass SInst_SHIFT { def _M : SInst; - def _X : SInst; + def _X : SInst; def _Z : SInst; def _N_M : SInst; - def _N_X : SInst; + def _N_X : SInst; def _N_Z : SInst; def _WIDE_M : SInst; @@ -979,18 +979,18 @@ defm SVABS_F : SInstZPZ<"svabs", "hfd", "aarch64_sve_fabs">; defm SVNEG_F : SInstZPZ<"svneg", "hfd", "aarch64_sve_fneg">; -defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd">; -defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd">; -defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv">; -defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr">; -defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax">; -defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm">; -defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin">; -defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm">; -defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul">; -defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx">; -defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub">; -defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr">; +defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd", "aarch64_sve_fabd">; +defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd", "aarch64_sve_fadd">; +defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv", "aarch64_sve_fdiv">; +defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr", "aarch64_sve_fdivr">; +defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax", "aarch64_sve_fmax">; +defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm", "aarch64_sve_fmaxnm">; +defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin", "aarch64_sve_fmin">; +defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm", "aarch64_sve_fminnm">; +defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul", "aarch64_sve_fmul">; +defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx", "aarch64_sve_fmulx">; +defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub", "aarch64_sve_fsub">; +defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr", "aarch64_sve_fsubr">; defm SVRECPX : SInstZPZ<"svrecpx", "hfd", "aarch64_sve_frecpx">; defm SVRINTA : SInstZPZ<"svrinta", "hfd", "aarch64_sve_frinta">; @@ -1492,21 +1492,21 @@ // SVE2 - Uniform DSP operations let TargetGuard = "sve2" in { -defm SVQADD_S : SInstZPZZ<"svqadd", "csli", "aarch64_sve_sqadd">; -defm SVQADD_U : SInstZPZZ<"svqadd", "UcUsUiUl", "aarch64_sve_uqadd">; -defm SVHADD_S : SInstZPZZ<"svhadd", "csli", "aarch64_sve_shadd">; -defm SVHADD_U : SInstZPZZ<"svhadd", "UcUsUiUl", "aarch64_sve_uhadd">; -defm SVRHADD_S : SInstZPZZ<"svrhadd", "csli", "aarch64_sve_srhadd">; -defm SVRHADD_U : SInstZPZZ<"svrhadd", "UcUsUiUl", "aarch64_sve_urhadd">; - -defm SVQSUB_S : SInstZPZZ<"svqsub", "csli", "aarch64_sve_sqsub">; -defm SVQSUB_U : SInstZPZZ<"svqsub", "UcUsUiUl", "aarch64_sve_uqsub">; -defm SVQSUBR_S : SInstZPZZ<"svqsubr", "csli", "aarch64_sve_sqsubr">; -defm SVQSUBR_U : SInstZPZZ<"svqsubr", "UcUsUiUl", "aarch64_sve_uqsubr">; -defm SVHSUB_S : SInstZPZZ<"svhsub", "csli", "aarch64_sve_shsub">; -defm SVHSUB_U : SInstZPZZ<"svhsub", "UcUsUiUl", "aarch64_sve_uhsub">; -defm SVHSUBR_S : SInstZPZZ<"svhsubr", "csli", "aarch64_sve_shsubr">; -defm SVHSUBR_U : SInstZPZZ<"svhsubr", "UcUsUiUl", "aarch64_sve_uhsubr">; +defm SVQADD_S : SInstZPZZ<"svqadd", "csli", "aarch64_sve_sqadd", "aarch64_sve_sqadd">; +defm SVQADD_U : SInstZPZZ<"svqadd", "UcUsUiUl", "aarch64_sve_uqadd", "aarch64_sve_uqadd">; +defm SVHADD_S : SInstZPZZ<"svhadd", "csli", "aarch64_sve_shadd", "aarch64_sve_shadd">; +defm SVHADD_U : SInstZPZZ<"svhadd", "UcUsUiUl", "aarch64_sve_uhadd", "aarch64_sve_uhadd">; +defm SVRHADD_S : SInstZPZZ<"svrhadd", "csli", "aarch64_sve_srhadd", "aarch64_sve_srhadd">; +defm SVRHADD_U : SInstZPZZ<"svrhadd", "UcUsUiUl", "aarch64_sve_urhadd", "aarch64_sve_urhadd">; + +defm SVQSUB_S : SInstZPZZ<"svqsub", "csli", "aarch64_sve_sqsub", "aarch64_sve_sqsub">; +defm SVQSUB_U : SInstZPZZ<"svqsub", "UcUsUiUl", "aarch64_sve_uqsub", "aarch64_sve_uqsub">; +defm SVQSUBR_S : SInstZPZZ<"svqsubr", "csli", "aarch64_sve_sqsubr", "aarch64_sve_sqsubr">; +defm SVQSUBR_U : SInstZPZZ<"svqsubr", "UcUsUiUl", "aarch64_sve_uqsubr", "aarch64_sve_uqsubr">; +defm SVHSUB_S : SInstZPZZ<"svhsub", "csli", "aarch64_sve_shsub", "aarch64_sve_shsub">; +defm SVHSUB_U : SInstZPZZ<"svhsub", "UcUsUiUl", "aarch64_sve_uhsub", "aarch64_sve_uhsub">; +defm SVHSUBR_S : SInstZPZZ<"svhsubr", "csli", "aarch64_sve_shsubr", "aarch64_sve_shsubr">; +defm SVHSUBR_U : SInstZPZZ<"svhsubr", "UcUsUiUl", "aarch64_sve_uhsubr", "aarch64_sve_uhsubr">; defm SVQABS : SInstZPZ<"svqabs", "csil", "aarch64_sve_sqabs">; defm SVQNEG : SInstZPZ<"svqneg", "csil", "aarch64_sve_sqneg">; diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -9475,8 +9475,10 @@ if (TypeFlags.isReverseCompare()) std::swap(Ops[1], Ops[2]); - - if (TypeFlags.isReverseUSDOT()) + else if (TypeFlags.isReverseUSDOT()) + std::swap(Ops[1], Ops[2]); + else if (TypeFlags.isReverseMergeAnyBinOp() && + TypeFlags.getMergeType() == SVETypeFlags::MergeAny) std::swap(Ops[1], Ops[2]); // Predicated intrinsics with _z suffix need a select w/ zeroinitializer. diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svabd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svabd_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svabd_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svabd_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svabd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svabd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svabd_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svabd_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svabd_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svabd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svadd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svadd_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svadd_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svadd_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svadd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svadd_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svadd_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svadd_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c @@ -156,12 +156,12 @@ // CHECK-LABEL: @test_svasr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svasr_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasr_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -172,13 +172,13 @@ // CHECK-LABEL: @test_svasr_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasr_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -189,13 +189,13 @@ // CHECK-LABEL: @test_svasr_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasr_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -206,13 +206,13 @@ // CHECK-LABEL: @test_svasr_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svasr_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -269,7 +269,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_xu10__SVBool_tu11__SVInt64_tm( @@ -277,7 +277,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svasr_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) @@ -570,14 +570,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_xu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasr_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) @@ -590,7 +590,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_xu10__SVBool_tu11__SVInt16_tt( @@ -598,7 +598,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasr_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) @@ -611,7 +611,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_xu10__SVBool_tu11__SVInt32_tj( @@ -619,7 +619,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasr_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -161,13 +161,13 @@ // CHECK-LABEL: @test_svdiv_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdiv_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -178,13 +178,13 @@ // CHECK-LABEL: @test_svdiv_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdiv_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -195,13 +195,13 @@ // CHECK-LABEL: @test_svdiv_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdiv_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -212,13 +212,13 @@ // CHECK-LABEL: @test_svdiv_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdiv_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -407,7 +407,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -415,7 +415,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdiv_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -428,7 +428,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -436,7 +436,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdiv_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -449,7 +449,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -457,7 +457,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdiv_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -470,7 +470,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -478,7 +478,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdiv_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -161,13 +161,13 @@ // CHECK-LABEL: @test_svdivr_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdivr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -178,13 +178,13 @@ // CHECK-LABEL: @test_svdivr_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdivr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -195,13 +195,13 @@ // CHECK-LABEL: @test_svdivr_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdivr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -212,13 +212,13 @@ // CHECK-LABEL: @test_svdivr_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdivr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -407,7 +407,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -415,7 +415,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdivr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -428,7 +428,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -436,7 +436,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdivr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -449,7 +449,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -457,7 +457,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdivr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -470,7 +470,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -478,7 +478,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svlsl_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svlsl_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svlsl_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlsl_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svlsl_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlsl_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svlsl_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svlsl_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svlsl_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsl_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svlsl_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsl_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svlsl_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsl_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svlsl_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svlsl_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c @@ -156,12 +156,12 @@ // CHECK-LABEL: @test_svlsr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -172,13 +172,13 @@ // CHECK-LABEL: @test_svlsr_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -189,13 +189,13 @@ // CHECK-LABEL: @test_svlsr_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -206,13 +206,13 @@ // CHECK-LABEL: @test_svlsr_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svlsr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmax_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmax_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmax_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmax_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmax_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmax_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmax_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmax_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmax_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmax_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmax_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmax_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmax_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmax_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmax_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmax_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmax_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmax_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmax_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmax_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmax_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmax_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmax_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmax_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmax_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmax_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmin_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmin_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmin_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmin_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmin_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmin_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmin_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmin_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmin_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmin_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmin_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmin_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmin_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmin_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmin_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmin_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmin_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmin_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmin_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmin_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmin_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmin_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmin_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmin_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmin_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmin_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmul_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmul_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmul_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmul_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmul_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmul_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmul_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmul_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmul_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmul_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmul_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmul_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmul_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmul_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmul_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmul_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmul_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmul_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmul_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmul_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmul_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmul_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmul_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmul_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmul_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmul_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmulh_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmulh_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmulh_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmulh_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmulh_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmulh_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmulh_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmulh_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmulh_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmulh_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmulh_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmulh_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmulh_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmulh_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmulh_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmulh_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmulh_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmulh_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmulh_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmulh_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmulh_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmulh_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmulh_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmulh_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svsub_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svsub_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svsub_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svsub_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svsub_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svsub_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svsub_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svsub_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svsubr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svsubr_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svsubr_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svsubr_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svsubr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svsubr_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svsubr_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svsubr_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)