diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
--- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
+++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp
@@ -812,40 +812,12 @@
     Regs |= getAliases(X86::XMM1);
   }
 
-  void getGPRegs(BitVector &Regs, bool IncludeAlias) const override {
-    if (IncludeAlias) {
-      Regs |= getAliases(X86::RAX);
-      Regs |= getAliases(X86::RBX);
-      Regs |= getAliases(X86::RBP);
-      Regs |= getAliases(X86::RSI);
-      Regs |= getAliases(X86::RDI);
-      Regs |= getAliases(X86::RDX);
-      Regs |= getAliases(X86::RCX);
-      Regs |= getAliases(X86::R8);
-      Regs |= getAliases(X86::R9);
-      Regs |= getAliases(X86::R10);
-      Regs |= getAliases(X86::R11);
-      Regs |= getAliases(X86::R12);
-      Regs |= getAliases(X86::R13);
-      Regs |= getAliases(X86::R14);
-      Regs |= getAliases(X86::R15);
-      return;
-    }
-    Regs.set(X86::RAX);
-    Regs.set(X86::RBX);
-    Regs.set(X86::RBP);
-    Regs.set(X86::RSI);
-    Regs.set(X86::RDI);
-    Regs.set(X86::RDX);
-    Regs.set(X86::RCX);
-    Regs.set(X86::R8);
-    Regs.set(X86::R9);
-    Regs.set(X86::R10);
-    Regs.set(X86::R11);
-    Regs.set(X86::R12);
-    Regs.set(X86::R13);
-    Regs.set(X86::R14);
-    Regs.set(X86::R15);
+  void getGPRegs(BitVector &Regs, bool IncludeAlias = true) const override {
+    for (MCPhysReg Reg : X86MCRegisterClasses[X86::GR64RegClassID])
+      if (IncludeAlias)
+        Regs |= getAliases(Reg);
+      else
+        Regs.set(Reg);
   }
 
   void getClassicGPRegs(BitVector &Regs) const override {