diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -78,10 +78,6 @@ FCTIDUZ, FCTIWUZ, - /// Floating-point-to-integer conversion instructions - FP_TO_UINT_IN_VSR, - FP_TO_SINT_IN_VSR, - /// VEXTS, ByteWidth - takes an input in VSFRC and produces an output in /// VSFRC that is sign-extended from ByteWidth to a 64-byte integer. VEXTS, diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1642,10 +1642,6 @@ case PPCISD::FCTIWZ: return "PPCISD::FCTIWZ"; case PPCISD::FCTIDUZ: return "PPCISD::FCTIDUZ"; case PPCISD::FCTIWUZ: return "PPCISD::FCTIWUZ"; - case PPCISD::FP_TO_UINT_IN_VSR: - return "PPCISD::FP_TO_UINT_IN_VSR,"; - case PPCISD::FP_TO_SINT_IN_VSR: - return "PPCISD::FP_TO_SINT_IN_VSR"; case PPCISD::FRE: return "PPCISD::FRE"; case PPCISD::FRSQRTE: return "PPCISD::FRSQRTE"; case PPCISD::FTSQRT: @@ -8117,7 +8113,11 @@ // For strict nodes, source is the second operand. SDValue Src = Op.getOperand(IsStrict ? 1 : 0); SDValue Chain = IsStrict ? Op.getOperand(0) : SDValue(); - assert(Src.getValueType().isFloatingPoint()); + MVT DestTy = Op.getSimpleValueType(); + assert(Src.getValueType().isFloatingPoint() && + (DestTy == MVT::i8 || DestTy == MVT::i16 || DestTy == MVT::i32 || + DestTy == MVT::i64) && + "Invalid FP_TO_INT types"); if (Src.getValueType() == MVT::f32) { if (IsStrict) { Src = @@ -8127,9 +8127,10 @@ } else Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src); } - SDValue Conv; + if ((DestTy == MVT::i8 || DestTy == MVT::i16) && Subtarget.hasP9Vector()) + DestTy = Subtarget.isPPC64() ? MVT::i64 : MVT::i32; unsigned Opc = ISD::DELETED_NODE; - switch (Op.getSimpleValueType().SimpleTy) { + switch (DestTy.SimpleTy) { default: llvm_unreachable("Unhandled FP_TO_INT type in custom expander!"); case MVT::i32: Opc = IsSigned ? PPCISD::FCTIWZ @@ -8140,12 +8141,14 @@ "i64 FP_TO_UINT is supported only with FPCVT"); Opc = IsSigned ? PPCISD::FCTIDZ : PPCISD::FCTIDUZ; } + EVT ConvTy = Src.getValueType() == MVT::f128 ? MVT::f128 : MVT::f64; + SDValue Conv; if (IsStrict) { Opc = getPPCStrictOpcode(Opc); - Conv = DAG.getNode(Opc, dl, DAG.getVTList(MVT::f64, MVT::Other), - {Chain, Src}, Flags); + Conv = DAG.getNode(Opc, dl, DAG.getVTList(ConvTy, MVT::Other), {Chain, Src}, + Flags); } else { - Conv = DAG.getNode(Opc, dl, MVT::f64, Src); + Conv = DAG.getNode(Opc, dl, ConvTy, Src); } return Conv; } @@ -15054,30 +15057,18 @@ // Only perform combine for conversion to i64/i32 or power9 i16/i8. bool ValidTypeForStoreFltAsInt = - (Op1VT == MVT::i32 || Op1VT == MVT::i64 || + (Op1VT == MVT::i32 || (Op1VT == MVT::i64 && Subtarget.isPPC64()) || (Subtarget.hasP9Vector() && (Op1VT == MVT::i16 || Op1VT == MVT::i8))); - if (ResVT == MVT::f128 && !Subtarget.hasP9Vector()) + // TODO: Lower conversion from f128 on all VSX targets + if (ResVT == MVT::ppcf128 || (ResVT == MVT::f128 && !Subtarget.hasP9Vector())) return SDValue(); - if (ResVT == MVT::ppcf128 || !Subtarget.hasP8Vector() || + if ((Op1VT != MVT::i64 && !Subtarget.hasP8Vector()) || cast(N)->isTruncatingStore() || !ValidTypeForStoreFltAsInt) return SDValue(); - // Extend f32 values to f64 - if (ResVT.getScalarSizeInBits() == 32) { - Val = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Val); - DCI.AddToWorklist(Val.getNode()); - } - - // Set signed or unsigned conversion opcode. - unsigned ConvOpcode = (Opcode == ISD::FP_TO_SINT) ? - PPCISD::FP_TO_SINT_IN_VSR : - PPCISD::FP_TO_UINT_IN_VSR; - - Val = DAG.getNode(ConvOpcode, - dl, ResVT == MVT::f128 ? MVT::f128 : MVT::f64, Val); - DCI.AddToWorklist(Val.getNode()); + Val = convertFPToInt(N->getOperand(1), DAG, Subtarget); // Set number of bytes being converted. unsigned ByteSize = Op1VT.getScalarSizeInBits() / 8; @@ -15090,7 +15081,6 @@ cast(N)->getMemoryVT(), cast(N)->getMemOperand()); - DCI.AddToWorklist(Val.getNode()); return Val; } diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -32,7 +32,7 @@ SDTCisFP<0>, SDTCisFP<1> ]>; def SDT_PPCstore_scal_int_from_vsr : SDTypeProfile<0, 3, [ - SDTCisVT<0, f64>, SDTCisPtrTy<1>, SDTCisPtrTy<2> + SDTCisFP<0>, SDTCisPtrTy<1>, SDTCisPtrTy<2> ]>; def SDT_PPCVexts : SDTypeProfile<1, 2, [ SDTCisVT<0, f64>, SDTCisVT<1, f64>, SDTCisPtrTy<2> @@ -164,10 +164,6 @@ [(PPCfcfidus node:$op), (PPCstrict_fcfidus node:$op)]>; -def PPCcv_fp_to_uint_in_vsr: - SDNode<"PPCISD::FP_TO_UINT_IN_VSR", SDT_PPCcv_fp_to_int, []>; -def PPCcv_fp_to_sint_in_vsr: - SDNode<"PPCISD::FP_TO_SINT_IN_VSR", SDT_PPCcv_fp_to_int, []>; def PPCstore_scal_int_from_vsr: SDNode<"PPCISD::ST_VSR_SCAL_INT", SDT_PPCstore_scal_int_from_vsr, [SDNPHasChain, SDNPMayStore]>; diff --git a/llvm/lib/Target/PowerPC/PPCInstrP10.td b/llvm/lib/Target/PowerPC/PPCInstrP10.td --- a/llvm/lib/Target/PowerPC/PPCInstrP10.td +++ b/llvm/lib/Target/PowerPC/PPCInstrP10.td @@ -1252,23 +1252,10 @@ (PSTDpc $RS, $ga, 0)>; // Special Cases For PPCstore_scal_int_from_vsr - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), - (PPCmatpcreladdr PCRelForm:$dst), 8), - (PSTXSDpc (XSCVDPSXDS f64:$src), $dst, 0)>; - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), - (PPCmatpcreladdr PCRelForm:$dst), 8), - (PSTXSDpc (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC), $dst, 0)>; - - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), - (PPCmatpcreladdr PCRelForm:$dst), 8), - (PSTXSDpc (XSCVDPUXDS f64:$src), $dst, 0)>; - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), - (PPCmatpcreladdr PCRelForm:$dst), 8), - (PSTXSDpc (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC), $dst, 0)>; + def : Pat<(PPCstore_scal_int_from_vsr f64:$src, (PPCmatpcreladdr PCRelForm:$dst), 8), + (PSTXSDpc $src, $dst, 0)>; + def : Pat<(PPCstore_scal_int_from_vsr f128:$src, (PPCmatpcreladdr PCRelForm:$dst), 8), + (PSTXSDpc (COPY_TO_REGCLASS $src, VFRC), $dst, 0)>; def : Pat<(v4f32 (PPCldvsxlh (PPCmatpcreladdr PCRelForm:$addr))), (SUBREG_TO_REG (i64 1), (PLFDpc $addr, 0), sub_64)>; @@ -2209,20 +2196,10 @@ def : Pat<(store v2f64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>; // Cases For PPCstore_scal_int_from_vsr - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), PDForm:$dst, 8), - (PSTXSD (XSCVDPUXDS f64:$src), PDForm:$dst)>; - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), PDForm:$dst, 8), - (PSTXSD (XSCVDPSXDS f64:$src), PDForm:$dst)>; - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), PDForm:$dst, 8), - (PSTXSD (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC), - PDForm:$dst)>; - def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), PDForm:$dst, 8), - (PSTXSD (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC), - PDForm:$dst)>; + def : Pat<(PPCstore_scal_int_from_vsr f64:$src, PDForm:$dst, 8), + (PSTXSD $src, PDForm:$dst)>; + def : Pat<(PPCstore_scal_int_from_vsr f128:$src, PDForm:$dst, 8), + (PSTXSD (COPY_TO_REGCLASS $src, VFRC), PDForm:$dst)>; } let Predicates = [PrefixInstrs] in { diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -1486,10 +1486,14 @@ // Truncate & Convert QP -> (Un)Signed (D)Word (dword[1] is set to zero) let mayRaiseFPException = 1 in { - def XSCVQPSDZ : X_VT5_XO5_VB5<63, 25, 836, "xscvqpsdz", []>; - def XSCVQPSWZ : X_VT5_XO5_VB5<63, 9, 836, "xscvqpswz", []>; - def XSCVQPUDZ : X_VT5_XO5_VB5<63, 17, 836, "xscvqpudz", []>; - def XSCVQPUWZ : X_VT5_XO5_VB5<63, 1, 836, "xscvqpuwz", []>; + def XSCVQPSDZ : X_VT5_XO5_VB5<63, 25, 836, "xscvqpsdz", + [(set f128:$RST, (PPCany_fctidz f128:$RB))]>; + def XSCVQPSWZ : X_VT5_XO5_VB5<63, 9, 836, "xscvqpswz", + [(set f128:$RST, (PPCany_fctiwz f128:$RB))]>; + def XSCVQPUDZ : X_VT5_XO5_VB5<63, 17, 836, "xscvqpudz", + [(set f128:$RST, (PPCany_fctiduz f128:$RB))]>; + def XSCVQPUWZ : X_VT5_XO5_VB5<63, 1, 836, "xscvqpuwz", + [(set f128:$RST, (PPCany_fctiwuz f128:$RB))]>; } // Convert (Un)Signed DWord -> QP. @@ -2909,6 +2913,10 @@ def:Pat<(vmrghw_swapped_shuffle v16i8:$vA, v16i8:$vB), (COPY_TO_REGCLASS (XXMRGHW (COPY_TO_REGCLASS $vB, VSRC), (COPY_TO_REGCLASS $vA, VSRC)), VRRC)>; +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, XForm:$dst, 8), + (STXSDX $src, XForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, XForm:$dst, 8), + (STXSDX (COPY_TO_REGCLASS $src, VSFRC), XForm:$dst)>; } // HasVSX // Any big endian VSX subtarget. @@ -3151,12 +3159,10 @@ // Any pre-Power9 VSX subtarget. let Predicates = [HasVSX, NoP9Vector] in { -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), ForceXForm:$dst, 8), - (STXSDX (XSCVDPSXDS f64:$src), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), ForceXForm:$dst, 8), - (STXSDX (XSCVDPUXDS f64:$src), ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, ForceXForm:$dst, 8), + (STXSDX $src, ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, ForceXForm:$dst, 8), + (STXSDX (COPY_TO_REGCLASS $src, VSFRC), ForceXForm:$dst)>; // Load-and-splat with fp-to-int conversion (using X-Form VSX/FP loads). defm : ScalToVecWPermute< @@ -3303,12 +3309,15 @@ (COPY_TO_REGCLASS $S, VSFRC)), VSSRC))>; // Instructions for converting float to i32 feeding a store. -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), ForceXForm:$dst, 4), - (STIWX (XSCVDPSXWS f64:$src), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), ForceXForm:$dst, 4), - (STIWX (XSCVDPUXWS f64:$src), ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, ForceXForm:$dst, 4), + (STIWX $src, ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, ForceXForm:$dst, 4), + (STIWX (COPY_TO_REGCLASS $src, VSFRC), ForceXForm:$dst)>; + +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, ForceXForm:$dst, 4), + (STXSIWX $src, ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, ForceXForm:$dst, 4), + (STXSIWX (COPY_TO_REGCLASS $src, VSFRC), ForceXForm:$dst)>; def : Pat<(v2i64 (smax v2i64:$src1, v2i64:$src2)), (v2i64 (VMAXSD (COPY_TO_REGCLASS $src1, VRRC), @@ -4042,67 +4051,19 @@ (i32 (MFVSRWZ (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC)))>; // Instructions for store(fptosi). -// The 8-byte version is repeated here due to availability of D-Form STXSD. -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), XForm:$dst, 8), - (STXSDX (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC), - XForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), DSForm:$dst, 8), - (STXSD (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC), - DSForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), ForceXForm:$dst, 4), - (STXSIWX (COPY_TO_REGCLASS (XSCVQPSWZ $src), VFRC), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), ForceXForm:$dst, 2), - (STXSIHX (COPY_TO_REGCLASS (XSCVQPSWZ $src), VFRC), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), ForceXForm:$dst, 1), - (STXSIBX (COPY_TO_REGCLASS (XSCVQPSWZ $src), VFRC), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), XForm:$dst, 8), - (STXSDX (XSCVDPSXDS f64:$src), XForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), DSForm:$dst, 8), - (STXSD (XSCVDPSXDS f64:$src), DSForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), ForceXForm:$dst, 2), - (STXSIHX (XSCVDPSXWS f64:$src), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), ForceXForm:$dst, 1), - (STXSIBX (XSCVDPSXWS f64:$src), ForceXForm:$dst)>; - -// Instructions for store(fptoui). -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), XForm:$dst, 8), - (STXSDX (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC), - XForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), DSForm:$dst, 8), - (STXSD (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC), - DSForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), ForceXForm:$dst, 4), - (STXSIWX (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), ForceXForm:$dst, 2), - (STXSIHX (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), ForceXForm:$dst, 1), - (STXSIBX (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), XForm:$dst, 8), - (STXSDX (XSCVDPUXDS f64:$src), XForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), DSForm:$dst, 8), - (STXSD (XSCVDPUXDS f64:$src), DSForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), ForceXForm:$dst, 2), - (STXSIHX (XSCVDPUXWS f64:$src), ForceXForm:$dst)>; -def : Pat<(PPCstore_scal_int_from_vsr - (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), ForceXForm:$dst, 1), - (STXSIBX (XSCVDPUXWS f64:$src), ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, DSForm:$dst, 8), + (STXSD $src, DSForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, ForceXForm:$dst, 2), + (STXSIHX $src, ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f64:$src, ForceXForm:$dst, 1), + (STXSIBX $src, ForceXForm:$dst)>; + +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, DSForm:$dst, 8), + (STXSD (COPY_TO_REGCLASS $src, VFRC), DSForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, ForceXForm:$dst, 2), + (STXSIHX (COPY_TO_REGCLASS $src, VSFRC), ForceXForm:$dst)>; +def : Pat<(PPCstore_scal_int_from_vsr f128:$src, ForceXForm:$dst, 1), + (STXSIBX (COPY_TO_REGCLASS $src, VSFRC), ForceXForm:$dst)>; // Round & Convert QP -> DP/SP def : Pat<(f64 (any_fpround f128:$src)), (f64 (XSCVQPDP $src))>; diff --git a/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll b/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll --- a/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll +++ b/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll @@ -825,7 +825,7 @@ ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) ; CHECK-NEXT: lxv v2, 32(r4) -; CHECK-NEXT: xscvqpswz v2, v2 +; CHECK-NEXT: xscvqpsdz v2, v2 ; CHECK-NEXT: stxsihx v2, 0, r3 ; CHECK-NEXT: blr ; @@ -915,7 +915,7 @@ ; CHECK-NEXT: lxv v2, 0(r3) ; CHECK-NEXT: lxv v3, 0(r4) ; CHECK-NEXT: xsaddqp v2, v2, v3 -; CHECK-NEXT: xscvqpswz v2, v2 +; CHECK-NEXT: xscvqpsdz v2, v2 ; CHECK-NEXT: stxsihx v2, 0, r5 ; CHECK-NEXT: blr ; @@ -990,7 +990,7 @@ ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) ; CHECK-NEXT: lxv v2, 32(r4) -; CHECK-NEXT: xscvqpuwz v2, v2 +; CHECK-NEXT: xscvqpudz v2, v2 ; CHECK-NEXT: stxsihx v2, 0, r3 ; CHECK-NEXT: blr ; @@ -1078,7 +1078,7 @@ ; CHECK-NEXT: lxv v2, 0(r3) ; CHECK-NEXT: lxv v3, 0(r4) ; CHECK-NEXT: xsaddqp v2, v2, v3 -; CHECK-NEXT: xscvqpuwz v2, v2 +; CHECK-NEXT: xscvqpudz v2, v2 ; CHECK-NEXT: stxsihx v2, 0, r5 ; CHECK-NEXT: blr ; @@ -1155,7 +1155,7 @@ ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) ; CHECK-NEXT: lxv v2, 32(r4) -; CHECK-NEXT: xscvqpswz v2, v2 +; CHECK-NEXT: xscvqpsdz v2, v2 ; CHECK-NEXT: stxsibx v2, 0, r3 ; CHECK-NEXT: blr ; @@ -1245,7 +1245,7 @@ ; CHECK-NEXT: lxv v2, 0(r3) ; CHECK-NEXT: lxv v3, 0(r4) ; CHECK-NEXT: xsaddqp v2, v2, v3 -; CHECK-NEXT: xscvqpswz v2, v2 +; CHECK-NEXT: xscvqpsdz v2, v2 ; CHECK-NEXT: stxsibx v2, 0, r5 ; CHECK-NEXT: blr ; @@ -1320,7 +1320,7 @@ ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) ; CHECK-NEXT: lxv v2, 32(r4) -; CHECK-NEXT: xscvqpuwz v2, v2 +; CHECK-NEXT: xscvqpudz v2, v2 ; CHECK-NEXT: stxsibx v2, 0, r3 ; CHECK-NEXT: blr ; @@ -1408,7 +1408,7 @@ ; CHECK-NEXT: lxv v2, 0(r3) ; CHECK-NEXT: lxv v3, 0(r4) ; CHECK-NEXT: xsaddqp v2, v2, v3 -; CHECK-NEXT: xscvqpuwz v2, v2 +; CHECK-NEXT: xscvqpudz v2, v2 ; CHECK-NEXT: stxsibx v2, 0, r5 ; CHECK-NEXT: blr ; diff --git a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll @@ -3628,7 +3628,7 @@ define dso_local void @st_0_double_uint8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_0_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -3649,7 +3649,7 @@ define dso_local void @st_align16_double_uint8_t(ptr nocapture %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_align16_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -3671,14 +3671,14 @@ define dso_local void @st_align32_double_uint8_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsibx f0, r3, r4 @@ -3703,7 +3703,7 @@ define dso_local void @st_align64_double_uint8_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align64_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 @@ -3711,7 +3711,7 @@ ; ; CHECK-P9-LABEL: st_align64_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -3738,7 +3738,7 @@ define dso_local void @st_reg_double_uint8_t(ptr nocapture %ptr, i64 %off, double %str) { ; CHECK-POSTP8-LABEL: st_reg_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -3759,7 +3759,7 @@ define dso_local void @st_or1_double_uint8_t(i64 %ptr, i8 zeroext %off, double %str) { ; CHECK-POSTP8-LABEL: st_or1_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -3784,7 +3784,7 @@ define dso_local void @st_not_disjoint16_double_uint8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -3808,7 +3808,7 @@ define dso_local void @st_disjoint_align16_double_uint8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -3834,7 +3834,7 @@ define dso_local void @st_not_disjoint32_double_uint8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -3860,7 +3860,7 @@ define dso_local void @st_disjoint_align32_double_uint8_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align32_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -3869,7 +3869,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -3900,9 +3900,9 @@ define dso_local void @st_not_disjoint64_double_uint8_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_not_disjoint64_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -3911,7 +3911,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -3942,7 +3942,7 @@ define dso_local void @st_disjoint_align64_double_uint8_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align64_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -3951,7 +3951,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -3982,7 +3982,7 @@ define dso_local void @st_cst_align16_double_uint8_t(double %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_double_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4003,14 +4003,14 @@ define dso_local void @st_cst_align32_double_uint8_t(double %str) { ; CHECK-P10-LABEL: st_cst_align32_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsibx f0, 0, r3 @@ -4033,7 +4033,7 @@ define dso_local void @st_cst_align64_double_uint8_t(double %str) { ; CHECK-P10-LABEL: st_cst_align64_double_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -4041,7 +4041,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_double_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -4067,7 +4067,7 @@ define dso_local void @st_0_double_int8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_0_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -4088,7 +4088,7 @@ define dso_local void @st_align16_double_int8_t(ptr nocapture %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_align16_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4110,14 +4110,14 @@ define dso_local void @st_align32_double_int8_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_double_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsibx f0, r3, r4 @@ -4142,7 +4142,7 @@ define dso_local void @st_align64_double_int8_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align64_double_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 @@ -4150,7 +4150,7 @@ ; ; CHECK-P9-LABEL: st_align64_double_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -4177,7 +4177,7 @@ define dso_local void @st_reg_double_int8_t(ptr nocapture %ptr, i64 %off, double %str) { ; CHECK-POSTP8-LABEL: st_reg_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -4198,7 +4198,7 @@ define dso_local void @st_or1_double_int8_t(i64 %ptr, i8 zeroext %off, double %str) { ; CHECK-POSTP8-LABEL: st_or1_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4223,7 +4223,7 @@ define dso_local void @st_not_disjoint16_double_int8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4247,7 +4247,7 @@ define dso_local void @st_disjoint_align16_double_int8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -4273,7 +4273,7 @@ define dso_local void @st_not_disjoint32_double_int8_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -4299,7 +4299,7 @@ define dso_local void @st_disjoint_align32_double_int8_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align32_double_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -4308,7 +4308,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_double_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -4339,9 +4339,9 @@ define dso_local void @st_not_disjoint64_double_int8_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_not_disjoint64_double_int8_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -4350,7 +4350,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_double_int8_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -4381,7 +4381,7 @@ define dso_local void @st_disjoint_align64_double_int8_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align64_double_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -4390,7 +4390,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_double_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -4421,7 +4421,7 @@ define dso_local void @st_cst_align16_double_int8_t(double %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_double_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4442,14 +4442,14 @@ define dso_local void @st_cst_align32_double_int8_t(double %str) { ; CHECK-P10-LABEL: st_cst_align32_double_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_double_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsibx f0, 0, r3 @@ -4472,7 +4472,7 @@ define dso_local void @st_cst_align64_double_int8_t(double %str) { ; CHECK-P10-LABEL: st_cst_align64_double_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -4480,7 +4480,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_double_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -4506,7 +4506,7 @@ define dso_local void @st_0_double_uint16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_0_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -4527,7 +4527,7 @@ define dso_local void @st_align16_double_uint16_t(ptr nocapture %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_align16_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4549,14 +4549,14 @@ define dso_local void @st_align32_double_uint16_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsihx f0, r3, r4 @@ -4581,7 +4581,7 @@ define dso_local void @st_align64_double_uint16_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align64_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 @@ -4589,7 +4589,7 @@ ; ; CHECK-P9-LABEL: st_align64_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -4616,7 +4616,7 @@ define dso_local void @st_reg_double_uint16_t(ptr nocapture %ptr, i64 %off, double %str) { ; CHECK-POSTP8-LABEL: st_reg_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -4637,7 +4637,7 @@ define dso_local void @st_or1_double_uint16_t(i64 %ptr, i8 zeroext %off, double %str) { ; CHECK-POSTP8-LABEL: st_or1_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4662,7 +4662,7 @@ define dso_local void @st_not_disjoint16_double_uint16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4686,7 +4686,7 @@ define dso_local void @st_disjoint_align16_double_uint16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -4712,7 +4712,7 @@ define dso_local void @st_not_disjoint32_double_uint16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -4738,7 +4738,7 @@ define dso_local void @st_disjoint_align32_double_uint16_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align32_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -4747,7 +4747,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -4778,9 +4778,9 @@ define dso_local void @st_not_disjoint64_double_uint16_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_not_disjoint64_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -4789,7 +4789,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -4820,7 +4820,7 @@ define dso_local void @st_disjoint_align64_double_uint16_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align64_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -4829,7 +4829,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -4860,7 +4860,7 @@ define dso_local void @st_cst_align16_double_uint16_t(double %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_double_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4881,14 +4881,14 @@ define dso_local void @st_cst_align32_double_uint16_t(double %str) { ; CHECK-P10-LABEL: st_cst_align32_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsihx f0, 0, r3 @@ -4911,7 +4911,7 @@ define dso_local void @st_cst_align64_double_uint16_t(double %str) { ; CHECK-P10-LABEL: st_cst_align64_double_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -4919,7 +4919,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_double_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -4945,7 +4945,7 @@ define dso_local void @st_0_double_int16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_0_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -4966,7 +4966,7 @@ define dso_local void @st_align16_double_int16_t(ptr nocapture %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_align16_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4988,14 +4988,14 @@ define dso_local void @st_align32_double_int16_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_double_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsihx f0, r3, r4 @@ -5020,7 +5020,7 @@ define dso_local void @st_align64_double_int16_t(ptr nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align64_double_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 @@ -5028,7 +5028,7 @@ ; ; CHECK-P9-LABEL: st_align64_double_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -5055,7 +5055,7 @@ define dso_local void @st_reg_double_int16_t(ptr nocapture %ptr, i64 %off, double %str) { ; CHECK-POSTP8-LABEL: st_reg_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -5076,7 +5076,7 @@ define dso_local void @st_or1_double_int16_t(i64 %ptr, i8 zeroext %off, double %str) { ; CHECK-POSTP8-LABEL: st_or1_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5101,7 +5101,7 @@ define dso_local void @st_not_disjoint16_double_int16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5125,7 +5125,7 @@ define dso_local void @st_disjoint_align16_double_int16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -5151,7 +5151,7 @@ define dso_local void @st_not_disjoint32_double_int16_t(i64 %ptr, double %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -5177,7 +5177,7 @@ define dso_local void @st_disjoint_align32_double_int16_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align32_double_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -5186,7 +5186,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_double_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -5217,9 +5217,9 @@ define dso_local void @st_not_disjoint64_double_int16_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_not_disjoint64_double_int16_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -5228,7 +5228,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_double_int16_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -5259,7 +5259,7 @@ define dso_local void @st_disjoint_align64_double_int16_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align64_double_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -5268,7 +5268,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_double_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -5299,7 +5299,7 @@ define dso_local void @st_cst_align16_double_int16_t(double %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_double_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5320,14 +5320,14 @@ define dso_local void @st_cst_align32_double_int16_t(double %str) { ; CHECK-P10-LABEL: st_cst_align32_double_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_double_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsihx f0, 0, r3 @@ -5350,7 +5350,7 @@ define dso_local void @st_cst_align64_double_int16_t(double %str) { ; CHECK-P10-LABEL: st_cst_align64_double_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -5358,7 +5358,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_double_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -5582,9 +5582,9 @@ define dso_local void @st_not_disjoint64_double_uint32_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_not_disjoint64_double_uint32_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stfiwx f0, 0, r3 @@ -5910,9 +5910,9 @@ define dso_local void @st_not_disjoint64_double_int32_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_not_disjoint64_double_int32_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stfiwx f0, 0, r3 diff --git a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll @@ -3650,7 +3650,7 @@ define dso_local void @st_0_float_uint8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_0_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -3671,7 +3671,7 @@ define dso_local void @st_align16_float_uint8_t(ptr nocapture %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_align16_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -3693,14 +3693,14 @@ define dso_local void @st_align32_float_uint8_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsibx f0, r3, r4 @@ -3725,7 +3725,7 @@ define dso_local void @st_align64_float_uint8_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align64_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 @@ -3733,7 +3733,7 @@ ; ; CHECK-P9-LABEL: st_align64_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -3760,7 +3760,7 @@ define dso_local void @st_reg_float_uint8_t(ptr nocapture %ptr, i64 %off, float %str) { ; CHECK-POSTP8-LABEL: st_reg_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -3781,7 +3781,7 @@ define dso_local void @st_or1_float_uint8_t(i64 %ptr, i8 zeroext %off, float %str) { ; CHECK-POSTP8-LABEL: st_or1_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -3806,7 +3806,7 @@ define dso_local void @st_not_disjoint16_float_uint8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -3830,7 +3830,7 @@ define dso_local void @st_disjoint_align16_float_uint8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -3856,7 +3856,7 @@ define dso_local void @st_not_disjoint32_float_uint8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -3882,7 +3882,7 @@ define dso_local void @st_disjoint_align32_float_uint8_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align32_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -3891,7 +3891,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -3922,9 +3922,9 @@ define dso_local void @st_not_disjoint64_float_uint8_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_not_disjoint64_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -3933,7 +3933,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -3964,7 +3964,7 @@ define dso_local void @st_disjoint_align64_float_uint8_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align64_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -3973,7 +3973,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -4004,7 +4004,7 @@ define dso_local void @st_cst_align16_float_uint8_t(float %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_float_uint8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4025,14 +4025,14 @@ define dso_local void @st_cst_align32_float_uint8_t(float %str) { ; CHECK-P10-LABEL: st_cst_align32_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsibx f0, 0, r3 @@ -4055,7 +4055,7 @@ define dso_local void @st_cst_align64_float_uint8_t(float %str) { ; CHECK-P10-LABEL: st_cst_align64_float_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -4063,7 +4063,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_float_uint8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -4089,7 +4089,7 @@ define dso_local void @st_0_float_int8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_0_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -4110,7 +4110,7 @@ define dso_local void @st_align16_float_int8_t(ptr nocapture %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_align16_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4132,14 +4132,14 @@ define dso_local void @st_align32_float_int8_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_float_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsibx f0, r3, r4 @@ -4164,7 +4164,7 @@ define dso_local void @st_align64_float_int8_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align64_float_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, r3, r4 @@ -4172,7 +4172,7 @@ ; ; CHECK-P9-LABEL: st_align64_float_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -4199,7 +4199,7 @@ define dso_local void @st_reg_float_int8_t(ptr nocapture %ptr, i64 %off, float %str) { ; CHECK-POSTP8-LABEL: st_reg_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsibx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -4220,7 +4220,7 @@ define dso_local void @st_or1_float_int8_t(i64 %ptr, i8 zeroext %off, float %str) { ; CHECK-POSTP8-LABEL: st_or1_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4245,7 +4245,7 @@ define dso_local void @st_not_disjoint16_float_int8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4269,7 +4269,7 @@ define dso_local void @st_disjoint_align16_float_int8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -4295,7 +4295,7 @@ define dso_local void @st_not_disjoint32_float_int8_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 @@ -4321,7 +4321,7 @@ define dso_local void @st_disjoint_align32_float_int8_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align32_float_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -4330,7 +4330,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_float_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -4361,9 +4361,9 @@ define dso_local void @st_not_disjoint64_float_int8_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_not_disjoint64_float_int8_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -4372,7 +4372,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_float_int8_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -4403,7 +4403,7 @@ define dso_local void @st_disjoint_align64_float_int8_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align64_float_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -4412,7 +4412,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_float_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -4443,7 +4443,7 @@ define dso_local void @st_cst_align16_float_int8_t(float %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_float_int8_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsibx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4464,14 +4464,14 @@ define dso_local void @st_cst_align32_float_int8_t(float %str) { ; CHECK-P10-LABEL: st_cst_align32_float_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_float_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsibx f0, 0, r3 @@ -4494,7 +4494,7 @@ define dso_local void @st_cst_align64_float_int8_t(float %str) { ; CHECK-P10-LABEL: st_cst_align64_float_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsibx f0, 0, r3 @@ -4502,7 +4502,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_float_int8_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -4528,7 +4528,7 @@ define dso_local void @st_0_float_uint16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_0_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -4549,7 +4549,7 @@ define dso_local void @st_align16_float_uint16_t(ptr nocapture %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_align16_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4571,14 +4571,14 @@ define dso_local void @st_align32_float_uint16_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsihx f0, r3, r4 @@ -4603,7 +4603,7 @@ define dso_local void @st_align64_float_uint16_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align64_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 @@ -4611,7 +4611,7 @@ ; ; CHECK-P9-LABEL: st_align64_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -4638,7 +4638,7 @@ define dso_local void @st_reg_float_uint16_t(ptr nocapture %ptr, i64 %off, float %str) { ; CHECK-POSTP8-LABEL: st_reg_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -4659,7 +4659,7 @@ define dso_local void @st_or1_float_uint16_t(i64 %ptr, i8 zeroext %off, float %str) { ; CHECK-POSTP8-LABEL: st_or1_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4684,7 +4684,7 @@ define dso_local void @st_not_disjoint16_float_uint16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4708,7 +4708,7 @@ define dso_local void @st_disjoint_align16_float_uint16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -4734,7 +4734,7 @@ define dso_local void @st_not_disjoint32_float_uint16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -4760,7 +4760,7 @@ define dso_local void @st_disjoint_align32_float_uint16_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align32_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -4769,7 +4769,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -4800,9 +4800,9 @@ define dso_local void @st_not_disjoint64_float_uint16_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_not_disjoint64_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -4811,7 +4811,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -4842,7 +4842,7 @@ define dso_local void @st_disjoint_align64_float_uint16_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align64_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -4851,7 +4851,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -4882,7 +4882,7 @@ define dso_local void @st_cst_align16_float_uint16_t(float %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_float_uint16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpuxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpuxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -4903,14 +4903,14 @@ define dso_local void @st_cst_align32_float_uint16_t(float %str) { ; CHECK-P10-LABEL: st_cst_align32_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsihx f0, 0, r3 @@ -4933,7 +4933,7 @@ define dso_local void @st_cst_align64_float_uint16_t(float %str) { ; CHECK-P10-LABEL: st_cst_align64_float_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxws f0, f1 +; CHECK-P10-NEXT: xscvdpuxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -4941,7 +4941,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_float_uint16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpuxws f0, f1 +; CHECK-P9-NEXT: xscvdpuxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -4967,7 +4967,7 @@ define dso_local void @st_0_float_int16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_0_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr ; @@ -4988,7 +4988,7 @@ define dso_local void @st_align16_float_int16_t(ptr nocapture %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_align16_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: addi r3, r3, 8 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5010,14 +5010,14 @@ define dso_local void @st_align32_float_int16_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_float_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 1525 ; CHECK-P9-NEXT: ori r4, r4, 56600 ; CHECK-P9-NEXT: stxsihx f0, r3, r4 @@ -5042,7 +5042,7 @@ define dso_local void @st_align64_float_int16_t(ptr nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align64_float_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, r3, r4 @@ -5050,7 +5050,7 @@ ; ; CHECK-P9-LABEL: st_align64_float_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: ori r4, r4, 19025 ; CHECK-P9-NEXT: rldic r4, r4, 12, 24 @@ -5077,7 +5077,7 @@ define dso_local void @st_reg_float_int16_t(ptr nocapture %ptr, i64 %off, float %str) { ; CHECK-POSTP8-LABEL: st_reg_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: stxsihx f0, r3, r4 ; CHECK-POSTP8-NEXT: blr ; @@ -5098,7 +5098,7 @@ define dso_local void @st_or1_float_int16_t(i64 %ptr, i8 zeroext %off, float %str) { ; CHECK-POSTP8-LABEL: st_or1_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: or r3, r4, r3 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5123,7 +5123,7 @@ define dso_local void @st_not_disjoint16_float_int16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint16_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 6 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5147,7 +5147,7 @@ define dso_local void @st_disjoint_align16_float_int16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_disjoint_align16_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51 ; CHECK-POSTP8-NEXT: ori r3, r3, 24 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -5173,7 +5173,7 @@ define dso_local void @st_not_disjoint32_float_int16_t(i64 %ptr, float %str) { ; CHECK-POSTP8-LABEL: st_not_disjoint32_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: ori r3, r3, 34463 ; CHECK-POSTP8-NEXT: oris r3, r3, 1 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 @@ -5199,7 +5199,7 @@ define dso_local void @st_disjoint_align32_float_int16_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align32_float_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 ; CHECK-P10-NEXT: pli r4, 999990000 @@ -5208,7 +5208,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align32_float_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, -15264 ; CHECK-P9-NEXT: and r3, r3, r4 ; CHECK-P9-NEXT: lis r4, 15258 @@ -5239,9 +5239,9 @@ define dso_local void @st_not_disjoint64_float_int16_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_not_disjoint64_float_int16_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -5250,7 +5250,7 @@ ; CHECK-P9-LABEL: st_not_disjoint64_float_int16_t: ; CHECK-P9: # %bb.0: # %entry ; CHECK-P9-NEXT: li r4, 29 -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: rldic r4, r4, 35, 24 ; CHECK-P9-NEXT: oris r4, r4, 54437 ; CHECK-P9-NEXT: ori r4, r4, 4097 @@ -5281,7 +5281,7 @@ define dso_local void @st_disjoint_align64_float_int16_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align64_float_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r4, 244140625 ; CHECK-P10-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P10-NEXT: rldic r4, r4, 12, 24 @@ -5290,7 +5290,7 @@ ; ; CHECK-P9-LABEL: st_disjoint_align64_float_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r4, 3725 ; CHECK-P9-NEXT: rldicr r3, r3, 0, 23 ; CHECK-P9-NEXT: ori r4, r4, 19025 @@ -5321,7 +5321,7 @@ define dso_local void @st_cst_align16_float_int16_t(float %str) { ; CHECK-POSTP8-LABEL: st_cst_align16_float_int16_t: ; CHECK-POSTP8: # %bb.0: # %entry -; CHECK-POSTP8-NEXT: xscvdpsxws f0, f1 +; CHECK-POSTP8-NEXT: xscvdpsxds f0, f1 ; CHECK-POSTP8-NEXT: li r3, 4080 ; CHECK-POSTP8-NEXT: stxsihx f0, 0, r3 ; CHECK-POSTP8-NEXT: blr @@ -5342,14 +5342,14 @@ define dso_local void @st_cst_align32_float_int16_t(float %str) { ; CHECK-P10-LABEL: st_cst_align32_float_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 9999900 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_cst_align32_float_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 152 ; CHECK-P9-NEXT: ori r3, r3, 38428 ; CHECK-P9-NEXT: stxsihx f0, 0, r3 @@ -5372,7 +5372,7 @@ define dso_local void @st_cst_align64_float_int16_t(float %str) { ; CHECK-P10-LABEL: st_cst_align64_float_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxws f0, f1 +; CHECK-P10-NEXT: xscvdpsxds f0, f1 ; CHECK-P10-NEXT: pli r3, 244140625 ; CHECK-P10-NEXT: rldic r3, r3, 12, 24 ; CHECK-P10-NEXT: stxsihx f0, 0, r3 @@ -5380,7 +5380,7 @@ ; ; CHECK-P9-LABEL: st_cst_align64_float_int16_t: ; CHECK-P9: # %bb.0: # %entry -; CHECK-P9-NEXT: xscvdpsxws f0, f1 +; CHECK-P9-NEXT: xscvdpsxds f0, f1 ; CHECK-P9-NEXT: lis r3, 3725 ; CHECK-P9-NEXT: ori r3, r3, 19025 ; CHECK-P9-NEXT: rldic r3, r3, 12, 24 @@ -5604,9 +5604,9 @@ define dso_local void @st_not_disjoint64_float_uint32_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_not_disjoint64_float_uint32_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpuxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stfiwx f0, 0, r3 @@ -5932,9 +5932,9 @@ define dso_local void @st_not_disjoint64_float_int32_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_not_disjoint64_float_int32_t: ; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: pli r4, 232 ; CHECK-P10-NEXT: pli r5, 3567587329 -; CHECK-P10-NEXT: xscvdpsxws f0, f1 ; CHECK-P10-NEXT: rldimi r5, r4, 32, 0 ; CHECK-P10-NEXT: or r3, r3, r5 ; CHECK-P10-NEXT: stfiwx f0, 0, r3 diff --git a/llvm/test/CodeGen/PowerPC/store_fptoi.ll b/llvm/test/CodeGen/PowerPC/store_fptoi.ll --- a/llvm/test/CodeGen/PowerPC/store_fptoi.ll +++ b/llvm/test/CodeGen/PowerPC/store_fptoi.ll @@ -213,7 +213,7 @@ ; CHECK-LABEL: dpConv2shw: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsihx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -238,7 +238,7 @@ ; CHECK-LABEL: dpConv2sb: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsibx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -311,7 +311,7 @@ ; CHECK-LABEL: spConv2shw: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsihx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -336,7 +336,7 @@ ; CHECK-LABEL: spConv2sb: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsibx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -420,7 +420,7 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) ; CHECK-NEXT: sldi 3, 5, 1 -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsihx 0, 4, 3 ; CHECK-NEXT: blr ; @@ -449,7 +449,7 @@ ; CHECK-LABEL: dpConv2sb_x: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsibx 0, 4, 5 ; CHECK-NEXT: blr ; @@ -478,8 +478,8 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) ; CHECK-NEXT: xscvdpsxds 0, 0 -; CHECK-NEXT: sldi 5, 5, 3 -; CHECK-NEXT: stxsdx 0, 4, 5 +; CHECK-NEXT: sldi 3, 5, 3 +; CHECK-NEXT: stxsdx 0, 4, 3 ; CHECK-NEXT: blr ; ; CHECK-PWR8-LABEL: spConv2sdw_x: @@ -507,8 +507,8 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) ; CHECK-NEXT: xscvdpsxws 0, 0 -; CHECK-NEXT: sldi 5, 5, 2 -; CHECK-NEXT: stfiwx 0, 4, 5 +; CHECK-NEXT: sldi 3, 5, 2 +; CHECK-NEXT: stfiwx 0, 4, 3 ; CHECK-NEXT: blr ; ; CHECK-PWR8-LABEL: spConv2sw_x: @@ -535,9 +535,9 @@ ; CHECK-LABEL: spConv2shw_x: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 -; CHECK-NEXT: sldi 5, 5, 1 -; CHECK-NEXT: stxsihx 0, 4, 5 +; CHECK-NEXT: xscvdpsxds 0, 0 +; CHECK-NEXT: sldi 3, 5, 1 +; CHECK-NEXT: stxsihx 0, 4, 3 ; CHECK-NEXT: blr ; ; CHECK-PWR8-LABEL: spConv2shw_x: @@ -565,7 +565,7 @@ ; CHECK-LABEL: spConv2sb_x: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpsxws 0, 0 +; CHECK-NEXT: xscvdpsxds 0, 0 ; CHECK-NEXT: stxsibx 0, 4, 5 ; CHECK-NEXT: blr ; @@ -645,7 +645,7 @@ ; CHECK-LABEL: dpConv2uhw: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsihx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -670,7 +670,7 @@ ; CHECK-LABEL: dpConv2ub: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsibx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -743,7 +743,7 @@ ; CHECK-LABEL: spConv2uhw: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsihx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -768,7 +768,7 @@ ; CHECK-LABEL: spConv2ub: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsibx 0, 0, 4 ; CHECK-NEXT: blr ; @@ -852,7 +852,7 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) ; CHECK-NEXT: sldi 3, 5, 1 -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsihx 0, 4, 3 ; CHECK-NEXT: blr ; @@ -881,7 +881,7 @@ ; CHECK-LABEL: dpConv2ub_x: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfd 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsibx 0, 4, 5 ; CHECK-NEXT: blr ; @@ -910,8 +910,8 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) ; CHECK-NEXT: xscvdpuxds 0, 0 -; CHECK-NEXT: sldi 5, 5, 3 -; CHECK-NEXT: stxsdx 0, 4, 5 +; CHECK-NEXT: sldi 3, 5, 3 +; CHECK-NEXT: stxsdx 0, 4, 3 ; CHECK-NEXT: blr ; ; CHECK-PWR8-LABEL: spConv2udw_x: @@ -939,8 +939,8 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) ; CHECK-NEXT: xscvdpuxws 0, 0 -; CHECK-NEXT: sldi 5, 5, 2 -; CHECK-NEXT: stfiwx 0, 4, 5 +; CHECK-NEXT: sldi 3, 5, 2 +; CHECK-NEXT: stfiwx 0, 4, 3 ; CHECK-NEXT: blr ; ; CHECK-PWR8-LABEL: spConv2uw_x: @@ -967,9 +967,9 @@ ; CHECK-LABEL: spConv2uhw_x: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 -; CHECK-NEXT: sldi 5, 5, 1 -; CHECK-NEXT: stxsihx 0, 4, 5 +; CHECK-NEXT: xscvdpuxds 0, 0 +; CHECK-NEXT: sldi 3, 5, 1 +; CHECK-NEXT: stxsihx 0, 4, 3 ; CHECK-NEXT: blr ; ; CHECK-PWR8-LABEL: spConv2uhw_x: @@ -997,7 +997,7 @@ ; CHECK-LABEL: spConv2ub_x: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xscvdpuxws 0, 0 +; CHECK-NEXT: xscvdpuxds 0, 0 ; CHECK-NEXT: stxsibx 0, 4, 5 ; CHECK-NEXT: blr ; @@ -1019,3 +1019,76 @@ } + +define void @multiple_store_64(double %m, ptr %addr1, ptr %addr2, ptr %addr3) { +; CHECK-LABEL: multiple_store_64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpsxds 2, 1 +; CHECK-NEXT: stxsd 2, 0(4) +; CHECK-NEXT: stxsd 2, 0(5) +; CHECK-NEXT: stxsd 2, 0(6) +; CHECK-NEXT: blr +; +; CHECK-PWR8-LABEL: multiple_store_64: +; CHECK-PWR8: # %bb.0: # %entry +; CHECK-PWR8-NEXT: xscvdpsxds 0, 1 +; CHECK-PWR8-NEXT: stxsdx 0, 0, 4 +; CHECK-PWR8-NEXT: stxsdx 0, 0, 5 +; CHECK-PWR8-NEXT: stxsdx 0, 0, 6 +; CHECK-PWR8-NEXT: blr +entry: + %conv1 = fptosi double %m to i64 + store i64 %conv1, ptr %addr1, align 8 + store i64 %conv1, ptr %addr2, align 8 + store i64 %conv1, ptr %addr3, align 8 + ret void +} + +define void @multiple_store_32(double %m, ptr %addr1, ptr %addr2, ptr %addr3) { +; CHECK-LABEL: multiple_store_32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpsxws 0, 1 +; CHECK-NEXT: stfiwx 0, 0, 4 +; CHECK-NEXT: stfiwx 0, 0, 5 +; CHECK-NEXT: stfiwx 0, 0, 6 +; CHECK-NEXT: blr +; +; CHECK-PWR8-LABEL: multiple_store_32: +; CHECK-PWR8: # %bb.0: # %entry +; CHECK-PWR8-NEXT: xscvdpsxws 0, 1 +; CHECK-PWR8-NEXT: stfiwx 0, 0, 4 +; CHECK-PWR8-NEXT: stfiwx 0, 0, 5 +; CHECK-PWR8-NEXT: stfiwx 0, 0, 6 +; CHECK-PWR8-NEXT: blr +entry: + %conv1 = fptosi double %m to i32 + store i32 %conv1, ptr %addr1, align 8 + store i32 %conv1, ptr %addr2, align 8 + store i32 %conv1, ptr %addr3, align 8 + ret void +} + +define void @multiple_store_16(double %m, ptr %addr1, ptr %addr2, ptr %addr3) { +; CHECK-LABEL: multiple_store_16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpsxds 0, 1 +; CHECK-NEXT: stxsihx 0, 0, 4 +; CHECK-NEXT: stxsihx 0, 0, 5 +; CHECK-NEXT: stxsihx 0, 0, 6 +; CHECK-NEXT: blr +; +; CHECK-PWR8-LABEL: multiple_store_16: +; CHECK-PWR8: # %bb.0: # %entry +; CHECK-PWR8-NEXT: xscvdpsxws 0, 1 +; CHECK-PWR8-NEXT: mffprwz 3, 0 +; CHECK-PWR8-NEXT: sth 3, 0(4) +; CHECK-PWR8-NEXT: sth 3, 0(5) +; CHECK-PWR8-NEXT: sth 3, 0(6) +; CHECK-PWR8-NEXT: blr +entry: + %conv1 = fptosi double %m to i16 + store i16 %conv1, ptr %addr1, align 8 + store i16 %conv1, ptr %addr2, align 8 + store i16 %conv1, ptr %addr3, align 8 + ret void +} diff --git a/llvm/test/CodeGen/PowerPC/vsx-partword-int-loads-and-stores.ll b/llvm/test/CodeGen/PowerPC/vsx-partword-int-loads-and-stores.ll --- a/llvm/test/CodeGen/PowerPC/vsx-partword-int-loads-and-stores.ll +++ b/llvm/test/CodeGen/PowerPC/vsx-partword-int-loads-and-stores.ll @@ -630,10 +630,10 @@ store i8 %conv, ptr %ptr, align 1 ret void ; CHECK-LABEL: storefsc -; CHECK: xscvdpsxws 0, 1 +; CHECK: xscvdpsxds 0, 1 ; CHECK: stxsibx 0, 0, 4 ; CHECK-BE-LABEL: storefsc -; CHECK-BE: xscvdpsxws 0, 1 +; CHECK-BE: xscvdpsxds 0, 1 ; CHECK-BE: stxsibx 0, 0, 4 } @@ -644,10 +644,10 @@ store i8 %conv, ptr %ptr, align 1 ret void ; CHECK-LABEL: storedsc -; CHECK: xscvdpsxws 0, 1 +; CHECK: xscvdpsxds 0, 1 ; CHECK: stxsibx 0, 0, 4 ; CHECK-BE-LABEL: storedsc -; CHECK-BE: xscvdpsxws 0, 1 +; CHECK-BE: xscvdpsxds 0, 1 ; CHECK-BE: stxsibx 0, 0, 4 } @@ -880,10 +880,10 @@ store i16 %conv, ptr %ptr, align 2 ret void ; CHECK-LABEL: storefss -; CHECK: xscvdpsxws 0, 1 +; CHECK: xscvdpsxds 0, 1 ; CHECK: stxsihx 0, 0, 4 ; CHECK-BE-LABEL: storefss -; CHECK-BE: xscvdpsxws 0, 1 +; CHECK-BE: xscvdpsxds 0, 1 ; CHECK-BE: stxsihx 0, 0, 4 } @@ -894,10 +894,10 @@ store i16 %conv, ptr %ptr, align 2 ret void ; CHECK-LABEL: storedss -; CHECK: xscvdpsxws 0, 1 +; CHECK: xscvdpsxds 0, 1 ; CHECK: stxsihx 0, 0, 4 ; CHECK-BE-LABEL: storedss -; CHECK-BE: xscvdpsxws 0, 1 +; CHECK-BE: xscvdpsxds 0, 1 ; CHECK-BE: stxsihx 0, 0, 4 }