diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -34126,8 +34126,8 @@
     MVT SplitVT = N->getSimpleValueType(0);
     assert(SplitVT == MVT::f16 &&
            "Unexpected Value type of EXTRACT_VECTOR_ELT!");
-    assert(Subtarget.HasFP16() && "Expected FP16") SDValue VecOp =
-        N->getOperand(0);
+    assert(Subtarget.HasFP16() && "Expected FP16");
+    SDValue VecOp = N->getOperand(0);
     MVT ExtVT =
         MVT::getVectorVT(MVT::i16, VecOp.getValueType().getVectorNumElements());
     SDValue Split = DAG.getBitcast(ExtVT, N->getOperand(0));