diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -2212,7 +2212,7 @@ let ret = dst#args#" $dpp8$fi"; } -class getAsmVOP3DPPBase { @@ -2244,7 +2244,7 @@ string clamp = !if(HasClamp, "$clamp", ""); string omod = !if(HasOMod, "$omod", ""); - string ret = dst#", "#src0#src1#src2#opsel#3PMods#clamp#omod; + string ret = dst#!if(!gt(NumSrcArgs,0),", "#src0#src1#src2#opsel#3PMods#clamp#omod, ""); } @@ -2571,26 +2571,26 @@ field string Asm32 = getAsm32.ret; - field string Asm64 = getAsm64.ret; - field string AsmVOP3P = getAsmVOP3P.ret; - field string AsmVOP3OpSel = getAsmVOP3OpSel.ret; field string AsmDPP = !if(HasExtDPP, getAsmDPP.ret, ""); field string AsmDPP16 = getAsmDPP16.ret; // DPP8 encoding has no fields for modifiers, and it is enforced by setting // the asm operand name via this HasModifiers flag field string AsmDPP8 = getAsmDPP8.ret; - field string AsmVOP3DPPBase = getAsmVOP3DPPBase.ret; - field string AsmVOP3DPP = getAsmVOP3DPP.ret; - field string AsmVOP3DPP16 = getAsmVOP3DPP16.ret; - field string AsmVOP3DPP8 = getAsmVOP3DPP8.ret; + field string Asm64 = AsmVOP3Base; + field string AsmVOP3P = getAsmVOP3P.ret; + field string AsmVOP3OpSel = getAsmVOP3OpSel.ret; + field string AsmVOP3DPP = getAsmVOP3DPP.ret; + field string AsmVOP3DPP16 = getAsmVOP3DPP16.ret; + field string AsmVOP3DPP8 = getAsmVOP3DPP8.ret; field string AsmSDWA = getAsmSDWA.ret; field string AsmSDWA9 = getAsmSDWA9.ret; field string AsmVOPDX = getAsmVOPDPart.ret; diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td --- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td @@ -163,8 +163,7 @@ let Ins64 = (ins Src0RC64:$src0, clampmod:$clamp, omod:$omod); let InsVOP3Base = (ins Src0VOP3DPP:$src0, clampmod:$clamp, omod:$omod); - let Asm64 = "$vdst, $src0$clamp$omod"; - let AsmVOP3DPPBase = Asm64; + let AsmVOP3Base = "$vdst, $src0$clamp$omod"; let HasModifiers = 0; let HasClamp = 1; @@ -175,8 +174,7 @@ let Ins64 = (ins Src0RC64:$src0, clampmod:$clamp, omod:$omod); let InsVOP3Base = (ins Src0VOP3DPP:$src0, clampmod:$clamp, omod:$omod); - let Asm64 = "$vdst, $src0$clamp$omod"; - let AsmVOP3DPPBase = Asm64; + let AsmVOP3Base = "$vdst, $src0$clamp$omod"; let HasModifiers = 0; let HasClamp = 1; @@ -382,7 +380,6 @@ let Ins32 = (ins Src0RC32:$vdst, Src1RC:$src0); let Ins64 = (ins Src0RC64:$vdst, Src1RC:$src0); let Asm32 = getAsm32<1, 1>.ret; - let Asm64 = getAsm64<1, 1, 0, 0, 1>.ret; let OutsSDWA = (outs Src0RC32:$vdst); let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, @@ -403,8 +400,8 @@ let InsVOP3DPP16 = getInsVOP3DPP16.ret; let InsVOP3DPP8 = getInsVOP3DPP8.ret; - let AsmVOP3DPPBase = - getAsmVOP3DPPBase.ret; diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -448,14 +448,13 @@ dst_sel:$dst_sel, dst_unused:$dst_unused, src0_sel:$src0_sel, src1_sel:$src1_sel); let Asm32 = getAsm32<1, 2, vt0>.ret; - let Asm64 = getAsm64<1, 2, 0, HasModifiers, HasOMod, vt0>.ret; let AsmDPP = getAsmDPP<1, 2, HasModifiers, vt0>.ret; let AsmDPP16 = getAsmDPP16<1, 2, HasModifiers, vt0>.ret; let AsmDPP8 = getAsmDPP8<1, 2, 0, vt0>.ret; let AsmSDWA = getAsmSDWA<1, 2, vt0>.ret; let AsmSDWA9 = getAsmSDWA9<1, 1, 2, vt0>.ret; - let AsmVOP3DPPBase = - getAsmVOP3DPPBase<2 /*NumSrcArgs*/, HasDst, HasClamp, + let AsmVOP3Base = + getAsmVOP3Base<2 /*NumSrcArgs*/, HasDst, HasClamp, HasOpSel, HasOMod, IsVOP3P, HasModifiers, HasModifiers, HasModifiers, 0 /*Src2HasMods*/, DstVT>.ret; @@ -535,13 +534,12 @@ // Write out to vcc or arbitrary SGPR. def VOP2b_I32_I1_I32_I32 : VOPProfile<[i32, i32, i32, untyped], /*EnableClamp=*/1> { let Asm32 = "$vdst, vcc, $src0, $src1"; - let Asm64 = "$vdst, $sdst, $src0, $src1$clamp"; + let AsmVOP3Base = "$vdst, $sdst, $src0, $src1$clamp"; let AsmSDWA = "$vdst, vcc, $src0_modifiers, $src1_modifiers$clamp $dst_sel $dst_unused $src0_sel $src1_sel"; let AsmSDWA9 = "$vdst, vcc, $src0_modifiers, $src1_modifiers$clamp $dst_sel $dst_unused $src0_sel $src1_sel"; let AsmDPP = "$vdst, vcc, $src0, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl"; let AsmDPP8 = "$vdst, vcc, $src0, $src1 $dpp8$fi"; let AsmDPP16 = AsmDPP#"$fi"; - let AsmVOP3DPPBase = Asm64; let InsDPP = (ins DstRCDPP:$old, Src0DPP:$src0, Src1DPP:$src1, @@ -563,7 +561,6 @@ def VOP2b_I32_I1_I32_I32_I1 : VOPProfile<[i32, i32, i32, i1], /*EnableClamp=*/1> { let HasSrc2Mods = 0; let Asm32 = "$vdst, vcc, $src0, $src1, vcc"; - let Asm64 = "$vdst, $sdst, $src0, $src1, $src2$clamp"; let AsmSDWA = "$vdst, vcc, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_sel $src1_sel"; let AsmSDWA9 = "$vdst, vcc, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_sel $src1_sel"; let AsmDPP = "$vdst, vcc, $src0, $src1, vcc $dpp_ctrl$row_mask$bank_mask$bound_ctrl"; @@ -571,7 +568,7 @@ let AsmDPP16 = AsmDPP#"$fi"; let Outs32 = (outs DstRC:$vdst); let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst); - let AsmVOP3DPPBase = Asm64; + let AsmVOP3Base = "$vdst, $sdst, $src0, $src1, $src2$clamp"; let OutsVOP3DPP = Outs64; let OutsVOP3DPP8 = Outs64; @@ -606,13 +603,12 @@ // Read in from vcc or arbitrary SGPR. class VOP2e_SGPR ArgVT> : VOPProfile { let Asm32 = "$vdst, $src0, $src1"; - let Asm64 = "$vdst, $src0_modifiers, $src1_modifiers, $src2"; let AsmSDWA = "$vdst, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_sel $src1_sel"; let AsmSDWA9 = "$vdst, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_sel $src1_sel"; let AsmDPP = "$vdst, $src0_modifiers, $src1_modifiers, vcc $dpp_ctrl$row_mask$bank_mask$bound_ctrl"; let AsmDPP8 = "$vdst, $src0, $src1, vcc $dpp8$fi"; let AsmDPP16 = AsmDPP#"$fi"; - let AsmVOP3DPPBase = Asm64; + let AsmVOP3Base = "$vdst, $src0_modifiers, $src1_modifiers, $src2"; let Outs32 = (outs DstRC:$vdst); let Outs64 = (outs DstRC:$vdst); diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td --- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td @@ -17,7 +17,7 @@ // We do not want to print src modifiers for vop3p because the bits are // overloaded in meaning and the logic in printOperandAndFPInputMods is // wrong for vop3p - let AsmVOP3DPPBase = AsmVOP3P; + let AsmVOP3Base = AsmVOP3P; } // Used for FMA_MIX* and MAD_MIX* insts @@ -50,9 +50,8 @@ // due to the logic in class VOP3_Pseudo let Ins64 = !con(srcs, mods); let InsVOP3Base = !con(dpp_srcs, mods); - let Asm64 = + let AsmVOP3Base = "$vdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$op_sel$op_sel_hi$clamp"; - let AsmVOP3DPPBase = Asm64; } multiclass VOP3PInst.ret, "$src0_modifiers, $src1_modifiers$clamp", + let AsmVOP3Base = !if(isFloatType.ret, "$src0_modifiers, $src1_modifiers$clamp", "$src0, $src1"); - let AsmVOP3DPPBase = Asm64; let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; let EmitDst = 0; } @@ -774,8 +773,7 @@ dag InsPartVOP3DPP = (ins FPVRegInputMods:$src0_modifiers, VGPRSrc_32:$src0, VGPRSrc_32:$src1); let InsVOP3Base = !con(InsPartVOP3DPP, !if(HasOpSel, (ins op_sel0:$op_sel), (ins))); - let Asm64 = "$sdst, $src0_modifiers, $src1"; - let AsmVOP3DPPBase = Asm64; + let AsmVOP3Base = "$sdst, $src0_modifiers, $src1"; let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, @@ -809,8 +807,7 @@ let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, src0_sel:$src0_sel, src1_sel:$src1_sel); - let Asm64 = "$src0_modifiers, $src1"; - let AsmVOP3DPPBase = Asm64; + let AsmVOP3Base = "$src0_modifiers, $src1"; let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; let EmitDst = 0; }