Index: llvm/lib/IR/Instruction.cpp =================================================================== --- llvm/lib/IR/Instruction.cpp +++ llvm/lib/IR/Instruction.cpp @@ -44,18 +44,6 @@ Instruction::~Instruction() { assert(!Parent && "Instruction still linked in the program!"); - // Replace any extant metadata uses of this instruction with undef to - // preserve debug info accuracy. Some alternatives include: - // - Treat Instruction like any other Value, and point its extant metadata - // uses to an empty ValueAsMetadata node. This makes extant dbg.value uses - // trivially dead (i.e. fair game for deletion in many passes), leading to - // stale dbg.values being in effect for too long. - // - Call salvageDebugInfoOrMarkUndef. Not needed to make instruction removal - // correct. OTOH results in wasted work in some common cases (e.g. when all - // instructions in a BasicBlock are deleted). - if (isUsedByMetadata()) - ValueAsMetadata::handleRAUW(this, UndefValue::get(getType())); - // Explicitly remove DIAssignID metadata to clear up ID -> Instruction(s) // mapping in LLVMContext. setMetadata(LLVMContext::MD_DIAssignID, nullptr); Index: llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll @@ -8,14 +8,14 @@ ; CHECK: entry: ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a, metadata ![[B:[0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata ptr undef +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata !{} ; CHECK: if.then: ; CHECK-NEXT: %add = ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %add, metadata ![[B]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata ptr undef +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata !{} ; CHECK: if.else: ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 -1, metadata ![[B]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 -1, metadata ![[A]], {{.*}}, metadata ptr undef +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 -1, metadata ![[A]], {{.*}}, metadata !{} ; CHECK: if.end: ; CHECK-NEXT: %a.addr.0 = phi i32 ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a.addr.0, metadata ![[A]] Index: llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll @@ -8,10 +8,10 @@ ; CHECK: entry: ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a, metadata ![[B:[0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata ptr undef +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata !{} ; CHECK-NEXT: %add = ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %add, metadata ![[B]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata ptr undef +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %add, metadata ![[A]], {{.*}}, metadata !{} ; CHECK-DAG: ![[A]] = !DILocalVariable(name: "a", ; CHECK-DAG: ![[B]] = !DILocalVariable(name: "b", Index: llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll @@ -7,7 +7,7 @@ ; CHECK: entry: ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a, metadata ![[B:[0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata ptr undef +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %a, metadata ![[A:[0-9]+]], {{.*}}, metadata !{} ; CHECK-NEXT: ret ; CHECK-DAG: ![[A]] = !DILocalVariable(name: "a", Index: llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll @@ -22,11 +22,11 @@ ;; Test that dbg.assigns linked to the the scalar stores to quad get linked to ;; the vector store that replaces them. -; CHECK: call void @llvm.dbg.assign(metadata float undef, metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32), metadata ![[ID:[0-9]+]], metadata ptr %arrayidx, metadata !DIExpression()) -; CHECK: call void @llvm.dbg.assign(metadata float undef, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 32, 32), metadata ![[ID]], metadata ptr %quad, metadata !DIExpression(DW_OP_plus_uconst, 4)) -; CHECK: call void @llvm.dbg.assign(metadata float undef, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 32), metadata ![[ID]], metadata ptr %quad, metadata !DIExpression(DW_OP_plus_uconst, 8)) +; CHECK: call void @llvm.dbg.assign(metadata !{}, metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32), metadata ![[ID:[0-9]+]], metadata ptr %arrayidx, metadata !DIExpression()) +; CHECK: call void @llvm.dbg.assign(metadata !{}, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 32, 32), metadata ![[ID]], metadata ptr %quad, metadata !DIExpression(DW_OP_plus_uconst, 4)) +; CHECK: call void @llvm.dbg.assign(metadata !{}, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 32), metadata ![[ID]], metadata ptr %quad, metadata !DIExpression(DW_OP_plus_uconst, 8)) ; CHECK: store <4 x float> {{.*}} !DIAssignID ![[ID]] -; CHECK: call void @llvm.dbg.assign(metadata float undef, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata ![[ID]], metadata ptr %quad, metadata !DIExpression(DW_OP_plus_uconst, 12)) +; CHECK: call void @llvm.dbg.assign(metadata !{}, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata ![[ID]], metadata ptr %quad, metadata !DIExpression(DW_OP_plus_uconst, 12)) target triple = "x86_64-unknown-unknown" Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll @@ -28,7 +28,7 @@ ;; ;; $ clang test.c -Xclang -fexperimental-assignment-tracking -O2 -g -; CHECK: call void @llvm.dbg.assign(metadata i1 undef, metadata !{{.+}}, metadata !DIExpression(), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg ![[DBG:[0-9]+]] +; CHECK: call void @llvm.dbg.assign(metadata i1 undef, metadata !{{.+}}, metadata !DIExpression(), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ![[DBG:[0-9]+]] ; CHECK-DAG: ![[DBG]] = !DILocation(line: 0, scope: ![[INL_SC:[0-9]+]], inlinedAt: ![[IA:[0-9]+]]) ; CHECK-DAG: ![[IA]] = distinct !DILocation(line: 21, column: 12, scope: ![[SC:[0-9]+]]) Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll @@ -16,8 +16,8 @@ ;; dbg.assigns for the split (then promoted) stores. ; CHECK: %c.coerce.fca.0.extract = extractvalue [2 x i64] %c.coerce, 0 ; CHECK: %c.coerce.fca.1.extract = extractvalue [2 x i64] %c.coerce, 1 -; CHECK: call void @llvm.dbg.assign(metadata i64 %c.coerce.fca.0.extract,{{.+}}, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64),{{.+}}, metadata ptr undef, metadata !DIExpression()) -; CHECK: call void @llvm.dbg.assign(metadata i64 %c.coerce.fca.1.extract,{{.+}}, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64),{{.+}}, metadata ptr undef, {{.+}}) +; CHECK: call void @llvm.dbg.assign(metadata i64 %c.coerce.fca.0.extract,{{.+}}, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64),{{.+}}, metadata !{}, metadata !DIExpression()) +; CHECK: call void @llvm.dbg.assign(metadata i64 %c.coerce.fca.1.extract,{{.+}}, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64),{{.+}}, metadata !{}, {{.+}}) target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "armv7-apple-unknown" Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll @@ -21,8 +21,8 @@ ; CHECK: %call = call ; CHECK-NEXT: %0 = extractvalue { <2 x float>, <2 x float> } %call, 0 ; CHECK-NEXT: %1 = extractvalue { <2 x float>, <2 x float> } %call, 1 -; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %0, metadata ![[var:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 256, 64),{{.+}},{{.+}}undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %1, metadata ![[var]], metadata !DIExpression(DW_OP_LLVM_fragment, 320, 64),{{.+}},{{.+}}undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %0, metadata ![[var:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 256, 64),{{.+}}, metadata !{}, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %1, metadata ![[var]], metadata !DIExpression(DW_OP_LLVM_fragment, 320, 64),{{.+}}, metadata !{}, metadata !DIExpression()), !dbg %class.c = type { [4 x float] } Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll @@ -28,13 +28,13 @@ ; CHECK: if.then: ; CHECK-NEXT: %1 = load float -; CHECK-NEXT: call void @llvm.dbg.assign(metadata float %storemerge, metadata ![[var:[0-9]+]], metadata !DIExpression(), metadata ![[id:[0-9]+]], metadata ptr undef, metadata !DIExpression()), !dbg ![[dbg:[0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.assign(metadata float %storemerge, metadata ![[var:[0-9]+]], metadata !DIExpression(), metadata ![[id:[0-9]+]], metadata !{}, metadata !DIExpression()), !dbg ![[dbg:[0-9]+]] ; CHECK: if.else: ; CHECK-NEXT: %2 = load float ; CHECK-NEXT: %3 = load float ; CHECK-NEXT: %div = fdiv float -; CHECK: call void @llvm.dbg.assign(metadata float %storemerge, metadata ![[var]], metadata !DIExpression(), metadata ![[id]], metadata ptr undef, metadata !DIExpression()), !dbg ![[dbg]] +; CHECK: call void @llvm.dbg.assign(metadata float %storemerge, metadata ![[var]], metadata !DIExpression(), metadata ![[id]], metadata !{}, metadata !DIExpression()), !dbg ![[dbg]] %class.a = type { i8 } Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll @@ -26,10 +26,10 @@ ;; Split alloca. ; CHECK: entry: ; CHECK-NEXT: %To.sroa.0 = alloca { i32, i32, i32 }, align 8, !DIAssignID ![[ID_1:[0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata {{.+}} undef, metadata ![[TO:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_1]], metadata ptr %To.sroa.0, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[TO:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_1]], metadata ptr %To.sroa.0, metadata !DIExpression()), !dbg ; CHECK-NEXT: %To.sroa.4 = alloca { i32, i32, i32 }, align 8, !DIAssignID ![[ID_3:[0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.assign(metadata {{.+}} undef, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_3]], metadata ptr %To.sroa.4, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_3]], metadata ptr %To.sroa.4, metadata !DIExpression()), !dbg ;; Split memcpy. ; CHECK: call void @llvm.memcpy{{.*}}(ptr align 8 %To.sroa.0, ptr align 4 @From, i64 12, i1 false),{{.*}}!DIAssignID ![[ID_4:[0-9]+]] @@ -38,9 +38,9 @@ ; CHECK: call void @llvm.memcpy{{.*}}(ptr align 8 %To.sroa.4, ptr align 4 getelementptr inbounds (i8, ptr @From, i64 16), i64 12, i1 false){{.*}}!DIAssignID ![[ID_6:[0-9]+]] ;; Intrinsics for the splits above. -; CHECK-NEXT: call void @llvm.dbg.assign(metadata {{.+}} undef, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_4]], metadata ptr %To.sroa.0, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %To.sroa.3.0.copyload, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata {{.+}} undef, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_6]], metadata ptr %To.sroa.4, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_4]], metadata ptr %To.sroa.0, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %To.sroa.3.0.copyload, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata ![[TO]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_6]], metadata ptr %To.sroa.4, metadata !DIExpression()), !dbg target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll @@ -37,12 +37,12 @@ ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_5]], metadata ptr %S.sroa.0, metadata !DIExpression()), !dbg ;; Check the middle slice (no memset) gets a correct dbg.assign. -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_6]], metadata ptr %S.sroa.5, metadata !DIExpression()), !dbg ;; mem2reg promotes the load/store to the middle slice created by SROA: ; CHECK-NEXT: %0 = load i32, ptr @Glob, align 4, !dbg !{{.+}} -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata ![[ID_4:[0-9]+]], metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata ![[ID_4:[0-9]+]], metadata !{}, metadata !DIExpression()), !dbg target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll @@ -40,13 +40,13 @@ ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 96), metadata ![[ID_4]], metadata ptr %S.sroa.0, metadata !DIExpression()), !dbg ;; This is the one we care about most in this test: check that a memset->store ;; gets a correct dbg.assign. -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ; CHECK-NEXT: call void @llvm.dbg.assign(metadata i8 0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 96), metadata ![[ID_5]], metadata ptr %S.sroa.6, metadata !DIExpression()), !dbg ;; The load from global+store becomes a load. ;; FIXME: In reality it is actually stored again later on. ; CHECK-NEXT: %0 = load i32, ptr @Glob, align 4, !dbg !{{.+}} -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg ! +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i32 %0, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ! target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll @@ -7,7 +7,7 @@ ;; Check that migrateDebugInfo doesn't crash when encountering an alloca for a ;; variable with a type of unspecified size (e.g. DW_TAG_unspecified_type). -; CHECK: @llvm.dbg.assign(metadata ptr %0,{{.+}}, metadata !DIExpression(),{{.+}}, metadata ptr undef, {{.+}}) +; CHECK: @llvm.dbg.assign(metadata ptr %0,{{.+}}, metadata !DIExpression(),{{.+}}, metadata !{} ;; There should be no new fragment and the value component should remain as %0. define dso_local void @_Z3funDn(ptr %0) #0 !dbg !14 { Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll @@ -23,12 +23,12 @@ ;; Allocas have been promoted - the linked dbg.assigns have been removed. ;; | V3i point = {0, 0, 0}; -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 0, metadata ![[point:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 0, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 0, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 0, metadata ![[point:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 0, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 0, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ;; point.z = 5000; -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 5000, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 5000, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ;; | V3i other = {10, 9, 8}; ;; other is global const: @@ -38,17 +38,17 @@ ; CHECK-NEXT: %other.sroa.0.0.copyload = load i64, ptr @__const._Z3funv.other ; CHECK-NEXT: %other.sroa.4.0.copyload = load i64, ptr getelementptr inbounds (i8, ptr @__const._Z3funv.other, i64 8) ; CHECK-NEXT: %other.sroa.5.0.copyload = load i64, ptr getelementptr inbounds (i8, ptr @__const._Z3funv.other, i64 16) -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.0.0.copyload, metadata ![[other:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.4.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.5.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.0.0.copyload, metadata ![[other:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.4.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.5.0.copyload, metadata ![[other]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ;; | std::memcpy(&point.y, &other.x, sizeof(long) * 2); ;; other is now 3 scalars: ;; point.y = other.x -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.0.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.0.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ;; ;; point.z = other.y -; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.4.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata i64 %other.sroa.4.0.copyload, metadata ![[point]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64), metadata !{{.+}}, metadata !{}, metadata !DIExpression()), !dbg ; CHECK: ![[point]] = !DILocalVariable(name: "point", ; CHECK: ![[other]] = !DILocalVariable(name: "other", Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll @@ -18,9 +18,9 @@ ; CHECK: %call = call ; CHECK-NEXT: %0 = extractvalue { <2 x float>, <2 x float> } %call, 0 -; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %0, metadata ![[var:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata ![[id1:[0-9]+]],{{.+}} undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %0, metadata ![[var:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64), metadata ![[id1:[0-9]+]], metadata !{}, metadata !DIExpression()), !dbg ; CHECK-NEXT: %1 = extractvalue { <2 x float>, <2 x float> } %call, 1 -; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %1, metadata ![[var]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata ![[id2:[0-9]+]], {{.+}} undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata <2 x float> %1, metadata ![[var]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64), metadata ![[id2:[0-9]+]], metadata !{}, metadata !DIExpression()), !dbg %class.c = type { i8 } %class.a = type { [4 x float] } Index: llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll =================================================================== --- llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll +++ llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll @@ -31,7 +31,7 @@ ; CHECK-NEXT: dbg.value ; CHECK-NEXT: dbg.assign ; CHECK-NEXT: dbg.assign -; CHECK-NEXT: call void @llvm.dbg.assign(metadata float %2,{{.+}}, metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32),{{.+}}, metadata ptr undef, metadata !DIExpression()), !dbg +; CHECK-NEXT: call void @llvm.dbg.assign(metadata float %2,{{.+}}, metadata !DIExpression(DW_OP_LLVM_fragment, 96, 32),{{.+}}, metadata !{}, metadata !DIExpression()), !dbg %class.d = type { %class.a } %class.a = type { [4 x float] } Index: llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-di.ll =================================================================== --- llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-di.ll +++ llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-di.ll @@ -13,8 +13,8 @@ ; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 [[I:%.*]], metadata [[META19:![0-9]+]], metadata !DIExpression()), !dbg [[DBG24:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.value(metadata ptr [[P:%.*]], metadata [[META20:![0-9]+]], metadata !DIExpression()), !dbg [[DBG25:![0-9]+]] ; CHECK-NEXT: [[X1:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[P]], i64 [[N]], i32 0, !dbg [[DBG26:![0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 undef, metadata [[META21:![0-9]+]], metadata !DIExpression()), !dbg [[DBG27:![0-9]+]] -; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 undef, metadata [[META22:![0-9]+]], metadata !DIExpression()), !dbg [[DBG28:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.value(metadata !{}, metadata [[META21:![0-9]+]], metadata !DIExpression()), !dbg [[DBG27:![0-9]+]] +; CHECK-NEXT: call void @llvm.dbg.value(metadata !{}, metadata [[META22:![0-9]+]], metadata !DIExpression()), !dbg [[DBG28:![0-9]+]] ; CHECK-NEXT: [[X5:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[P]], i64 [[I]], i32 0, !dbg [[DBG29:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[X1]], align 8, !dbg [[DBG26]], !tbaa [[TBAA30:![0-9]+]] ; CHECK-NEXT: store <2 x i64> [[TMP0]], ptr [[X5]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA30]] Index: llvm/test/Transforms/SROA/alignment.ll =================================================================== --- llvm/test/Transforms/SROA/alignment.ll +++ llvm/test/Transforms/SROA/alignment.ll @@ -98,7 +98,7 @@ ; ; CHECK-DEBUGLOC-LABEL: @PR13920( ; CHECK-DEBUGLOC-NEXT: entry: -; CHECK-DEBUGLOC-NEXT: call void @llvm.dbg.value(metadata ptr undef, metadata [[META37:![0-9]+]], metadata !DIExpression()), !dbg [[DBG38:![0-9]+]] +; CHECK-DEBUGLOC-NEXT: call void @llvm.dbg.value(metadata !{}, metadata [[META37:![0-9]+]], metadata !DIExpression()), !dbg [[DBG38:![0-9]+]] ; CHECK-DEBUGLOC-NEXT: [[AA_0_COPYLOAD:%.*]] = load <2 x i64>, ptr [[A:%.*]], align 2, !dbg [[DBG39:![0-9]+]] ; CHECK-DEBUGLOC-NEXT: store <2 x i64> [[AA_0_COPYLOAD]], ptr [[B:%.*]], align 2, !dbg [[DBG40:![0-9]+]] ; CHECK-DEBUGLOC-NEXT: ret void, !dbg [[DBG41:![0-9]+]] Index: llvm/test/Transforms/SafeStack/X86/debug-loc2.ll =================================================================== --- llvm/test/Transforms/SafeStack/X86/debug-loc2.ll +++ llvm/test/Transforms/SafeStack/X86/debug-loc2.ll @@ -15,11 +15,11 @@ %x2 = alloca i32, align 4 ; Unhandled dbg.value: expression does not start with OP_DW_deref -; CHECK: call void @llvm.dbg.value(metadata ptr undef, metadata !{{.*}}, metadata !{{.*}}) +; CHECK: call void @llvm.dbg.value(metadata !{}, metadata !{{.*}}, metadata !{{.*}}) tail call void @llvm.dbg.value(metadata ptr %x1, metadata !10, metadata !23), !dbg !16 ; Unhandled dbg.value: expression does not start with OP_DW_deref -; CHECK: call void @llvm.dbg.value(metadata ptr undef, metadata !{{.*}}, metadata !{{.*}}) +; CHECK: call void @llvm.dbg.value(metadata !{}, metadata !{{.*}}, metadata !{{.*}}) tail call void @llvm.dbg.value(metadata ptr %x1, metadata !10, metadata !24), !dbg !16 ; Supported dbg.value: rewritted based on the [[USP]] value. @@ -31,8 +31,8 @@ tail call void @llvm.dbg.value(metadata ptr %x1, metadata !10, metadata !15), !dbg !16 call void @capture(ptr nonnull %x1), !dbg !17 -; An extra non-dbg.value metadata use of %x2. Replaced with undef. -; CHECK: call void @llvm.random.metadata.use(metadata ptr undef +; An extra non-dbg.value metadata use of %x2. +; CHECK: call void @llvm.random.metadata.use(metadata !{} call void @llvm.random.metadata.use(metadata ptr %x2) ; CHECK: call void @llvm.dbg.value(metadata ptr %[[USP]], metadata ![[X2:.*]], metadata !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref)) Index: llvm/unittests/IR/DebugInfoTest.cpp =================================================================== --- llvm/unittests/IR/DebugInfoTest.cpp +++ llvm/unittests/IR/DebugInfoTest.cpp @@ -184,10 +184,10 @@ SmallVector DVIs; findDbgValues(DVIs, &I); - // Delete %b. The dbg.value should now point to undef. + // Delete %b. The dbg.value should now be a kill (i.e. no location). I.eraseFromParent(); EXPECT_EQ(DVIs[0]->getNumVariableLocationOps(), 1u); - EXPECT_TRUE(isa(DVIs[0]->getValue(0))); + EXPECT_TRUE(DVIs[0]->isKillLocation()); } TEST(DbgVariableIntrinsic, EmptyMDIsUndef) {