Index: autoconf/configure.ac
===================================================================
--- autoconf/configure.ac
+++ autoconf/configure.ac
@@ -431,6 +431,7 @@
   arm64*-*)               llvm_cv_target_arch="AArch64" ;;
   arm*-*)                 llvm_cv_target_arch="ARM" ;;
   aarch64*-*)             llvm_cv_target_arch="AArch64" ;;
+  avr-*)                  llvm_cv_target_arch="AVR" ;;
   mips-* | mips64-*)      llvm_cv_target_arch="Mips" ;;
   mipsel-* | mips64el-*)  llvm_cv_target_arch="Mips" ;;
   xcore-*)                llvm_cv_target_arch="XCore" ;;
@@ -468,6 +469,7 @@
   arm64*-*)               host_arch="AArch64" ;;
   arm*-*)                 host_arch="ARM" ;;
   aarch64*-*)             host_arch="AArch64" ;;
+  avr-*)                  host_arch="AVR" ;;
   mips-* | mips64-*)      host_arch="Mips" ;;
   mipsel-* | mips64el-*)  host_arch="Mips" ;;
   xcore-*)                host_arch="XCore" ;;
@@ -801,6 +803,7 @@
     PowerPC)     AC_SUBST(TARGET_HAS_JIT,1) ;;
     x86_64)      AC_SUBST(TARGET_HAS_JIT,1) ;;
     ARM)         AC_SUBST(TARGET_HAS_JIT,1) ;;
+    AVR)         AC_SUBST(TARGET_HAS_JIT,0) ;;
     Mips)        AC_SUBST(TARGET_HAS_JIT,1) ;;
     XCore)       AC_SUBST(TARGET_HAS_JIT,0) ;;
     MSP430)      AC_SUBST(TARGET_HAS_JIT,0) ;;
Index: configure
===================================================================
--- configure
+++ configure
@@ -4188,6 +4188,7 @@
   arm64*-*)               llvm_cv_target_arch="AArch64" ;;
   arm*-*)                 llvm_cv_target_arch="ARM" ;;
   aarch64*-*)             llvm_cv_target_arch="AArch64" ;;
+  avr-*)                  llvm_cv_target_arch="AVR" ;;
   mips-* | mips64-*)      llvm_cv_target_arch="Mips" ;;
   mipsel-* | mips64el-*)  llvm_cv_target_arch="Mips" ;;
   xcore-*)                llvm_cv_target_arch="XCore" ;;
@@ -4226,6 +4227,7 @@
   arm64*-*)               host_arch="AArch64" ;;
   arm*-*)                 host_arch="ARM" ;;
   aarch64*-*)             host_arch="AArch64" ;;
+  avr-*)                  host_arch="AVR" ;;
   mips-* | mips64-*)      host_arch="Mips" ;;
   mipsel-* | mips64el-*)  host_arch="Mips" ;;
   xcore-*)                host_arch="XCore" ;;
@@ -5148,6 +5150,8 @@
  ;;
     ARM)         TARGET_HAS_JIT=1
  ;;
+    AVR)         TARGET_HAS_JIT=0
+ ;;
     Mips)        TARGET_HAS_JIT=1
  ;;
     XCore)       TARGET_HAS_JIT=0
Index: lib/Target/AVR/AVRTargetMachine.cpp
===================================================================
--- /dev/null
+++ lib/Target/AVR/AVRTargetMachine.cpp
@@ -0,0 +1,4 @@
+
+extern "C" void LLVMInitializeAVRTarget() {
+
+}
Index: lib/Target/AVR/CMakeLists.txt
===================================================================
--- /dev/null
+++ lib/Target/AVR/CMakeLists.txt
@@ -0,0 +1,10 @@
+
+
+add_llvm_target(AVRCodeGen
+    AVRTargetMachine.cpp
+  )
+
+add_dependencies(LLVMAVRCodeGen intrinsics_gen)
+
+add_subdirectory(TargetInfo)
+
Index: lib/Target/AVR/LLVMBuild.txt
===================================================================
--- /dev/null
+++ lib/Target/AVR/LLVMBuild.txt
@@ -0,0 +1,33 @@
+;===- ./lib/Target/AVR/LLVMBuild.txt ---------------------------*- Conf -*--===;
+;
+;                     The LLVM Compiler Infrastructure
+;
+; This file is distributed under the University of Illinois Open Source
+; License. See LICENSE.TXT for details.
+;
+;===------------------------------------------------------------------------===;
+;
+; This is an LLVMBuild description file for the components in this subdirectory.
+;
+; For more information on the LLVMBuild system, please see:
+;
+;   http://llvm.org/docs/LLVMBuild.html
+;
+;===------------------------------------------------------------------------===;
+
+[common]
+subdirectories = TargetInfo
+
+[component_0]
+type = TargetGroup
+name = AVR
+parent = Target
+has_asmprinter = 0
+has_asmparser = 0
+
+[component_1]
+type = Library
+name = AVRCodeGen
+parent = AVR
+required_libraries = AsmPrinter CodeGen Core MC AVRInfo SelectionDAG Support Target
+add_to_library_groups = AVR
Index: lib/Target/AVR/Makefile
===================================================================
--- /dev/null
+++ lib/Target/AVR/Makefile
@@ -0,0 +1,19 @@
+##===- lib/Target/AVR/Makefile -----------------------------*- Makefile -*-===##
+#
+#                     The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+##===----------------------------------------------------------------------===##
+
+LEVEL = ../../..
+LIBRARYNAME = LLVMAVRCodeGen
+TARGET = AVR
+
+# Make sure that tblgen is run, first thing.
+BUILT_SOURCES =
+
+DIRS = TargetInfo
+
+include $(LEVEL)/Makefile.common
Index: lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
===================================================================
--- /dev/null
+++ lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
@@ -0,0 +1,25 @@
+//===-- AVRTargetInfo.cpp - AVR Target Implementation ---------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/IR/Module.h"
+#include "llvm/Support/TargetRegistry.h"
+
+namespace llvm {
+Target TheAVRTarget;
+}
+
+extern "C" void LLVMInitializeAVRTargetInfo() {
+  llvm::RegisterTarget<llvm::Triple::avr> X(
+      llvm::TheAVRTarget, "avr", "Atmel AVR Microcontroller");
+}
+
+// FIXME: Temporary stub - this function must be defined for linking
+// to succeed. Remove once this function is properly implemented.
+extern "C" void LLVMInitializeAVRTargetMC() {
+}
Index: lib/Target/AVR/TargetInfo/CMakeLists.txt
===================================================================
--- /dev/null
+++ lib/Target/AVR/TargetInfo/CMakeLists.txt
@@ -0,0 +1,7 @@
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/..
+                     ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+
+add_llvm_library(LLVMAVRInfo
+  AVRTargetInfo.cpp
+)
+
Index: lib/Target/AVR/TargetInfo/LLVMBuild.txt
===================================================================
--- /dev/null
+++ lib/Target/AVR/TargetInfo/LLVMBuild.txt
@@ -0,0 +1,23 @@
+;===- ./lib/Target/AVR/TargetInfo/LLVMBuild.txt ----------------*- Conf -*--===;
+;
+;                     The LLVM Compiler Infrastructure
+;
+; This file is distributed under the University of Illinois Open Source
+; License. See LICENSE.TXT for details.
+;
+;===------------------------------------------------------------------------===;
+;
+; This is an LLVMBuild description file for the components in this subdirectory.
+;
+; For more information on the LLVMBuild system, please see:
+;
+;   http://llvm.org/docs/LLVMBuild.html
+;
+;===------------------------------------------------------------------------===;
+
+[component_0]
+type = Library
+name = AVRInfo
+parent = AVR
+required_libraries = MC Support
+add_to_library_groups = AVR
\ No newline at end of file
Index: lib/Target/AVR/TargetInfo/Makefile
===================================================================
--- /dev/null
+++ lib/Target/AVR/TargetInfo/Makefile
@@ -0,0 +1,16 @@
+##===- lib/Target/AVR/TargetInfo/Makefile ------------------*- Makefile -*-===##
+#
+#                     The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+##===----------------------------------------------------------------------===##
+
+LEVEL = ../../../..
+LIBRARYNAME = LLVMAVRInfo
+
+# Hack: we need to include 'main' target directory to grab private headers
+CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
+
+include $(LEVEL)/Makefile.common
Index: lib/Target/LLVMBuild.txt
===================================================================
--- lib/Target/LLVMBuild.txt
+++ lib/Target/LLVMBuild.txt
@@ -22,6 +22,7 @@
  AMDGPU
  ARM
  AArch64
+ AVR
  BPF
  CppBackend
  Hexagon