diff --git a/llvm/include/llvm/PassSupport.h b/llvm/include/llvm/PassSupport.h --- a/llvm/include/llvm/PassSupport.h +++ b/llvm/include/llvm/PassSupport.h @@ -77,7 +77,22 @@ INITIALIZE_PASS_BEGIN(PassName, Arg, Name, Cfg, Analysis) \ PassName::registerOptions(); -template Pass *callDefaultCtor() { return new PassName(); } +template {}, + bool>::type = true> +Pass *callDefaultCtor() { + return new PassName(); +} + +template {}, + bool>::type = true> +Pass *callDefaultCtor() { + // Some codegen passes should only be testable via + // `llc -{start|stop}-{before|after}=`, not via `opt -`. + llvm_unreachable("Pass non-default constructible"); + return nullptr; +} //===--------------------------------------------------------------------------- /// RegisterPass template - This template class is used to notify the system diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -46,9 +46,11 @@ public: static char ID; - explicit AArch64DAGToDAGISel(AArch64TargetMachine *tm = nullptr, - CodeGenOpt::Level OptLevel = CodeGenOpt::Default) - : SelectionDAGISel(ID, *tm, OptLevel), Subtarget(nullptr) {} + AArch64DAGToDAGISel() = delete; + + explicit AArch64DAGToDAGISel(AArch64TargetMachine &tm, + CodeGenOpt::Level OptLevel) + : SelectionDAGISel(ID, tm, OptLevel), Subtarget(nullptr) {} StringRef getPassName() const override { return PASS_NAME; } @@ -5546,7 +5548,7 @@ /// AArch64-specific DAG, ready for instruction scheduling. FunctionPass *llvm::createAArch64ISelDag(AArch64TargetMachine &TM, CodeGenOpt::Level OptLevel) { - return new AArch64DAGToDAGISel(&TM, OptLevel); + return new AArch64DAGToDAGISel(TM, OptLevel); } /// When \p PredVT is a scalable vector predicate in the form diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h --- a/llvm/lib/Target/AMDGPU/AMDGPU.h +++ b/llvm/lib/Target/AMDGPU/AMDGPU.h @@ -240,9 +240,8 @@ }; Pass *createAMDGPUStructurizeCFGPass(); -FunctionPass *createAMDGPUISelDag( - TargetMachine *TM = nullptr, - CodeGenOpt::Level OptLevel = CodeGenOpt::Default); +FunctionPass *createAMDGPUISelDag(TargetMachine &TM, + CodeGenOpt::Level OptLevel); ModulePass *createAMDGPUAlwaysInlinePass(bool GlobalOpt = true); struct AMDGPUAlwaysInlinePass : PassInfoMixin { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h @@ -93,8 +93,9 @@ public: static char ID; - explicit AMDGPUDAGToDAGISel(TargetMachine *TM = nullptr, - CodeGenOpt::Level OptLevel = CodeGenOpt::Default); + AMDGPUDAGToDAGISel() = delete; + + explicit AMDGPUDAGToDAGISel(TargetMachine &TM, CodeGenOpt::Level OptLevel); ~AMDGPUDAGToDAGISel() override = default; void getAnalysisUsage(AnalysisUsage &AU) const override; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp @@ -111,15 +111,14 @@ /// This pass converts a legalized DAG into a AMDGPU-specific // DAG, ready for instruction scheduling. -FunctionPass *llvm::createAMDGPUISelDag(TargetMachine *TM, +FunctionPass *llvm::createAMDGPUISelDag(TargetMachine &TM, CodeGenOpt::Level OptLevel) { return new AMDGPUDAGToDAGISel(TM, OptLevel); } -AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel( - TargetMachine *TM /*= nullptr*/, - CodeGenOpt::Level OptLevel /*= CodeGenOpt::Default*/) - : SelectionDAGISel(ID, *TM, OptLevel) { +AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(TargetMachine &TM, + CodeGenOpt::Level OptLevel) + : SelectionDAGISel(ID, TM, OptLevel) { EnableLateStructurizeCFG = AMDGPUTargetMachine::EnableLateStructurizeCFG; } diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -1068,7 +1068,7 @@ } bool AMDGPUPassConfig::addInstSelector() { - addPass(createAMDGPUISelDag(&getAMDGPUTargetMachine(), getOptLevel())); + addPass(createAMDGPUISelDag(getAMDGPUTargetMachine(), getOptLevel())); return false; } diff --git a/llvm/lib/Target/AMDGPU/R600.h b/llvm/lib/Target/AMDGPU/R600.h --- a/llvm/lib/Target/AMDGPU/R600.h +++ b/llvm/lib/Target/AMDGPU/R600.h @@ -27,7 +27,7 @@ FunctionPass *createR600Packetizer(); FunctionPass *createR600ControlFlowFinalizer(); FunctionPass *createR600MachineCFGStructurizerPass(); -FunctionPass *createR600ISelDag(TargetMachine *TM, CodeGenOpt::Level OptLevel); +FunctionPass *createR600ISelDag(TargetMachine &TM, CodeGenOpt::Level OptLevel); ModulePass *createR600OpenCLImageTypeLoweringPass(); void initializeR600ClauseMergePassPass(PassRegistry &); diff --git a/llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp --- a/llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp @@ -27,7 +27,9 @@ SDValue &Offset); public: - explicit R600DAGToDAGISel(TargetMachine *TM, CodeGenOpt::Level OptLevel) + R600DAGToDAGISel() = delete; + + explicit R600DAGToDAGISel(TargetMachine &TM, CodeGenOpt::Level OptLevel) : AMDGPUDAGToDAGISel(TM, OptLevel) {} void Select(SDNode *N) override; @@ -178,7 +180,7 @@ /// This pass converts a legalized DAG into a R600-specific // DAG, ready for instruction scheduling. -FunctionPass *llvm::createR600ISelDag(TargetMachine *TM, +FunctionPass *llvm::createR600ISelDag(TargetMachine &TM, CodeGenOpt::Level OptLevel) { return new R600DAGToDAGISel(TM, OptLevel); } diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp --- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp @@ -118,7 +118,7 @@ } bool R600PassConfig::addInstSelector() { - addPass(createR600ISelDag(&getAMDGPUTargetMachine(), getOptLevel())); + addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel())); return false; } diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -171,9 +171,10 @@ public: static char ID; - explicit X86DAGToDAGISel(X86TargetMachine *tm = nullptr, - CodeGenOpt::Level OptLevel = CodeGenOpt::Default) - : SelectionDAGISel(ID, *tm, OptLevel), Subtarget(nullptr), + X86DAGToDAGISel() = delete; + + explicit X86DAGToDAGISel(X86TargetMachine &tm, CodeGenOpt::Level OptLevel) + : SelectionDAGISel(ID, tm, OptLevel), Subtarget(nullptr), OptForMinSize(false), IndirectTlsSegRefs(false) {} StringRef getPassName() const override { return PASS_NAME; } @@ -6201,5 +6202,5 @@ /// ready for instruction scheduling. FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, CodeGenOpt::Level OptLevel) { - return new X86DAGToDAGISel(&TM, OptLevel); + return new X86DAGToDAGISel(TM, OptLevel); }