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AMDGPU: Hack for VS_32 register pressure
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Authored by arsenm on Oct 20 2015, 5:55 PM.

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tstellarAMD
Summary

For some reason VS_32 ends up factoring into the pressure heuristics
even though we should never see a virtual register with this class.

When SGPRs are reserved for register spilling, this for some reason
triggers reg-crit scheduling.

Setting isAllocatable = 0 may help with this since that seems to remove
it from the default implementation's generated table.

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Event Timeline

arsenm updated this revision to Diff 37954.Oct 20 2015, 5:55 PM
arsenm retitled this revision from to AMDGPU: Hack for VS_32 register pressure.
arsenm updated this object.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
tstellarAMD accepted this revision.Nov 6 2015, 8:41 AM
tstellarAMD edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Nov 6 2015, 8:41 AM
arsenm closed this revision.Nov 6 2015, 10:05 AM

r252321