Index: llvm/lib/Target/NVPTX/NVVMReflect.cpp
===================================================================
--- llvm/lib/Target/NVPTX/NVVMReflect.cpp
+++ llvm/lib/Target/NVPTX/NVVMReflect.cpp
@@ -40,6 +40,7 @@
 #include <sstream>
 #include <string>
 #define NVVM_REFLECT_FUNCTION "__nvvm_reflect"
+#define NVVM_REFLECT_OCL_FUNCTION "__nvvm_reflect_ocl"
 
 using namespace llvm;
 
@@ -78,7 +79,8 @@
   if (!NVVMReflectEnabled)
     return false;
 
-  if (F.getName() == NVVM_REFLECT_FUNCTION) {
+  if (F.getName() == NVVM_REFLECT_FUNCTION ||
+      F.getName() == NVVM_REFLECT_OCL_FUNCTION) {
     assert(F.isDeclaration() && "_reflect function should not have a body");
     assert(F.getReturnType()->isIntegerTy() &&
            "_reflect's return type should be integer");
@@ -119,6 +121,7 @@
       continue;
     Function *Callee = Call->getCalledFunction();
     if (!Callee || (Callee->getName() != NVVM_REFLECT_FUNCTION &&
+                    Callee->getName() != NVVM_REFLECT_OCL_FUNCTION &&
                     Callee->getIntrinsicID() != Intrinsic::nvvm_reflect))
       continue;
 
Index: llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
@@ -0,0 +1,20 @@
+; Verify that __nvvm_reflect_ocl() is replaced with an appropriate value
+;
+; RUN: opt %s -S -passes='default<O2>' -mtriple=nvptx64 \
+; RUN:   | FileCheck %s --check-prefixes=COMMON,SM20
+; RUN: opt %s -S -passes='default<O2>' -mtriple=nvptx64 -mcpu=sm_35 \
+; RUN:   | FileCheck %s --check-prefixes=COMMON,SM35
+
+@"$str" = private addrspace(4) constant [12 x i8] c"__CUDA_ARCH\00"
+
+declare i32 @__nvvm_reflect_ocl(i8 addrspace(4)* noundef) 
+
+; COMMON-LABEL: @foo
+define i32 @foo(float %a, float %b) {
+; COMMON-NOT: call i32 @__nvvm_reflect_ocl
+  %reflect = tail call i32 @__nvvm_reflect_ocl(i8 addrspace(4)* noundef getelementptr inbounds ([12 x i8], [12 x i8] addrspace(4)* @"$str", i64 0, i64 0))
+; SM20: ret i32 200  
+; SM35: ret i32 350  
+  ret i32 %reflect
+}
+