diff --git a/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll b/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
--- a/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
+++ b/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
@@ -9,7 +9,7 @@
 ; CHECK-LABEL: <test1>:
 ; CHECK-LABEL: <$d.1>:
 ; CHECK-LABEL: <$x.2>:
-; CHECK-NEXT:    b 0x2c <$x.4>
+; CHECK-NEXT:    b 0x2c <test1+0x2c>
 ; CHECK-LABEL: <$x.4>:
 ; CHECK-NEXT:    mov w0, wzr
 ; CHECK-NEXT:    ldr x30, [sp], #16
@@ -72,7 +72,7 @@
 ; CHECK-LABEL: <test3>:
 ; CHECK-LABEL: <$d.9>:
 ; CHECK-LABEL: <$x.10>:
-; CHECK-NEXT:    b {{.*}} <$x.12>
+; CHECK-NEXT:    b {{.*}} <test3+0x34>
 ; CHECK-LABEL: <$x.12>:
 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret
diff --git a/llvm/test/MC/ARM/branch-disassemble.s b/llvm/test/MC/ARM/branch-disassemble.s
--- a/llvm/test/MC/ARM/branch-disassemble.s
+++ b/llvm/test/MC/ARM/branch-disassemble.s
@@ -6,9 +6,10 @@
 @ RUN:   | llvm-objdump --no-print-imm-hex --mcpu=cortex-m3 --triple=thumbv7m-arm-none-eabi -d - \
 @ RUN:   | FileCheck %s -check-prefix CHECK-THUMB
 
+foo:
 b.w .Lbranch
-@ CHECK-ARM: b 0xc <$a.0+0xc> @ imm = #4
-@ CHECK-THUMB: b.w 0xc <$t.0+0xc> @ imm = #8
+@ CHECK-ARM: b 0xc <foo+0xc> @ imm = #4
+@ CHECK-THUMB: b.w 0xc <foo+0xc> @ imm = #8
 adds r0, r1, #42
 adds r1, r2, #42
 .Lbranch:
diff --git a/llvm/test/MC/Disassembler/ARM/mve-lol.txt b/llvm/test/MC/Disassembler/ARM/mve-lol.txt
--- a/llvm/test/MC/Disassembler/ARM/mve-lol.txt
+++ b/llvm/test/MC/Disassembler/ARM/mve-lol.txt
@@ -2,48 +2,49 @@
 # RUN:   llvm-objdump --no-print-imm-hex -d -r --triple=thumbv8.1m.main --mattr=+mve - | FileCheck %s
 
 # Test to check that we can evaluate branches and their targets, i.e.
-# checking that we see branch targets annotations like <$t.0+0xc> in the
+# checking that we see branch targets annotations like <foo+0xc> in the
 # disassembly.
 
-# CHECK:  wls lr, r3, 0xc <$t.0+0xc>          @ imm = #8
+foo:
+# CHECK:  wls lr, r3, 0xc <foo+0xc>          @ imm = #8
 # CHECK:  vmov  q0, q1
-# CHECK:  le  lr, 0x4 <$t.0+0x4>              @ imm = #-8
+# CHECK:  le  lr, 0x4 <foo+0x4>              @ imm = #-8
 
           wls lr, r3, #8
           vmov  q0, q1
           le  lr, #-8
 
 
-# CHECK:  wlstp.8 lr, r3, 0x18 <$t.0+0x18>    @ imm = #8
+# CHECK:  wlstp.8 lr, r3, 0x18 <foo+0x18>    @ imm = #8
 # CHECK:  vmov  q0, q1
-# CHECK:  letp  lr, 0x10 <$t.0+0x10>          @ imm = #-8
+# CHECK:  letp  lr, 0x10 <foo+0x10>          @ imm = #-8
 
           wlstp.8  lr, r3, #8
           vmov  q0, q1
           letp  lr, #-8
 
 
-# CHECK:  wlstp.16  lr, r3, 0x24 <$t.0+0x24>  @ imm = #8
+# CHECK:  wlstp.16  lr, r3, 0x24 <foo+0x24>  @ imm = #8
 # CHECK:  vmov  q0, q1
-# CHECK:  letp  lr, 0x1c <$t.0+0x1c>          @ imm = #-8
+# CHECK:  letp  lr, 0x1c <foo+0x1c>          @ imm = #-8
 
           wlstp.16  lr, r3, #8
           vmov  q0, q1
           letp  lr, #-8
 
 
-# CHECK:  wlstp.32  lr, r3, 0x30 <$t.0+0x30>  @ imm = #8
+# CHECK:  wlstp.32  lr, r3, 0x30 <foo+0x30>  @ imm = #8
 # CHECK:  vmov  q0, q1
-# CHECK:  letp  lr, 0x28 <$t.0+0x28>          @ imm = #-8
+# CHECK:  letp  lr, 0x28 <foo+0x28>          @ imm = #-8
 
           wlstp.32  lr, r3, #8
           vmov  q0, q1
           letp  lr, #-8
 
 
-# CHECK:  wlstp.64  lr, r3, 0x3c <$t.0+0x3c>  @ imm = #8
+# CHECK:  wlstp.64  lr, r3, 0x3c <foo+0x3c>  @ imm = #8
 # CHECK:  vmov  q0, q1
-# CHECK:  letp  lr, 0x34 <$t.0+0x34>          @ imm = #-8
+# CHECK:  letp  lr, 0x34 <foo+0x34>          @ imm = #-8
 
           wlstp.64  lr, r3, #8
           vmov  q0, q1
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -463,6 +463,11 @@
   return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ;
 }
 
+static bool isMappingSymbol(const SymbolInfoTy &Sym) {
+  return Sym.Name.startswith("$d") || Sym.Name.startswith("$x") ||
+         Sym.Name.startswith("$a") || Sym.Name.startswith("$t");
+}
+
 static void printRelocation(formatted_raw_ostream &OS, StringRef FileName,
                             const RelocationRef &Rel, uint64_t Address,
                             bool Is64Bits) {
@@ -1877,10 +1882,17 @@
                 auto It = llvm::partition_point(
                     *TargetSymbols,
                     [=](const SymbolInfoTy &O) { return O.Addr <= Target; });
-                if (It != TargetSymbols->begin()) {
-                  TargetSym = &*(It - 1);
-                  break;
+                while (It != TargetSymbols->begin()) {
+                  --It;
+                  // Skip mapping symbols to avoid possible ambiguity as they
+                  // do not allow uniquely identifying the target address.
+                  if (!hasMappingSymbols(Obj) || !isMappingSymbol(*It)) {
+                    TargetSym = &*It;
+                    break;
+                  }
                 }
+                if (TargetSym)
+                  break;
               }
 
               // Print the labels corresponding to the target if there's any.