diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp --- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp @@ -287,15 +287,22 @@ } if (!IsRVVSpill) { - // TODO: Consider always storing the low bits of the immediate in the - // offset so that large immediate is cheaper to materialize? - if (isInt<12>(Offset.getFixed())) { - MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset.getFixed()); - Offset = StackOffset::get(0, Offset.getScalable()); - } else { - // Since we're going to materialize the full offset below, clear the - // portion encoded in the immediate. + if (MI.getOpcode() == RISCV::ADDI && !isInt<12>(Offset.getFixed())) { + // We chose to emit the canonical immediate sequence rather than folding + // the offset into the using add under the theory that doing so doesn't + // save dynamic instruction count and some target may fuse the canonical + // 32 bit immediate sequence. We still need to clear the portion of the + // offset encoded in the immediate. MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0); + } else { + // We can encode an add with 12 bit signed immediate in the immediate + // operand of our user instruction. As a result, the remaining + // offset can by construction, at worst, a LUI and a ADD. + int64_t Val = Offset.getFixed(); + int64_t Lo12 = SignExtend64<12>(Val); + MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Lo12); + Offset = StackOffset::get((uint64_t)Val - (uint64_t)Lo12, + Offset.getScalable()); } } diff --git a/llvm/test/CodeGen/RISCV/branch-relaxation.ll b/llvm/test/CodeGen/RISCV/branch-relaxation.ll --- a/llvm/test/CodeGen/RISCV/branch-relaxation.ll +++ b/llvm/test/CodeGen/RISCV/branch-relaxation.ll @@ -964,16 +964,16 @@ ; CHECK-RV64-NEXT: li t5, 30 ; CHECK-RV64-NEXT: #NO_APP ; CHECK-RV64-NEXT: sd t0, 0(sp) -; CHECK-RV64-NEXT: addi t0, sp, 2047 -; CHECK-RV64-NEXT: addi t0, t0, 2041 -; CHECK-RV64-NEXT: sd t5, 0(t0) # 8-byte Folded Spill +; CHECK-RV64-NEXT: lui t0, 1 +; CHECK-RV64-NEXT: add t0, sp, t0 +; CHECK-RV64-NEXT: sd t5, -8(t0) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sext.w t5, t5 ; CHECK-RV64-NEXT: #APP ; CHECK-RV64-NEXT: li t6, 31 ; CHECK-RV64-NEXT: #NO_APP -; CHECK-RV64-NEXT: addi t0, sp, 2047 -; CHECK-RV64-NEXT: addi t0, t0, 2033 -; CHECK-RV64-NEXT: sd t6, 0(t0) # 8-byte Folded Spill +; CHECK-RV64-NEXT: lui t0, 1 +; CHECK-RV64-NEXT: add t0, sp, t0 +; CHECK-RV64-NEXT: sd t6, -16(t0) # 8-byte Folded Spill ; CHECK-RV64-NEXT: ld t0, 0(sp) ; CHECK-RV64-NEXT: sext.w t6, t6 ; CHECK-RV64-NEXT: beq t5, t6, .LBB3_1 @@ -1062,15 +1062,15 @@ ; CHECK-RV64-NEXT: #APP ; CHECK-RV64-NEXT: # reg use t4 ; CHECK-RV64-NEXT: #NO_APP -; CHECK-RV64-NEXT: addi a0, sp, 2047 -; CHECK-RV64-NEXT: addi a0, a0, 2041 -; CHECK-RV64-NEXT: ld t5, 0(a0) # 8-byte Folded Reload +; CHECK-RV64-NEXT: lui a0, 1 +; CHECK-RV64-NEXT: add a0, sp, a0 +; CHECK-RV64-NEXT: ld t5, -8(a0) # 8-byte Folded Reload ; CHECK-RV64-NEXT: #APP ; CHECK-RV64-NEXT: # reg use t5 ; CHECK-RV64-NEXT: #NO_APP -; CHECK-RV64-NEXT: addi a0, sp, 2047 -; CHECK-RV64-NEXT: addi a0, a0, 2033 -; CHECK-RV64-NEXT: ld t6, 0(a0) # 8-byte Folded Reload +; CHECK-RV64-NEXT: lui a0, 1 +; CHECK-RV64-NEXT: add a0, sp, a0 +; CHECK-RV64-NEXT: ld t6, -16(a0) # 8-byte Folded Reload ; CHECK-RV64-NEXT: #APP ; CHECK-RV64-NEXT: # reg use t6 ; CHECK-RV64-NEXT: #NO_APP @@ -1839,222 +1839,222 @@ ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li t0, 5 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2041 -; CHECK-RV32-NEXT: sw t0, 0(a0) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2045 -; CHECK-RV32-NEXT: sw t1, 0(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw t0, -8(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw t1, -4(a0) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li t1, 6 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2033 -; CHECK-RV32-NEXT: sw t1, 0(a0) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2037 -; CHECK-RV32-NEXT: sw t2, 0(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw t1, -16(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw t2, -12(a0) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li t2, 7 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2025 -; CHECK-RV32-NEXT: sw t2, 0(a0) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2029 -; CHECK-RV32-NEXT: sw t3, 0(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw t2, -24(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw t3, -20(a0) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s0, 8 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2017 -; CHECK-RV32-NEXT: sw s0, 0(a0) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2021 -; CHECK-RV32-NEXT: sw s1, 0(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw s0, -32(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw s1, -28(a0) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s1, 9 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2009 -; CHECK-RV32-NEXT: sw s1, 0(a0) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2013 -; CHECK-RV32-NEXT: sw s2, 0(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw s1, -40(a0) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: sw s2, -36(a0) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a0, 10 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a2, sp, 2047 -; CHECK-RV32-NEXT: addi a2, a2, 2005 -; CHECK-RV32-NEXT: sw a1, 0(a2) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a2, 1 +; CHECK-RV32-NEXT: add a2, sp, a2 +; CHECK-RV32-NEXT: sw a1, -44(a2) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a1, 11 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a3, sp, 2047 -; CHECK-RV32-NEXT: addi a3, a3, 1997 -; CHECK-RV32-NEXT: sw a1, 0(a3) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2001 -; CHECK-RV32-NEXT: sw a2, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a3, 1 +; CHECK-RV32-NEXT: add a3, sp, a3 +; CHECK-RV32-NEXT: sw a1, -52(a3) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a2, -48(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a2, 12 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1989 -; CHECK-RV32-NEXT: sw a2, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1993 -; CHECK-RV32-NEXT: sw a3, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a2, -60(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a3, -56(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a3, 13 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1981 -; CHECK-RV32-NEXT: sw a3, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1985 -; CHECK-RV32-NEXT: sw a4, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a3, -68(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a4, -64(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a4, 14 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1973 -; CHECK-RV32-NEXT: sw a4, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1977 -; CHECK-RV32-NEXT: sw a5, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a4, -76(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a5, -72(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a5, 15 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1965 -; CHECK-RV32-NEXT: sw a5, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1969 -; CHECK-RV32-NEXT: sw a6, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a5, -84(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a6, -80(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a6, 16 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1957 -; CHECK-RV32-NEXT: sw a6, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1961 -; CHECK-RV32-NEXT: sw a7, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a6, -92(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a7, -88(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li a7, 17 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1949 -; CHECK-RV32-NEXT: sw a7, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1953 -; CHECK-RV32-NEXT: sw t0, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw a7, -100(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw t0, -96(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s2, 18 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1941 -; CHECK-RV32-NEXT: sw s2, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1945 -; CHECK-RV32-NEXT: sw s3, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s2, -108(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s3, -104(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s3, 19 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1933 -; CHECK-RV32-NEXT: sw s3, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1937 -; CHECK-RV32-NEXT: sw s4, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s3, -116(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s4, -112(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s4, 20 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1925 -; CHECK-RV32-NEXT: sw s4, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1929 -; CHECK-RV32-NEXT: sw s5, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s4, -124(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s5, -120(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s5, 21 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1917 -; CHECK-RV32-NEXT: sw s5, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1921 -; CHECK-RV32-NEXT: sw s6, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s5, -132(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s6, -128(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s6, 22 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1909 -; CHECK-RV32-NEXT: sw s6, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1913 -; CHECK-RV32-NEXT: sw s7, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s6, -140(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s7, -136(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s7, 23 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1901 -; CHECK-RV32-NEXT: sw s7, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1905 -; CHECK-RV32-NEXT: sw s8, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s7, -148(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s8, -144(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s8, 24 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1893 -; CHECK-RV32-NEXT: sw s8, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1897 -; CHECK-RV32-NEXT: sw s9, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s8, -156(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s9, -152(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s9, 25 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1885 -; CHECK-RV32-NEXT: sw s9, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1889 -; CHECK-RV32-NEXT: sw s10, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s9, -164(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s10, -160(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s10, 26 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1877 -; CHECK-RV32-NEXT: sw s10, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1881 -; CHECK-RV32-NEXT: sw s11, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s10, -172(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s11, -168(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li s11, 27 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1873 -; CHECK-RV32-NEXT: sw s11, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw s11, -176(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li t3, 28 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1865 -; CHECK-RV32-NEXT: sw t3, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1869 -; CHECK-RV32-NEXT: sw t4, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw t3, -184(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw t4, -180(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li t4, 29 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1857 -; CHECK-RV32-NEXT: sw t4, 0(a1) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 1861 -; CHECK-RV32-NEXT: sw t5, 0(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw t4, -192(a1) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: sw t5, -188(a1) # 4-byte Folded Spill ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: li t5, 30 ; CHECK-RV32-NEXT: #NO_APP @@ -2064,16 +2064,16 @@ ; CHECK-RV32-NEXT: #NO_APP ; CHECK-RV32-NEXT: mv a2, t6 ; CHECK-RV32-NEXT: mv t6, a1 -; CHECK-RV32-NEXT: addi a3, sp, 2047 -; CHECK-RV32-NEXT: addi a3, a3, 1845 -; CHECK-RV32-NEXT: sw s0, 0(a3) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a3, 1 +; CHECK-RV32-NEXT: add a3, sp, a3 +; CHECK-RV32-NEXT: sw s0, -204(a3) # 4-byte Folded Spill ; CHECK-RV32-NEXT: xor a1, a1, s0 -; CHECK-RV32-NEXT: addi a3, sp, 2047 -; CHECK-RV32-NEXT: addi a3, a3, 1853 -; CHECK-RV32-NEXT: sw t5, 0(a3) # 4-byte Folded Spill -; CHECK-RV32-NEXT: addi a3, sp, 2047 -; CHECK-RV32-NEXT: addi a3, a3, 1849 -; CHECK-RV32-NEXT: sw a2, 0(a3) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a3, 1 +; CHECK-RV32-NEXT: add a3, sp, a3 +; CHECK-RV32-NEXT: sw t5, -196(a3) # 4-byte Folded Spill +; CHECK-RV32-NEXT: lui a3, 1 +; CHECK-RV32-NEXT: add a3, sp, a3 +; CHECK-RV32-NEXT: sw a2, -200(a3) # 4-byte Folded Spill ; CHECK-RV32-NEXT: xor a2, t5, a2 ; CHECK-RV32-NEXT: or a1, a2, a1 ; CHECK-RV32-NEXT: beqz a1, .LBB5_1 @@ -2087,237 +2087,237 @@ ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use ra ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2041 -; CHECK-RV32-NEXT: lw t0, 0(a1) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2045 -; CHECK-RV32-NEXT: lw t1, 0(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw t0, -8(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw t1, -4(a1) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t0 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2033 -; CHECK-RV32-NEXT: lw t1, 0(a1) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2037 -; CHECK-RV32-NEXT: lw t2, 0(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw t1, -16(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw t2, -12(a1) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t1 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2025 -; CHECK-RV32-NEXT: lw t2, 0(a1) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2029 -; CHECK-RV32-NEXT: lw t3, 0(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw t2, -24(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw t3, -20(a1) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t2 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2017 -; CHECK-RV32-NEXT: lw s0, 0(a1) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2021 -; CHECK-RV32-NEXT: lw s1, 0(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw s0, -32(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw s1, -28(a1) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s0 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2009 -; CHECK-RV32-NEXT: lw s1, 0(a1) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2013 -; CHECK-RV32-NEXT: lw s2, 0(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw s1, -40(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw s2, -36(a1) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s1 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a1, sp, 2047 -; CHECK-RV32-NEXT: addi a1, a1, 2005 -; CHECK-RV32-NEXT: lw a1, 0(a1) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a1, 1 +; CHECK-RV32-NEXT: add a1, sp, a1 +; CHECK-RV32-NEXT: lw a1, -44(a1) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a0 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1997 -; CHECK-RV32-NEXT: lw a1, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 2001 -; CHECK-RV32-NEXT: lw a2, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a1, -52(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a2, -48(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a1 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1989 -; CHECK-RV32-NEXT: lw a2, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1993 -; CHECK-RV32-NEXT: lw a3, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a2, -60(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a3, -56(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a2 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1981 -; CHECK-RV32-NEXT: lw a3, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1985 -; CHECK-RV32-NEXT: lw a4, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a3, -68(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a4, -64(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a3 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1973 -; CHECK-RV32-NEXT: lw a4, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1977 -; CHECK-RV32-NEXT: lw a5, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a4, -76(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a5, -72(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a4 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1965 -; CHECK-RV32-NEXT: lw a5, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1969 -; CHECK-RV32-NEXT: lw a6, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a5, -84(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a6, -80(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a5 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1957 -; CHECK-RV32-NEXT: lw a6, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1961 -; CHECK-RV32-NEXT: lw a7, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a6, -92(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a7, -88(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a6 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1949 -; CHECK-RV32-NEXT: lw a7, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1953 -; CHECK-RV32-NEXT: lw t0, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw a7, -100(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t0, -96(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use a7 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1941 -; CHECK-RV32-NEXT: lw s2, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1945 -; CHECK-RV32-NEXT: lw s3, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s2, -108(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s3, -104(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s2 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1933 -; CHECK-RV32-NEXT: lw s3, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1937 -; CHECK-RV32-NEXT: lw s4, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s3, -116(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s4, -112(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s3 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1925 -; CHECK-RV32-NEXT: lw s4, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1929 -; CHECK-RV32-NEXT: lw s5, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s4, -124(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s5, -120(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s4 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1917 -; CHECK-RV32-NEXT: lw s5, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1921 -; CHECK-RV32-NEXT: lw s6, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s5, -132(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s6, -128(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s5 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1909 -; CHECK-RV32-NEXT: lw s6, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1913 -; CHECK-RV32-NEXT: lw s7, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s6, -140(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s7, -136(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s6 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1901 -; CHECK-RV32-NEXT: lw s7, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1905 -; CHECK-RV32-NEXT: lw s8, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s7, -148(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s8, -144(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s7 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1893 -; CHECK-RV32-NEXT: lw s8, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1897 -; CHECK-RV32-NEXT: lw s9, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s8, -156(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s9, -152(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s8 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1885 -; CHECK-RV32-NEXT: lw s9, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1889 -; CHECK-RV32-NEXT: lw s10, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s9, -164(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s10, -160(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s9 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1877 -; CHECK-RV32-NEXT: lw s10, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1881 -; CHECK-RV32-NEXT: lw s11, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s10, -172(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s11, -168(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s10 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1873 -; CHECK-RV32-NEXT: lw s11, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s11, -176(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use s11 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1865 -; CHECK-RV32-NEXT: lw t3, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1869 -; CHECK-RV32-NEXT: lw t4, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t3, -184(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t4, -180(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t3 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1857 -; CHECK-RV32-NEXT: lw t4, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1861 -; CHECK-RV32-NEXT: lw t5, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t4, -192(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t5, -188(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t4 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1853 -; CHECK-RV32-NEXT: lw t5, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t5, -196(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t5 ; CHECK-RV32-NEXT: #NO_APP -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1845 -; CHECK-RV32-NEXT: lw s0, 0(a0) # 4-byte Folded Reload -; CHECK-RV32-NEXT: addi a0, sp, 2047 -; CHECK-RV32-NEXT: addi a0, a0, 1849 -; CHECK-RV32-NEXT: lw t6, 0(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw s0, -204(a0) # 4-byte Folded Reload +; CHECK-RV32-NEXT: lui a0, 1 +; CHECK-RV32-NEXT: add a0, sp, a0 +; CHECK-RV32-NEXT: lw t6, -200(a0) # 4-byte Folded Reload ; CHECK-RV32-NEXT: #APP ; CHECK-RV32-NEXT: # reg use t6 ; CHECK-RV32-NEXT: #NO_APP diff --git a/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll b/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll --- a/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll +++ b/llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll @@ -14,13 +14,11 @@ ; RV32I-NEXT: sub sp, sp, a0 ; RV32I-NEXT: .cfi_def_cfa_offset 100016 ; RV32I-NEXT: lui a0, 24 -; RV32I-NEXT: addi a0, a0, 1708 ; RV32I-NEXT: add a0, sp, a0 -; RV32I-NEXT: lb a0, 0(a0) +; RV32I-NEXT: lb a0, 1708(a0) ; RV32I-NEXT: lui a0, 24 -; RV32I-NEXT: addi a0, a0, 1704 ; RV32I-NEXT: add a0, sp, a0 -; RV32I-NEXT: lb a0, 0(a0) +; RV32I-NEXT: lb a0, 1704(a0) ; RV32I-NEXT: lui a0, 24 ; RV32I-NEXT: addi a0, a0, 1712 ; RV32I-NEXT: add sp, sp, a0 @@ -33,13 +31,11 @@ ; RV64I-NEXT: sub sp, sp, a0 ; RV64I-NEXT: .cfi_def_cfa_offset 100016 ; RV64I-NEXT: lui a0, 24 -; RV64I-NEXT: addiw a0, a0, 1708 ; RV64I-NEXT: add a0, sp, a0 -; RV64I-NEXT: lb a0, 0(a0) +; RV64I-NEXT: lb a0, 1708(a0) ; RV64I-NEXT: lui a0, 24 -; RV64I-NEXT: addiw a0, a0, 1704 ; RV64I-NEXT: add a0, sp, a0 -; RV64I-NEXT: lb a0, 0(a0) +; RV64I-NEXT: lb a0, 1704(a0) ; RV64I-NEXT: lui a0, 24 ; RV64I-NEXT: addiw a0, a0, 1712 ; RV64I-NEXT: add sp, sp, a0 diff --git a/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir b/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir --- a/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir +++ b/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir @@ -36,9 +36,9 @@ ; CHECK-NEXT: slli sp, a0, 12 ; CHECK-NEXT: ld a0, 0(sp) ; CHECK-NEXT: sd a1, 0(sp) - ; CHECK-NEXT: addi a1, sp, 2047 - ; CHECK-NEXT: addi a1, a1, 2041 - ; CHECK-NEXT: sd a0, 0(a1) + ; CHECK-NEXT: lui a1, 1 + ; CHECK-NEXT: add a1, sp, a1 + ; CHECK-NEXT: sd a0, -8(a1) ; CHECK-NEXT: ld a1, 0(sp) ; CHECK-NEXT: call foo@plt ; CHECK-NEXT: lui a0, 2 diff --git a/llvm/test/CodeGen/RISCV/pr58286.ll b/llvm/test/CodeGen/RISCV/pr58286.ll --- a/llvm/test/CodeGen/RISCV/pr58286.ll +++ b/llvm/test/CodeGen/RISCV/pr58286.ll @@ -27,9 +27,8 @@ ; RV64I-NEXT: lw t6, %lo(var)(a0) ; RV64I-NEXT: sd s0, 0(sp) ; RV64I-NEXT: lui s0, 1 -; RV64I-NEXT: addiw s0, s0, 12 ; RV64I-NEXT: add s0, sp, s0 -; RV64I-NEXT: sw a1, 0(s0) +; RV64I-NEXT: sw a1, 12(s0) ; RV64I-NEXT: ld s0, 0(sp) ; RV64I-NEXT: sw a1, %lo(var)(a0) ; RV64I-NEXT: sw a2, %lo(var)(a0) @@ -73,9 +72,8 @@ ; RV32I-NEXT: lw t6, %lo(var)(a0) ; RV32I-NEXT: sw s0, 0(sp) ; RV32I-NEXT: lui s0, 1 -; RV32I-NEXT: addi s0, s0, 12 ; RV32I-NEXT: add s0, sp, s0 -; RV32I-NEXT: sw a1, 0(s0) +; RV32I-NEXT: sw a1, 12(s0) ; RV32I-NEXT: lw s0, 0(sp) ; RV32I-NEXT: sw a1, %lo(var)(a0) ; RV32I-NEXT: sw a2, %lo(var)(a0) @@ -162,9 +160,8 @@ ; RV64I-NEXT: lw t6, %lo(var)(a0) ; RV64I-NEXT: sd s0, 0(sp) ; RV64I-NEXT: lui s0, 1 -; RV64I-NEXT: addiw s0, s0, 12 ; RV64I-NEXT: add s0, sp, s0 -; RV64I-NEXT: sw a1, 0(s0) +; RV64I-NEXT: sw a1, 12(s0) ; RV64I-NEXT: ld s0, 0(sp) ; RV64I-NEXT: sw a1, %lo(var)(a0) ; RV64I-NEXT: sw a2, %lo(var)(a0) @@ -212,9 +209,8 @@ ; RV32I-NEXT: lw t6, %lo(var)(a0) ; RV32I-NEXT: sw s0, 0(sp) ; RV32I-NEXT: lui s0, 1 -; RV32I-NEXT: addi s0, s0, 12 ; RV32I-NEXT: add s0, sp, s0 -; RV32I-NEXT: sw a1, 0(s0) +; RV32I-NEXT: sw a1, 12(s0) ; RV32I-NEXT: lw s0, 0(sp) ; RV32I-NEXT: sw a1, %lo(var)(a0) ; RV32I-NEXT: sw a2, %lo(var)(a0) diff --git a/llvm/test/CodeGen/RISCV/vararg.ll b/llvm/test/CodeGen/RISCV/vararg.ll --- a/llvm/test/CodeGen/RISCV/vararg.ll +++ b/llvm/test/CodeGen/RISCV/vararg.ll @@ -1691,33 +1691,26 @@ ; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 100000048 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1 ; ILP32-ILP32F-FPELIM-NEXT: lui t0, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi t0, t0, 300 ; ILP32-ILP32F-FPELIM-NEXT: add t0, sp, t0 -; ILP32-ILP32F-FPELIM-NEXT: sw a7, 0(t0) +; ILP32-ILP32F-FPELIM-NEXT: sw a7, 300(t0) ; ILP32-ILP32F-FPELIM-NEXT: lui a7, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi a7, a7, 296 ; ILP32-ILP32F-FPELIM-NEXT: add a7, sp, a7 -; ILP32-ILP32F-FPELIM-NEXT: sw a6, 0(a7) +; ILP32-ILP32F-FPELIM-NEXT: sw a6, 296(a7) ; ILP32-ILP32F-FPELIM-NEXT: lui a6, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi a6, a6, 292 ; ILP32-ILP32F-FPELIM-NEXT: add a6, sp, a6 -; ILP32-ILP32F-FPELIM-NEXT: sw a5, 0(a6) +; ILP32-ILP32F-FPELIM-NEXT: sw a5, 292(a6) ; ILP32-ILP32F-FPELIM-NEXT: lui a5, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi a5, a5, 288 ; ILP32-ILP32F-FPELIM-NEXT: add a5, sp, a5 -; ILP32-ILP32F-FPELIM-NEXT: sw a4, 0(a5) +; ILP32-ILP32F-FPELIM-NEXT: sw a4, 288(a5) ; ILP32-ILP32F-FPELIM-NEXT: lui a4, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi a4, a4, 284 ; ILP32-ILP32F-FPELIM-NEXT: add a4, sp, a4 -; ILP32-ILP32F-FPELIM-NEXT: sw a3, 0(a4) +; ILP32-ILP32F-FPELIM-NEXT: sw a3, 284(a4) ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi a3, a3, 280 ; ILP32-ILP32F-FPELIM-NEXT: add a3, sp, a3 -; ILP32-ILP32F-FPELIM-NEXT: sw a2, 0(a3) +; ILP32-ILP32F-FPELIM-NEXT: sw a2, 280(a3) ; ILP32-ILP32F-FPELIM-NEXT: lui a2, 24414 -; ILP32-ILP32F-FPELIM-NEXT: addi a2, a2, 276 ; ILP32-ILP32F-FPELIM-NEXT: add a2, sp, a2 -; ILP32-ILP32F-FPELIM-NEXT: sw a1, 0(a2) +; ILP32-ILP32F-FPELIM-NEXT: sw a1, 276(a2) ; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 280 ; ILP32-ILP32F-FPELIM-NEXT: add a1, sp, a1 @@ -1750,9 +1743,8 @@ ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 ; ILP32-ILP32F-WITHFP-NEXT: lui a2, 24414 -; ILP32-ILP32F-WITHFP-NEXT: addi a2, a2, 272 ; ILP32-ILP32F-WITHFP-NEXT: sub a2, s0, a2 -; ILP32-ILP32F-WITHFP-NEXT: sw a1, 0(a2) +; ILP32-ILP32F-WITHFP-NEXT: sw a1, -272(a2) ; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728 ; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1 @@ -1769,33 +1761,26 @@ ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 100000048 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui t0, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi t0, t0, 300 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add t0, sp, t0 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 0(t0) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 300(t0) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a7, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, a7, 296 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a7, sp, a7 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 0(a7) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 296(a7) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a6, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a6, 292 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a6, sp, a6 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 0(a6) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 292(a6) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a5, 288 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a5, sp, a5 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 0(a5) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 288(a5) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a4, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, a4, 284 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a4, sp, a4 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 0(a4) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 284(a4) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a3, 280 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a3, sp, a3 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 0(a3) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 280(a3) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a2, 24414 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a2, 276 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, sp, a2 -; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 0(a2) +; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 276(a2) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 280 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, sp, a1 @@ -1812,41 +1797,33 @@ ; LP64-LP64F-LP64D-FPELIM-NEXT: sub sp, sp, a0 ; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 100000080 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 280(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 328 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 328(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 320 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 320(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 312 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 312(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 304 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 304(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 296 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 296(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 288 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 288(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 284 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414 -; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0 -; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 0(a0) +; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 280(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a1, 24414 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a1, a1, 336 ; LP64-LP64F-LP64D-FPELIM-NEXT: add sp, sp, a1 @@ -1874,9 +1851,8 @@ ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414 -; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, 288 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub a1, s0, a1 -; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(a1) +; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -288(a1) ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680