Index: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -297,7 +297,8 @@
   // We must keep the stack pointer aligned through any intermediate
   // updates.
   const RISCVRegisterInfo &RI = *STI.getRegisterInfo();
-  RI.adjustReg(MBB, MBBI, DL, DestReg, SrcReg, Val, Flag, getStackAlign());
+  RI.adjustReg(MBB, MBBI, DL, DestReg, SrcReg, Val, Flag,
+               getStackAlign(), /*KillSrcReg=*/false);
 }
 
 // Returns the register used to hold the frame pointer.
Index: llvm/lib/Target/RISCV/RISCVRegisterInfo.h
===================================================================
--- llvm/lib/Target/RISCV/RISCVRegisterInfo.h
+++ llvm/lib/Target/RISCV/RISCVRegisterInfo.h
@@ -41,11 +41,12 @@
   // Update DestReg to have the value SrcReg plus an offset.  This is
   // used during frame layout, and we may need to ensure that if we
   // split the offset internally that the DestReg is always aligned,
-  // assuming that source reg was.
+  // assuming that source reg was.  KillSrcReg means that this is the
+  // last use of SrcReg, and that the register can be killed internally.
   void adjustReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
                  const DebugLoc &DL, Register DestReg, Register SrcReg,
                  int64_t Val, MachineInstr::MIFlag Flag,
-                 MaybeAlign RequiredAlign) const;
+                 MaybeAlign RequiredAlign, bool KillSrcReg) const;
 
   // Update DestReg to have the value of SrcReg plus an Offset.
   void adjustReg(MachineBasicBlock::iterator II, Register DestReg,
Index: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -166,7 +166,8 @@
                                   const DebugLoc &DL, Register DestReg,
                                   Register SrcReg, int64_t Val,
                                   MachineInstr::MIFlag Flag,
-                                  MaybeAlign RequiredAlign) const {
+                                  MaybeAlign RequiredAlign,
+                                  bool KillSrcReg) const {
   const uint64_t Align = RequiredAlign.valueOrOne().value();
   MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
   const RISCVSubtarget &ST = MBB.getParent()->getSubtarget<RISCVSubtarget>();
@@ -177,7 +178,7 @@
 
   if (isInt<12>(Val)) {
     BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg)
-        .addReg(SrcReg)
+        .addReg(SrcReg, getKillRegState(KillSrcReg))
         .addImm(Val)
         .setMIFlag(Flag);
     return;
@@ -195,7 +196,7 @@
     int64_t FirstAdj = Val < 0 ? -2048 : MaxPosAdjStep;
     Val -= FirstAdj;
     BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg)
-        .addReg(SrcReg)
+        .addReg(SrcReg, getKillRegState(KillSrcReg))
         .addImm(FirstAdj)
         .setMIFlag(Flag);
     BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg)
@@ -214,7 +215,7 @@
   Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
   TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag);
   BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg)
-      .addReg(SrcReg)
+      .addReg(SrcReg, getKillRegState(KillSrcReg))
       .addReg(ScratchReg, RegState::Kill)
       .setMIFlag(Flag);
 }
@@ -227,7 +228,6 @@
 
   MachineInstr &MI = *II;
   MachineFunction &MF = *MI.getParent()->getParent();
-  MachineRegisterInfo &MRI = MF.getRegInfo();
   const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>();
   const RISCVInstrInfo *TII = ST.getInstrInfo();
   DebugLoc DL = MI.getDebugLoc();
@@ -250,21 +250,9 @@
     SrcRegIsKill = true;
   }
 
-  if (Offset.getFixed()) {
-    // TODO: Merge this with FrameLowerings adjustReg which knows a few
-    // more tricks than this does for fixed offsets.
-    if (isInt<12>(Offset.getFixed())) {
-      BuildMI(MBB, II, DL, TII->get(RISCV::ADDI), DestReg)
-        .addReg(SrcReg, getKillRegState(SrcRegIsKill))
-        .addImm(Offset.getFixed());
-    } else {
-      Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
-      TII->movImm(MBB, II, DL, ScratchReg, Offset.getFixed());
-      BuildMI(MBB, II, DL, TII->get(RISCV::ADD), DestReg)
-        .addReg(SrcReg, getKillRegState(SrcRegIsKill))
-        .addReg(ScratchReg, RegState::Kill);
-    }
-  }
+  if (Offset.getFixed())
+    adjustReg(MBB, II, DL, DestReg, SrcReg, Offset.getFixed(),
+              MachineInstr::NoFlags, None, SrcRegIsKill);
 }
 
 
Index: llvm/test/CodeGen/RISCV/branch-relaxation.ll
===================================================================
--- llvm/test/CodeGen/RISCV/branch-relaxation.ll
+++ llvm/test/CodeGen/RISCV/branch-relaxation.ll
@@ -964,17 +964,15 @@
 ; CHECK-RV64-NEXT:    li t5, 30
 ; CHECK-RV64-NEXT:    #NO_APP
 ; CHECK-RV64-NEXT:    sd t0, 0(sp)
-; CHECK-RV64-NEXT:    lui t0, 1
-; CHECK-RV64-NEXT:    addiw t0, t0, -8
-; CHECK-RV64-NEXT:    add t0, sp, t0
+; CHECK-RV64-NEXT:    addi t0, sp, 2047
+; CHECK-RV64-NEXT:    addi t0, t0, 2041
 ; CHECK-RV64-NEXT:    sd t5, 0(t0) # 8-byte Folded Spill
 ; CHECK-RV64-NEXT:    sext.w t5, t5
 ; CHECK-RV64-NEXT:    #APP
 ; CHECK-RV64-NEXT:    li t6, 31
 ; CHECK-RV64-NEXT:    #NO_APP
-; CHECK-RV64-NEXT:    lui t0, 1
-; CHECK-RV64-NEXT:    addiw t0, t0, -16
-; CHECK-RV64-NEXT:    add t0, sp, t0
+; CHECK-RV64-NEXT:    addi t0, sp, 2047
+; CHECK-RV64-NEXT:    addi t0, t0, 2033
 ; CHECK-RV64-NEXT:    sd t6, 0(t0) # 8-byte Folded Spill
 ; CHECK-RV64-NEXT:    ld t0, 0(sp)
 ; CHECK-RV64-NEXT:    sext.w t6, t6
@@ -1064,16 +1062,14 @@
 ; CHECK-RV64-NEXT:    #APP
 ; CHECK-RV64-NEXT:    # reg use t4
 ; CHECK-RV64-NEXT:    #NO_APP
-; CHECK-RV64-NEXT:    lui a0, 1
-; CHECK-RV64-NEXT:    addiw a0, a0, -8
-; CHECK-RV64-NEXT:    add a0, sp, a0
+; CHECK-RV64-NEXT:    addi a0, sp, 2047
+; CHECK-RV64-NEXT:    addi a0, a0, 2041
 ; CHECK-RV64-NEXT:    ld t5, 0(a0) # 8-byte Folded Reload
 ; CHECK-RV64-NEXT:    #APP
 ; CHECK-RV64-NEXT:    # reg use t5
 ; CHECK-RV64-NEXT:    #NO_APP
-; CHECK-RV64-NEXT:    lui a0, 1
-; CHECK-RV64-NEXT:    addiw a0, a0, -16
-; CHECK-RV64-NEXT:    add a0, sp, a0
+; CHECK-RV64-NEXT:    addi a0, sp, 2047
+; CHECK-RV64-NEXT:    addi a0, a0, 2033
 ; CHECK-RV64-NEXT:    ld t6, 0(a0) # 8-byte Folded Reload
 ; CHECK-RV64-NEXT:    #APP
 ; CHECK-RV64-NEXT:    # reg use t6
@@ -1843,269 +1839,221 @@
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li t0, 5
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -8
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2041
 ; CHECK-RV32-NEXT:    sw t0, 0(a0) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -4
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2045
 ; CHECK-RV32-NEXT:    sw t1, 0(a0) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li t1, 6
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -16
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2033
 ; CHECK-RV32-NEXT:    sw t1, 0(a0) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -12
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2037
 ; CHECK-RV32-NEXT:    sw t2, 0(a0) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li t2, 7
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -24
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2025
 ; CHECK-RV32-NEXT:    sw t2, 0(a0) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -20
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2029
 ; CHECK-RV32-NEXT:    sw t3, 0(a0) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s0, 8
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -32
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2017
 ; CHECK-RV32-NEXT:    sw s0, 0(a0) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -28
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2021
 ; CHECK-RV32-NEXT:    sw s1, 0(a0) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s1, 9
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -40
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2009
 ; CHECK-RV32-NEXT:    sw s1, 0(a0) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -36
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2013
 ; CHECK-RV32-NEXT:    sw s2, 0(a0) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a0, 10
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a2, 1
-; CHECK-RV32-NEXT:    addi a2, a2, -44
-; CHECK-RV32-NEXT:    add a2, sp, a2
+; CHECK-RV32-NEXT:    addi a2, sp, 2047
+; CHECK-RV32-NEXT:    addi a2, a2, 2005
 ; CHECK-RV32-NEXT:    sw a1, 0(a2) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a1, 11
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a3, 1
-; CHECK-RV32-NEXT:    addi a3, a3, -52
-; CHECK-RV32-NEXT:    add a3, sp, a3
+; CHECK-RV32-NEXT:    addi a3, sp, 2047
+; CHECK-RV32-NEXT:    addi a3, a3, 1997
 ; CHECK-RV32-NEXT:    sw a1, 0(a3) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -48
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2001
 ; CHECK-RV32-NEXT:    sw a2, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a2, 12
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -60
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1989
 ; CHECK-RV32-NEXT:    sw a2, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -56
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1993
 ; CHECK-RV32-NEXT:    sw a3, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a3, 13
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -68
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1981
 ; CHECK-RV32-NEXT:    sw a3, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -64
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1985
 ; CHECK-RV32-NEXT:    sw a4, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a4, 14
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -76
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1973
 ; CHECK-RV32-NEXT:    sw a4, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -72
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1977
 ; CHECK-RV32-NEXT:    sw a5, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a5, 15
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -84
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1965
 ; CHECK-RV32-NEXT:    sw a5, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -80
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1969
 ; CHECK-RV32-NEXT:    sw a6, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a6, 16
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -92
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1957
 ; CHECK-RV32-NEXT:    sw a6, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -88
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1961
 ; CHECK-RV32-NEXT:    sw a7, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li a7, 17
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -100
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1949
 ; CHECK-RV32-NEXT:    sw a7, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -96
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1953
 ; CHECK-RV32-NEXT:    sw t0, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s2, 18
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -108
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1941
 ; CHECK-RV32-NEXT:    sw s2, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -104
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1945
 ; CHECK-RV32-NEXT:    sw s3, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s3, 19
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -116
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1933
 ; CHECK-RV32-NEXT:    sw s3, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -112
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1937
 ; CHECK-RV32-NEXT:    sw s4, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s4, 20
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -124
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1925
 ; CHECK-RV32-NEXT:    sw s4, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -120
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1929
 ; CHECK-RV32-NEXT:    sw s5, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s5, 21
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -132
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1917
 ; CHECK-RV32-NEXT:    sw s5, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -128
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1921
 ; CHECK-RV32-NEXT:    sw s6, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s6, 22
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -140
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1909
 ; CHECK-RV32-NEXT:    sw s6, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -136
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1913
 ; CHECK-RV32-NEXT:    sw s7, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s7, 23
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -148
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1901
 ; CHECK-RV32-NEXT:    sw s7, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -144
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1905
 ; CHECK-RV32-NEXT:    sw s8, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s8, 24
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -156
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1893
 ; CHECK-RV32-NEXT:    sw s8, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -152
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1897
 ; CHECK-RV32-NEXT:    sw s9, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s9, 25
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -164
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1885
 ; CHECK-RV32-NEXT:    sw s9, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -160
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1889
 ; CHECK-RV32-NEXT:    sw s10, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s10, 26
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -172
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1877
 ; CHECK-RV32-NEXT:    sw s10, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -168
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1881
 ; CHECK-RV32-NEXT:    sw s11, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li s11, 27
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -176
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1873
 ; CHECK-RV32-NEXT:    sw s11, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li t3, 28
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -184
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1865
 ; CHECK-RV32-NEXT:    sw t3, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -180
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1869
 ; CHECK-RV32-NEXT:    sw t4, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li t4, 29
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -192
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1857
 ; CHECK-RV32-NEXT:    sw t4, 0(a1) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -188
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 1861
 ; CHECK-RV32-NEXT:    sw t5, 0(a1) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    li t5, 30
@@ -2116,18 +2064,15 @@
 ; CHECK-RV32-NEXT:    #NO_APP
 ; CHECK-RV32-NEXT:    mv a2, t6
 ; CHECK-RV32-NEXT:    mv t6, a1
-; CHECK-RV32-NEXT:    lui a3, 1
-; CHECK-RV32-NEXT:    addi a3, a3, -204
-; CHECK-RV32-NEXT:    add a3, sp, a3
+; CHECK-RV32-NEXT:    addi a3, sp, 2047
+; CHECK-RV32-NEXT:    addi a3, a3, 1845
 ; CHECK-RV32-NEXT:    sw s0, 0(a3) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    xor a1, a1, s0
-; CHECK-RV32-NEXT:    lui a3, 1
-; CHECK-RV32-NEXT:    addi a3, a3, -196
-; CHECK-RV32-NEXT:    add a3, sp, a3
+; CHECK-RV32-NEXT:    addi a3, sp, 2047
+; CHECK-RV32-NEXT:    addi a3, a3, 1853
 ; CHECK-RV32-NEXT:    sw t5, 0(a3) # 4-byte Folded Spill
-; CHECK-RV32-NEXT:    lui a3, 1
-; CHECK-RV32-NEXT:    addi a3, a3, -200
-; CHECK-RV32-NEXT:    add a3, sp, a3
+; CHECK-RV32-NEXT:    addi a3, sp, 2047
+; CHECK-RV32-NEXT:    addi a3, a3, 1849
 ; CHECK-RV32-NEXT:    sw a2, 0(a3) # 4-byte Folded Spill
 ; CHECK-RV32-NEXT:    xor a2, t5, a2
 ; CHECK-RV32-NEXT:    or a1, a2, a1
@@ -2142,287 +2087,236 @@
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use ra
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -8
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2041
 ; CHECK-RV32-NEXT:    lw t0, 0(a1) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -4
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2045
 ; CHECK-RV32-NEXT:    lw t1, 0(a1) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t0
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -16
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2033
 ; CHECK-RV32-NEXT:    lw t1, 0(a1) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -12
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2037
 ; CHECK-RV32-NEXT:    lw t2, 0(a1) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t1
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -24
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2025
 ; CHECK-RV32-NEXT:    lw t2, 0(a1) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -20
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2029
 ; CHECK-RV32-NEXT:    lw t3, 0(a1) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t2
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -32
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2017
 ; CHECK-RV32-NEXT:    lw s0, 0(a1) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -28
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2021
 ; CHECK-RV32-NEXT:    lw s1, 0(a1) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s0
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -40
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2009
 ; CHECK-RV32-NEXT:    lw s1, 0(a1) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -36
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2013
 ; CHECK-RV32-NEXT:    lw s2, 0(a1) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s1
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a1, 1
-; CHECK-RV32-NEXT:    addi a1, a1, -44
-; CHECK-RV32-NEXT:    add a1, sp, a1
+; CHECK-RV32-NEXT:    addi a1, sp, 2047
+; CHECK-RV32-NEXT:    addi a1, a1, 2005
 ; CHECK-RV32-NEXT:    lw a1, 0(a1) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a0
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -52
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1997
 ; CHECK-RV32-NEXT:    lw a1, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -48
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 2001
 ; CHECK-RV32-NEXT:    lw a2, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a1
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -60
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1989
 ; CHECK-RV32-NEXT:    lw a2, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -56
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1993
 ; CHECK-RV32-NEXT:    lw a3, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a2
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -68
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1981
 ; CHECK-RV32-NEXT:    lw a3, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -64
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1985
 ; CHECK-RV32-NEXT:    lw a4, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a3
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -76
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1973
 ; CHECK-RV32-NEXT:    lw a4, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -72
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1977
 ; CHECK-RV32-NEXT:    lw a5, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a4
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -84
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1965
 ; CHECK-RV32-NEXT:    lw a5, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -80
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1969
 ; CHECK-RV32-NEXT:    lw a6, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a5
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -92
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1957
 ; CHECK-RV32-NEXT:    lw a6, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -88
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1961
 ; CHECK-RV32-NEXT:    lw a7, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a6
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -100
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1949
 ; CHECK-RV32-NEXT:    lw a7, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -96
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1953
 ; CHECK-RV32-NEXT:    lw t0, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use a7
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -108
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1941
 ; CHECK-RV32-NEXT:    lw s2, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -104
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1945
 ; CHECK-RV32-NEXT:    lw s3, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s2
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -116
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1933
 ; CHECK-RV32-NEXT:    lw s3, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -112
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1937
 ; CHECK-RV32-NEXT:    lw s4, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s3
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -124
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1925
 ; CHECK-RV32-NEXT:    lw s4, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -120
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1929
 ; CHECK-RV32-NEXT:    lw s5, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s4
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -132
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1917
 ; CHECK-RV32-NEXT:    lw s5, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -128
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1921
 ; CHECK-RV32-NEXT:    lw s6, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s5
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -140
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1909
 ; CHECK-RV32-NEXT:    lw s6, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -136
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1913
 ; CHECK-RV32-NEXT:    lw s7, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s6
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -148
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1901
 ; CHECK-RV32-NEXT:    lw s7, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -144
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1905
 ; CHECK-RV32-NEXT:    lw s8, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s7
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -156
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1893
 ; CHECK-RV32-NEXT:    lw s8, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -152
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1897
 ; CHECK-RV32-NEXT:    lw s9, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s8
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -164
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1885
 ; CHECK-RV32-NEXT:    lw s9, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -160
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1889
 ; CHECK-RV32-NEXT:    lw s10, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s9
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -172
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1877
 ; CHECK-RV32-NEXT:    lw s10, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -168
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1881
 ; CHECK-RV32-NEXT:    lw s11, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s10
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -176
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1873
 ; CHECK-RV32-NEXT:    lw s11, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use s11
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -184
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1865
 ; CHECK-RV32-NEXT:    lw t3, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -180
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1869
 ; CHECK-RV32-NEXT:    lw t4, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t3
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -192
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1857
 ; CHECK-RV32-NEXT:    lw t4, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -188
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1861
 ; CHECK-RV32-NEXT:    lw t5, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t4
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -196
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1853
 ; CHECK-RV32-NEXT:    lw t5, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t5
 ; CHECK-RV32-NEXT:    #NO_APP
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -204
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1845
 ; CHECK-RV32-NEXT:    lw s0, 0(a0) # 4-byte Folded Reload
-; CHECK-RV32-NEXT:    lui a0, 1
-; CHECK-RV32-NEXT:    addi a0, a0, -200
-; CHECK-RV32-NEXT:    add a0, sp, a0
+; CHECK-RV32-NEXT:    addi a0, sp, 2047
+; CHECK-RV32-NEXT:    addi a0, a0, 1849
 ; CHECK-RV32-NEXT:    lw t6, 0(a0) # 4-byte Folded Reload
 ; CHECK-RV32-NEXT:    #APP
 ; CHECK-RV32-NEXT:    # reg use t6
Index: llvm/test/CodeGen/RISCV/large-stack.ll
===================================================================
--- llvm/test/CodeGen/RISCV/large-stack.ll
+++ llvm/test/CodeGen/RISCV/large-stack.ll
@@ -94,9 +94,9 @@
 ; RV32I-WITHFP-NEXT:    addi a1, a1, 688
 ; RV32I-WITHFP-NEXT:    sub sp, sp, a1
 ; RV32I-WITHFP-NEXT:    lui a1, 78
-; RV32I-WITHFP-NEXT:    lui a2, 1048478
-; RV32I-WITHFP-NEXT:    addi a2, a2, 1388
-; RV32I-WITHFP-NEXT:    add a2, s0, a2
+; RV32I-WITHFP-NEXT:    lui a2, 98
+; RV32I-WITHFP-NEXT:    addi a2, a2, -1388
+; RV32I-WITHFP-NEXT:    sub a2, s0, a2
 ; RV32I-WITHFP-NEXT:    add a1, a2, a1
 ; RV32I-WITHFP-NEXT:    #APP
 ; RV32I-WITHFP-NEXT:    nop
Index: llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
===================================================================
--- llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
+++ llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
@@ -36,9 +36,8 @@
   ; CHECK-NEXT:    slli sp, a0, 12
   ; CHECK-NEXT:    ld a0, 0(sp)
   ; CHECK-NEXT:    sd a1, 0(sp)
-  ; CHECK-NEXT:    lui a1, 1
-  ; CHECK-NEXT:    addiw a1, a1, -8
-  ; CHECK-NEXT:    add a1, sp, a1
+  ; CHECK-NEXT:    addi a1, sp, 2047
+  ; CHECK-NEXT:    addi a1, a1, 2041
   ; CHECK-NEXT:    sd a0, 0(a1)
   ; CHECK-NEXT:    ld a1, 0(sp)
   ; CHECK-NEXT:    call foo@plt
Index: llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
+++ llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
@@ -45,9 +45,8 @@
     ; CHECK-NEXT: $x10 = PseudoReadVLENB
     ; CHECK-NEXT: $x10 = SLLI killed $x10, 1
     ; CHECK-NEXT: $x10 = SUB $x8, killed $x10
-    ; CHECK-NEXT: $x11 = LUI 1048575
-    ; CHECK-NEXT: $x11 = ADDIW killed $x11, 1824
-    ; CHECK-NEXT: $x10 = ADD killed $x10, killed $x11
+    ; CHECK-NEXT: $x10 = ADDI killed $x10, -2048
+    ; CHECK-NEXT: $x10 = ADDI killed $x10, -224
     ; CHECK-NEXT: VS1R_V killed renamable $v8, killed renamable $x10
     ; CHECK-NEXT: $x2 = frame-destroy ADDI $x8, -2048
     ; CHECK-NEXT: $x2 = frame-destroy ADDI killed $x2, -224
Index: llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
+++ llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
@@ -93,9 +93,8 @@
   ; CHECK-NEXT:   $x11 = ADDI killed $x0, 50
   ; CHECK-NEXT:   $x10 = MUL killed $x10, killed $x11
   ; CHECK-NEXT:   $x10 = ADD $x2, killed $x10
-  ; CHECK-NEXT:   $x11 = LUI 1
-  ; CHECK-NEXT:   $x11 = ADDIW killed $x11, -1888
-  ; CHECK-NEXT:   $x10 = ADD killed $x10, killed $x11
+  ; CHECK-NEXT:   $x10 = ADDI killed $x10, 2047
+  ; CHECK-NEXT:   $x10 = ADDI killed $x10, 161
   ; CHECK-NEXT:   PseudoVSPILL_M1 killed renamable $v25, killed $x10 :: (store unknown-size into %stack.1, align 8)
   ; CHECK-NEXT:   renamable $x1 = ADDI $x0, 255
   ; CHECK-NEXT:   renamable $x5 = nuw ADDI $x2, 384
@@ -111,11 +110,8 @@
   ; CHECK-NEXT:   renamable $x21 = ADDI $x2, 1664
   ; CHECK-NEXT:   renamable $x22 = ADDI $x2, 1792
   ; CHECK-NEXT:   renamable $x23 = ADDI $x2, 1920
-  ; CHECK-NEXT:   SD killed $x1, $x2, 8 :: (store (s64) into %stack.15)
-  ; CHECK-NEXT:   SD killed $x5, $x2, 0 :: (store (s64) into %stack.16)
-  ; CHECK-NEXT:   $x11 = LUI 1
-  ; CHECK-NEXT:   $x11 = ADDIW killed $x11, -2048
-  ; CHECK-NEXT:   $x24 = ADD $x2, killed $x11
+  ; CHECK-NEXT:   $x24 = ADDI $x2, 2047
+  ; CHECK-NEXT:   $x24 = ADDI killed $x24, 1
   ; CHECK-NEXT:   renamable $x25 = ADDI $x2, 128
   ; CHECK-NEXT:   renamable $x26 = ADDI $x2, 128
   ; CHECK-NEXT:   renamable $x27 = ADDI $x0, 2
@@ -131,16 +127,17 @@
   ; CHECK-NEXT:   renamable $x16 = SUB killed renamable $x13, renamable $x13
   ; CHECK-NEXT:   dead renamable $x13 = PseudoVSETIVLI 1, 64 /* e8, m1, ta, mu */, implicit-def $vl, implicit-def $vtype
   ; CHECK-NEXT:   renamable $x13 = nsw ADDI renamable $x16, -2
-  ; CHECK-NEXT:   $x1 = PseudoReadVLENB
-  ; CHECK-NEXT:   $x5 = ADDI killed $x0, 50
-  ; CHECK-NEXT:   $x1 = MUL killed $x1, killed $x5
-  ; CHECK-NEXT:   $x1 = ADD $x2, killed $x1
-  ; CHECK-NEXT:   $x5 = LUI 1
-  ; CHECK-NEXT:   $x5 = ADDIW killed $x5, -1888
-  ; CHECK-NEXT:   $x1 = ADD killed $x1, killed $x5
-  ; CHECK-NEXT:   $x5 = LD $x2, 0 :: (load (s64) from %stack.16)
-  ; CHECK-NEXT:   renamable $v0 = PseudoVRELOAD_M1 killed $x1 :: (load unknown-size from %stack.1, align 8)
-  ; CHECK-NEXT:   $x1 = LD $x2, 8 :: (load (s64) from %stack.15)
+  ; CHECK-NEXT:   SD killed $x10, $x2, 8 :: (store (s64) into %stack.15)
+  ; CHECK-NEXT:   $x10 = PseudoReadVLENB
+  ; CHECK-NEXT:   SD killed $x12, $x2, 0 :: (store (s64) into %stack.16)
+  ; CHECK-NEXT:   $x12 = ADDI killed $x0, 50
+  ; CHECK-NEXT:   $x10 = MUL killed $x10, killed $x12
+  ; CHECK-NEXT:   $x12 = LD $x2, 0 :: (load (s64) from %stack.16)
+  ; CHECK-NEXT:   $x10 = ADD $x2, killed $x10
+  ; CHECK-NEXT:   $x10 = ADDI killed $x10, 2047
+  ; CHECK-NEXT:   $x10 = ADDI killed $x10, 161
+  ; CHECK-NEXT:   renamable $v0 = PseudoVRELOAD_M1 killed $x10 :: (load unknown-size from %stack.1, align 8)
+  ; CHECK-NEXT:   $x10 = LD $x2, 8 :: (load (s64) from %stack.15)
   ; CHECK-NEXT:   renamable $v0 = PseudoVSLIDEDOWN_VX_M1 undef renamable $v0, killed renamable $v0, killed renamable $x13, $noreg, 3 /* e8 */, 1 /* ta, mu */, implicit $vl, implicit $vtype
   ; CHECK-NEXT:   renamable $x13 = PseudoVMV_X_S_M1 killed renamable $v0, 3 /* e8 */, implicit $vl, implicit $vtype
   ; CHECK-NEXT:   BLT killed renamable $x16, renamable $x27, %bb.2
Index: llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
+++ llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
@@ -28,9 +28,8 @@
   ; CHECK-NEXT:    ld a0, 8(sp)
   ; CHECK-NEXT:    andi sp, sp, -128
   ; CHECK-NEXT:    sd a0, 8(sp)
-  ; CHECK-NEXT:    lui a0, 1
-  ; CHECK-NEXT:    addiw a0, a0, -1808
-  ; CHECK-NEXT:    add a0, sp, a0
+  ; CHECK-NEXT:    addi a0, sp, 2047
+  ; CHECK-NEXT:    addi a0, a0, 241
   ; CHECK-NEXT:    vs1r.v v25, (a0) # Unknown-size Folded Spill
   ; CHECK-NEXT:    ld a0, 8(sp)
   ; CHECK-NEXT:    call spillslot@plt
Index: llvm/test/CodeGen/RISCV/stack-realignment.ll
===================================================================
--- llvm/test/CodeGen/RISCV/stack-realignment.ll
+++ llvm/test/CodeGen/RISCV/stack-realignment.ll
@@ -456,9 +456,8 @@
 ; RV32I-NEXT:    addi sp, sp, -2048
 ; RV32I-NEXT:    addi sp, sp, -16
 ; RV32I-NEXT:    andi sp, sp, -2048
-; RV32I-NEXT:    lui a0, 1
-; RV32I-NEXT:    addi a0, a0, -2048
-; RV32I-NEXT:    add a0, sp, a0
+; RV32I-NEXT:    addi a0, sp, 2047
+; RV32I-NEXT:    addi a0, a0, 1
 ; RV32I-NEXT:    call callee@plt
 ; RV32I-NEXT:    lui a0, 1
 ; RV32I-NEXT:    sub sp, s0, a0
@@ -482,9 +481,8 @@
 ; RV64I-NEXT:    addi sp, sp, -2048
 ; RV64I-NEXT:    addi sp, sp, -16
 ; RV64I-NEXT:    andi sp, sp, -2048
-; RV64I-NEXT:    lui a0, 1
-; RV64I-NEXT:    addiw a0, a0, -2048
-; RV64I-NEXT:    add a0, sp, a0
+; RV64I-NEXT:    addi a0, sp, 2047
+; RV64I-NEXT:    addi a0, a0, 1
 ; RV64I-NEXT:    call callee@plt
 ; RV64I-NEXT:    lui a0, 1
 ; RV64I-NEXT:    sub sp, s0, a0
Index: llvm/test/CodeGen/RISCV/vararg.ll
===================================================================
--- llvm/test/CodeGen/RISCV/vararg.ll
+++ llvm/test/CodeGen/RISCV/vararg.ll
@@ -1749,9 +1749,9 @@
 ; ILP32-ILP32F-WITHFP-NEXT:    sw a2, 8(s0)
 ; ILP32-ILP32F-WITHFP-NEXT:    sw a1, 4(s0)
 ; ILP32-ILP32F-WITHFP-NEXT:    addi a1, s0, 8
-; ILP32-ILP32F-WITHFP-NEXT:    lui a2, 1024162
-; ILP32-ILP32F-WITHFP-NEXT:    addi a2, a2, -272
-; ILP32-ILP32F-WITHFP-NEXT:    add a2, s0, a2
+; ILP32-ILP32F-WITHFP-NEXT:    lui a2, 24414
+; ILP32-ILP32F-WITHFP-NEXT:    addi a2, a2, 272
+; ILP32-ILP32F-WITHFP-NEXT:    sub a2, s0, a2
 ; ILP32-ILP32F-WITHFP-NEXT:    sw a1, 0(a2)
 ; ILP32-ILP32F-WITHFP-NEXT:    lui a1, 24414
 ; ILP32-ILP32F-WITHFP-NEXT:    addi a1, a1, -1728
@@ -1873,9 +1873,9 @@
 ; LP64-LP64F-LP64D-WITHFP-NEXT:    sd a3, 24(s0)
 ; LP64-LP64F-LP64D-WITHFP-NEXT:    sd a2, 16(s0)
 ; LP64-LP64F-LP64D-WITHFP-NEXT:    addi a0, s0, 12
-; LP64-LP64F-LP64D-WITHFP-NEXT:    lui a1, 1024162
-; LP64-LP64F-LP64D-WITHFP-NEXT:    addiw a1, a1, -288
-; LP64-LP64F-LP64D-WITHFP-NEXT:    add a1, s0, a1
+; LP64-LP64F-LP64D-WITHFP-NEXT:    lui a1, 24414
+; LP64-LP64F-LP64D-WITHFP-NEXT:    addiw a1, a1, 288
+; LP64-LP64F-LP64D-WITHFP-NEXT:    sub a1, s0, a1
 ; LP64-LP64F-LP64D-WITHFP-NEXT:    sd a0, 0(a1)
 ; LP64-LP64F-LP64D-WITHFP-NEXT:    lw a0, 8(s0)
 ; LP64-LP64F-LP64D-WITHFP-NEXT:    lui a1, 24414