diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1345,6 +1345,33 @@
   return selectI64Imm(CurDAG, dl, Imm);
 }
 
+static SDNode *selectFloatImm(SelectionDAG *CurDAG, SDNode *N) {
+  ConstantFPSDNode *ConstFPNode = cast<ConstantFPSDNode>(N);
+  if (!ConstFPNode)
+    return nullptr;
+
+  const APFloat &FloatValue = ConstFPNode->getValueAPF();
+  SDLoc dl(N);
+  bool IsExact;
+  APSInt IntResult(16, false);
+  // The rounding mode doesn't really matter because we only care about floats
+  // that can be converted to integers exactly.
+  FloatValue.convertToInteger(IntResult, APFloat::rmTowardZero, &IsExact);
+  // For exact values in the range [-16, 15] we can materialize the float.
+  // Zero is not materialized here.
+  if (IsExact && IntResult <= 15 && IntResult >= -16 && !FloatValue.isZero()) {
+    SDValue SDImm =
+        CurDAG->getTargetConstant(IntResult.getExtValue(), dl, MVT::i64);
+    SDValue SplatNode = SDValue(
+        CurDAG->getMachineNode(PPC::VSPLTISW, dl, MVT::v4i32, SDImm), 0);
+    if (N->getValueType(0) == MVT::f32)
+      return CurDAG->getMachineNode(PPC::XVCVSXWSP, dl, MVT::f32, SplatNode);
+    else if (N->getValueType(0) == MVT::f64)
+      return CurDAG->getMachineNode(PPC::XVCVSXWDP, dl, MVT::f64, SplatNode);
+  }
+  return nullptr;
+}
+
 namespace {
 
 class BitPermutationSelector {
@@ -5050,7 +5077,17 @@
       return;
     }
     break;
+  case ISD::ConstantFP: {
+    SDNode *ResultNode = nullptr;
+    if (N->getValueType(0) == MVT::f32 || N->getValueType(0) == MVT::f64)
+      ResultNode = selectFloatImm(CurDAG, N);
 
+    if (ResultNode) {
+      ReplaceNode(N, ResultNode);
+      return;
+    }
+    break;
+  }
   case ISD::INTRINSIC_VOID: {
     auto IntrinsicID = N->getConstantOperandVal(1);
     if (IntrinsicID != Intrinsic::ppc_tdw && IntrinsicID != Intrinsic::ppc_tw &&
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17166,12 +17166,21 @@
     // false. Examples: f16, f80.
     return false;
   case MVT::f32:
-  case MVT::f64:
+  case MVT::f64: {
     if (Subtarget.hasPrefixInstrs()) {
       // we can materialize all immediatess via XXSPLTI32DX and XXSPLTIDP.
       return true;
     }
-    [[fallthrough]];
+    bool IsExact;
+    APSInt IntResult(16, false);
+    // The rounding mode doesn't really matter because we only care about floats
+    // that can be converted to integers exactly.
+    Imm.convertToInteger(IntResult, APFloat::rmTowardZero, &IsExact);
+    // For exact values in the range [-16, 15] we can materialize the float.
+    if (IsExact && IntResult <= 15 && IntResult >= -16)
+      return true;
+    return Imm.isZero();
+  }
   case MVT::ppcf128:
     return Imm.isPosZero();
   }
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -2501,6 +2501,12 @@
                      (and v4i32:$B, v4i32:$C))),
           (v4i32 (XXSEL $A, $B, $C))>;
 
+def : Pat<(f64 (fpimm0neg)),
+          (f64 (XSNEGDP (XXLXORdpz)))>;
+
+def : Pat<(f32 (fpimm0neg)),
+          (f32 (COPY_TO_REGCLASS (XSNEGDP (XXLXORdpz)), VSSRC))>;
+
 // Additional fnmsub pattern for PPC specific ISD opcode
 def : Pat<(PPCfnmsub f64:$A, f64:$B, f64:$C),
           (XSNMSUBADP $C, $A, $B)>;
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -728,6 +728,7 @@
 }
 
 def fpimm0 : PatLeaf<(fpimm), [{ return N->isExactlyValue(+0.0); }]>;
+def fpimm0neg : PatLeaf<(fpimm), [{return N->isExactlyValue(-0.0);}]>;
 
 def PPCDirectBrAsmOperand : AsmOperandClass {
   let Name = "DirectBr"; let PredicateMethod = "isDirectBr";
diff --git a/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll b/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll
--- a/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll
@@ -17,12 +17,10 @@
 ; CHECK:     STXVW4X killed [[VECCONST]], $r1, killed [[STACKOFFSET]] :: (store (s128))
 ; CHECK-DAG: [[ELEMENT1:%[0-9]+]]:gprc = LWZ 48, $r1 :: (load (s32))
 ; CHECK-DAG: [[ELEMENT2:%[0-9]+]]:gprc = LWZ 52, $r1 :: (load (s32))
-; CHECK:     [[FLOAT1ADDR:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.1, $r2 :: (load (s32) from got)
-; CHECK:     [[FLOAT1:%[0-9]+]]:f4rc = LFS 0, killed [[FLOAT1ADDR]] :: (load (s32) from constant-pool)
-; CHECK:     [[DOUBLE1:%[0-9]+]]:f8rc = COPY [[FLOAT1]]
-; CHECK:     [[FLOAT2ADDR:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.2, $r2 :: (load (s32) from got)
-; CHECK:     [[FLOAT2:%[0-9]+]]:f4rc = LFS 0, killed [[FLOAT2ADDR]] :: (load (s32) from constant-pool)
-; CHECK:     [[DOUBLE2:%[0-9]+]]:f8rc = COPY [[FLOAT2]]
+; CHECK:     [[FLOAT1SPLAT:%[0-9]+]]:vrrc = VSPLTISW 1
+; CHECK:     [[DOUBLE1:%[0-9]+]]:vsrc = XVCVSXWDP killed [[FLOAT1SPLAT]], implicit $rm
+; CHECK:     [[FLOAT2SPLAT:%[0-9]+]]:vrrc = VSPLTISW 2
+; CHECK:     [[DOUBLE2:%[0-9]+]]:vsrc = XVCVSXWDP killed [[FLOAT2SPLAT]], implicit $rm
 
 ; CHECK:     [[DZERO:%[0-9]+]]:vsfrc = XXLXORdpz
 ; CHECK:     [[DTOI1:%[0-9]+]]:gprc = LIS 16368
diff --git a/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll b/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
--- a/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
+++ b/llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
@@ -408,13 +408,14 @@
 ; CHECK-NEXT:    .cfi_def_cfa_offset 32
 ; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    addis 3, 2, .LC5@toc@ha
-; CHECK-NEXT:    addis 8, 2, .LCPI20_0@toc@ha
+; CHECK-NEXT:    vspltisw 2, 1
 ; CHECK-NEXT:    ld 3, .LC5@toc@l(3)
-; CHECK-NEXT:    lfs 1, .LCPI20_0@toc@l(8)
+; CHECK-NEXT:    xvcvsxwsp 1, 34
 ; CHECK-NEXT:    ld 7, 24(3)
 ; CHECK-NEXT:    ld 6, 16(3)
 ; CHECK-NEXT:    ld 5, 8(3)
 ; CHECK-NEXT:    ld 4, 0(3)
+; CHECK-NEXT:    # kill: def $f1 killed $f1 killed $vsl1
 ; CHECK-NEXT:    bl test_byval_mem32_2
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    addi 1, 1, 32
@@ -450,23 +451,25 @@
 ; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    addis 3, 2, .LC5@toc@ha
 ; CHECK-NEXT:    li 4, 16
-; CHECK-NEXT:    addis 5, 2, .LCPI22_1@toc@ha
+; CHECK-NEXT:    vspltisw 2, 1
+; CHECK-NEXT:    vspltisw 3, 4
+; CHECK-NEXT:    li 5, 3
 ; CHECK-NEXT:    li 7, 2
 ; CHECK-NEXT:    ld 3, .LC5@toc@l(3)
-; CHECK-NEXT:    lfs 2, .LCPI22_1@toc@l(5)
-; CHECK-NEXT:    li 5, 3
+; CHECK-NEXT:    xvcvsxwdp 2, 35
 ; CHECK-NEXT:    lxvd2x 0, 3, 4
 ; CHECK-NEXT:    li 4, 88
+; CHECK-NEXT:    # kill: def $f2 killed $f2 killed $vsl2
 ; CHECK-NEXT:    stxvd2x 0, 1, 4
 ; CHECK-NEXT:    li 4, 72
 ; CHECK-NEXT:    lxvd2x 0, 0, 3
 ; CHECK-NEXT:    stxvd2x 0, 1, 4
-; CHECK-NEXT:    addis 4, 2, .LCPI22_0@toc@ha
-; CHECK-NEXT:    lfs 1, .LCPI22_0@toc@l(4)
+; CHECK-NEXT:    xvcvsxwsp 1, 34
 ; CHECK-NEXT:    ld 10, 16(3)
 ; CHECK-NEXT:    ld 9, 8(3)
 ; CHECK-NEXT:    ld 8, 0(3)
 ; CHECK-NEXT:    li 3, 1
+; CHECK-NEXT:    # kill: def $f1 killed $f1 killed $vsl1
 ; CHECK-NEXT:    bl test_byval_mem32_3
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    addi 1, 1, 112
diff --git a/llvm/test/CodeGen/PowerPC/fma-combine.ll b/llvm/test/CodeGen/PowerPC/fma-combine.ll
--- a/llvm/test/CodeGen/PowerPC/fma-combine.ll
+++ b/llvm/test/CodeGen/PowerPC/fma-combine.ll
@@ -141,16 +141,16 @@
 define dso_local float @fma_combine_no_ice() {
 ; CHECK-FAST-LABEL: fma_combine_no_ice:
 ; CHECK-FAST:       # %bb.0:
+; CHECK-FAST-NEXT:    vspltisw 2, 1
 ; CHECK-FAST-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
-; CHECK-FAST-NEXT:    lfs 0, .LCPI4_0@toc@l(3)
-; CHECK-FAST-NEXT:    addis 3, 2, .LCPI4_1@toc@ha
 ; CHECK-FAST-NEXT:    lfs 2, 0(3)
-; CHECK-FAST-NEXT:    lfs 3, .LCPI4_1@toc@l(3)
-; CHECK-FAST-NEXT:    addis 3, 2, .LCPI4_2@toc@ha
-; CHECK-FAST-NEXT:    lfs 1, .LCPI4_2@toc@l(3)
-; CHECK-FAST-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-FAST-NEXT:    xsmaddasp 1, 2, 3
-; CHECK-FAST-NEXT:    xsnmsubasp 1, 3, 2
+; CHECK-FAST-NEXT:    lfs 1, .LCPI4_0@toc@l(3)
+; CHECK-FAST-NEXT:    addis 3, 2, .LCPI4_1@toc@ha
+; CHECK-FAST-NEXT:    xvcvsxwsp 0, 34
+; CHECK-FAST-NEXT:    xsmaddasp 0, 2, 1
+; CHECK-FAST-NEXT:    lfs 1, .LCPI4_1@toc@l(3)
+; CHECK-FAST-NEXT:    xsmaddasp 1, 2, 0
+; CHECK-FAST-NEXT:    xsnmsubasp 1, 0, 2
 ; CHECK-FAST-NEXT:    blr
 ;
 ; CHECK-FAST-NOVSX-LABEL: fma_combine_no_ice:
@@ -169,17 +169,17 @@
 ;
 ; CHECK-LABEL: fma_combine_no_ice:
 ; CHECK:       # %bb.0:
+; CHECK-NEXT:    vspltisw 2, 1
 ; CHECK-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
-; CHECK-NEXT:    lfs 0, .LCPI4_0@toc@l(3)
-; CHECK-NEXT:    addis 3, 2, .LCPI4_1@toc@ha
 ; CHECK-NEXT:    lfs 2, 0(3)
-; CHECK-NEXT:    lfs 3, .LCPI4_1@toc@l(3)
-; CHECK-NEXT:    addis 3, 2, .LCPI4_2@toc@ha
-; CHECK-NEXT:    lfs 1, .LCPI4_2@toc@l(3)
-; CHECK-NEXT:    fmr 4, 3
-; CHECK-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-NEXT:    xsnmaddasp 4, 2, 0
-; CHECK-NEXT:    xsmaddasp 1, 2, 3
+; CHECK-NEXT:    lfs 3, .LCPI4_0@toc@l(3)
+; CHECK-NEXT:    addis 3, 2, .LCPI4_1@toc@ha
+; CHECK-NEXT:    lfs 1, .LCPI4_1@toc@l(3)
+; CHECK-NEXT:    xvcvsxwsp 0, 34
+; CHECK-NEXT:    fmr 4, 0
+; CHECK-NEXT:    xsmaddasp 0, 2, 3
+; CHECK-NEXT:    xsnmaddasp 4, 2, 3
+; CHECK-NEXT:    xsmaddasp 1, 2, 0
 ; CHECK-NEXT:    xsmaddasp 1, 4, 2
 ; CHECK-NEXT:    blr
   %tmp = load float, ptr undef, align 4
@@ -201,11 +201,12 @@
 define dso_local double @getNegatedExpression_crash(double %x, double %y) {
 ; CHECK-FAST-LABEL: getNegatedExpression_crash:
 ; CHECK-FAST:       # %bb.0:
-; CHECK-FAST-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
-; CHECK-FAST-NEXT:    lfs 3, .LCPI5_1@toc@l(3)
+; CHECK-FAST-NEXT:    vspltisw 2, -1
 ; CHECK-FAST-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
 ; CHECK-FAST-NEXT:    lfs 4, .LCPI5_0@toc@l(3)
+; CHECK-FAST-NEXT:    xvcvsxwdp 3, 34
 ; CHECK-FAST-NEXT:    xssubdp 0, 1, 3
+; CHECK-FAST-NEXT:    # kill: def $f3 killed $f3 killed $vsl3
 ; CHECK-FAST-NEXT:    xsmaddadp 3, 1, 4
 ; CHECK-FAST-NEXT:    xsmaddadp 0, 3, 2
 ; CHECK-FAST-NEXT:    fmr 1, 0
@@ -224,11 +225,12 @@
 ;
 ; CHECK-LABEL: getNegatedExpression_crash:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
-; CHECK-NEXT:    lfs 3, .LCPI5_1@toc@l(3)
+; CHECK-NEXT:    vspltisw 2, -1
 ; CHECK-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
 ; CHECK-NEXT:    lfs 4, .LCPI5_0@toc@l(3)
+; CHECK-NEXT:    xvcvsxwdp 3, 34
 ; CHECK-NEXT:    xssubdp 0, 1, 3
+; CHECK-NEXT:    # kill: def $f3 killed $f3 killed $vsl3
 ; CHECK-NEXT:    xsmaddadp 3, 1, 4
 ; CHECK-NEXT:    xsmaddadp 0, 3, 2
 ; CHECK-NEXT:    fmr 1, 0
diff --git a/llvm/test/CodeGen/PowerPC/fma-mutate.ll b/llvm/test/CodeGen/PowerPC/fma-mutate.ll
--- a/llvm/test/CodeGen/PowerPC/fma-mutate.ll
+++ b/llvm/test/CodeGen/PowerPC/fma-mutate.ll
@@ -12,19 +12,20 @@
 ; CHECK-NEXT:    xstsqrtdp 0, 1
 ; CHECK-NEXT:    bc 12, 2, .LBB0_2
 ; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    vspltisw 2, -3
 ; CHECK-NEXT:    xsrsqrtedp 0, 1
 ; CHECK-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
-; CHECK-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
-; CHECK-NEXT:    lfs 4, .LCPI0_1@toc@l(3)
-; CHECK-NEXT:    xsmuldp 2, 1, 0
-; CHECK-NEXT:    xsmaddmdp 2, 0, 3
+; CHECK-NEXT:    lfs 4, .LCPI0_0@toc@l(3)
+; CHECK-NEXT:    xvcvsxwdp 2, 34
+; CHECK-NEXT:    xsmuldp 3, 1, 0
+; CHECK-NEXT:    fmr 5, 2
+; CHECK-NEXT:    xsmaddadp 5, 3, 0
 ; CHECK-NEXT:    xsmuldp 0, 0, 4
-; CHECK-NEXT:    xsmuldp 0, 0, 2
+; CHECK-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-NEXT:    xsmuldp 1, 1, 0
-; CHECK-NEXT:    xsmaddadp 3, 1, 0
+; CHECK-NEXT:    xsmaddadp 2, 1, 0
 ; CHECK-NEXT:    xsmuldp 0, 1, 4
-; CHECK-NEXT:    xsmuldp 1, 0, 3
+; CHECK-NEXT:    xsmuldp 1, 0, 2
 ; CHECK-NEXT:    blr
 ; CHECK-NEXT:  .LBB0_2:
 ; CHECK-NEXT:    xssqrtdp 1, 1
diff --git a/llvm/test/CodeGen/PowerPC/fmf-propagation.ll b/llvm/test/CodeGen/PowerPC/fmf-propagation.ll
--- a/llvm/test/CodeGen/PowerPC/fmf-propagation.ll
+++ b/llvm/test/CodeGen/PowerPC/fmf-propagation.ll
@@ -303,21 +303,21 @@
 ; FMF-LABEL: sqrt_afn_ieee:
 ; FMF:       # %bb.0:
 ; FMF-NEXT:    xsabsdp 0, 1
-; FMF-NEXT:    addis 3, 2, .LCPI11_2@toc@ha
-; FMF-NEXT:    lfs 2, .LCPI11_2@toc@l(3)
+; FMF-NEXT:    addis 3, 2, .LCPI11_1@toc@ha
+; FMF-NEXT:    vspltisw 2, -3
+; FMF-NEXT:    lfs 2, .LCPI11_1@toc@l(3)
 ; FMF-NEXT:    fcmpu 0, 0, 2
+; FMF-NEXT:    xvcvsxwsp 2, 34
 ; FMF-NEXT:    xxlxor 0, 0, 0
 ; FMF-NEXT:    blt 0, .LBB11_2
 ; FMF-NEXT:  # %bb.1:
 ; FMF-NEXT:    xsrsqrtesp 0, 1
 ; FMF-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
-; FMF-NEXT:    lfs 2, .LCPI11_0@toc@l(3)
-; FMF-NEXT:    addis 3, 2, .LCPI11_1@toc@ha
-; FMF-NEXT:    lfs 3, .LCPI11_1@toc@l(3)
+; FMF-NEXT:    lfs 3, .LCPI11_0@toc@l(3)
 ; FMF-NEXT:    xsmulsp 1, 1, 0
 ; FMF-NEXT:    xsmulsp 0, 1, 0
-; FMF-NEXT:    xsmulsp 1, 1, 2
-; FMF-NEXT:    xsaddsp 0, 0, 3
+; FMF-NEXT:    xsmulsp 1, 1, 3
+; FMF-NEXT:    xsaddsp 0, 0, 2
 ; FMF-NEXT:    xsmulsp 0, 1, 0
 ; FMF-NEXT:  .LBB11_2:
 ; FMF-NEXT:    fmr 1, 0
@@ -326,17 +326,17 @@
 ; GLOBAL-LABEL: sqrt_afn_ieee:
 ; GLOBAL:       # %bb.0:
 ; GLOBAL-NEXT:    xsabsdp 0, 1
-; GLOBAL-NEXT:    addis 3, 2, .LCPI11_2@toc@ha
-; GLOBAL-NEXT:    lfs 2, .LCPI11_2@toc@l(3)
+; GLOBAL-NEXT:    addis 3, 2, .LCPI11_1@toc@ha
+; GLOBAL-NEXT:    vspltisw 2, -3
+; GLOBAL-NEXT:    lfs 2, .LCPI11_1@toc@l(3)
 ; GLOBAL-NEXT:    fcmpu 0, 0, 2
+; GLOBAL-NEXT:    xvcvsxwsp 2, 34
 ; GLOBAL-NEXT:    xxlxor 0, 0, 0
 ; GLOBAL-NEXT:    blt 0, .LBB11_2
 ; GLOBAL-NEXT:  # %bb.1:
 ; GLOBAL-NEXT:    xsrsqrtesp 0, 1
 ; GLOBAL-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
-; GLOBAL-NEXT:    lfs 2, .LCPI11_0@toc@l(3)
-; GLOBAL-NEXT:    addis 3, 2, .LCPI11_1@toc@ha
-; GLOBAL-NEXT:    lfs 3, .LCPI11_1@toc@l(3)
+; GLOBAL-NEXT:    lfs 3, .LCPI11_0@toc@l(3)
 ; GLOBAL-NEXT:    xsmulsp 1, 1, 0
 ; GLOBAL-NEXT:    xsmaddasp 2, 1, 0
 ; GLOBAL-NEXT:    xsmulsp 0, 1, 3
@@ -374,18 +374,18 @@
 ; FMF-LABEL: sqrt_afn_preserve_sign:
 ; FMF:       # %bb.0:
 ; FMF-NEXT:    xxlxor 0, 0, 0
+; FMF-NEXT:    vspltisw 2, -3
 ; FMF-NEXT:    fcmpu 0, 1, 0
+; FMF-NEXT:    xvcvsxwsp 2, 34
 ; FMF-NEXT:    beq 0, .LBB13_2
 ; FMF-NEXT:  # %bb.1:
 ; FMF-NEXT:    xsrsqrtesp 0, 1
 ; FMF-NEXT:    addis 3, 2, .LCPI13_0@toc@ha
-; FMF-NEXT:    lfs 2, .LCPI13_0@toc@l(3)
-; FMF-NEXT:    addis 3, 2, .LCPI13_1@toc@ha
-; FMF-NEXT:    lfs 3, .LCPI13_1@toc@l(3)
+; FMF-NEXT:    lfs 3, .LCPI13_0@toc@l(3)
 ; FMF-NEXT:    xsmulsp 1, 1, 0
 ; FMF-NEXT:    xsmulsp 0, 1, 0
-; FMF-NEXT:    xsmulsp 1, 1, 2
-; FMF-NEXT:    xsaddsp 0, 0, 3
+; FMF-NEXT:    xsmulsp 1, 1, 3
+; FMF-NEXT:    xsaddsp 0, 0, 2
 ; FMF-NEXT:    xsmulsp 0, 1, 0
 ; FMF-NEXT:  .LBB13_2:
 ; FMF-NEXT:    fmr 1, 0
@@ -394,14 +394,14 @@
 ; GLOBAL-LABEL: sqrt_afn_preserve_sign:
 ; GLOBAL:       # %bb.0:
 ; GLOBAL-NEXT:    xxlxor 0, 0, 0
+; GLOBAL-NEXT:    vspltisw 2, -3
 ; GLOBAL-NEXT:    fcmpu 0, 1, 0
+; GLOBAL-NEXT:    xvcvsxwsp 2, 34
 ; GLOBAL-NEXT:    beq 0, .LBB13_2
 ; GLOBAL-NEXT:  # %bb.1:
 ; GLOBAL-NEXT:    xsrsqrtesp 0, 1
 ; GLOBAL-NEXT:    addis 3, 2, .LCPI13_0@toc@ha
-; GLOBAL-NEXT:    lfs 2, .LCPI13_0@toc@l(3)
-; GLOBAL-NEXT:    addis 3, 2, .LCPI13_1@toc@ha
-; GLOBAL-NEXT:    lfs 3, .LCPI13_1@toc@l(3)
+; GLOBAL-NEXT:    lfs 3, .LCPI13_0@toc@l(3)
 ; GLOBAL-NEXT:    xsmulsp 1, 1, 0
 ; GLOBAL-NEXT:    xsmaddasp 2, 1, 0
 ; GLOBAL-NEXT:    xsmulsp 0, 1, 3
@@ -441,17 +441,17 @@
 ; FMF-LABEL: sqrt_fast_ieee:
 ; FMF:       # %bb.0:
 ; FMF-NEXT:    xsabsdp 0, 1
-; FMF-NEXT:    addis 3, 2, .LCPI15_2@toc@ha
-; FMF-NEXT:    lfs 2, .LCPI15_2@toc@l(3)
+; FMF-NEXT:    addis 3, 2, .LCPI15_1@toc@ha
+; FMF-NEXT:    vspltisw 2, -3
+; FMF-NEXT:    lfs 2, .LCPI15_1@toc@l(3)
 ; FMF-NEXT:    fcmpu 0, 0, 2
+; FMF-NEXT:    xvcvsxwsp 2, 34
 ; FMF-NEXT:    xxlxor 0, 0, 0
 ; FMF-NEXT:    blt 0, .LBB15_2
 ; FMF-NEXT:  # %bb.1:
 ; FMF-NEXT:    xsrsqrtesp 0, 1
 ; FMF-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
-; FMF-NEXT:    lfs 2, .LCPI15_0@toc@l(3)
-; FMF-NEXT:    addis 3, 2, .LCPI15_1@toc@ha
-; FMF-NEXT:    lfs 3, .LCPI15_1@toc@l(3)
+; FMF-NEXT:    lfs 3, .LCPI15_0@toc@l(3)
 ; FMF-NEXT:    xsmulsp 1, 1, 0
 ; FMF-NEXT:    xsmaddasp 2, 1, 0
 ; FMF-NEXT:    xsmulsp 0, 1, 3
@@ -463,17 +463,17 @@
 ; GLOBAL-LABEL: sqrt_fast_ieee:
 ; GLOBAL:       # %bb.0:
 ; GLOBAL-NEXT:    xsabsdp 0, 1
-; GLOBAL-NEXT:    addis 3, 2, .LCPI15_2@toc@ha
-; GLOBAL-NEXT:    lfs 2, .LCPI15_2@toc@l(3)
+; GLOBAL-NEXT:    addis 3, 2, .LCPI15_1@toc@ha
+; GLOBAL-NEXT:    vspltisw 2, -3
+; GLOBAL-NEXT:    lfs 2, .LCPI15_1@toc@l(3)
 ; GLOBAL-NEXT:    fcmpu 0, 0, 2
+; GLOBAL-NEXT:    xvcvsxwsp 2, 34
 ; GLOBAL-NEXT:    xxlxor 0, 0, 0
 ; GLOBAL-NEXT:    blt 0, .LBB15_2
 ; GLOBAL-NEXT:  # %bb.1:
 ; GLOBAL-NEXT:    xsrsqrtesp 0, 1
 ; GLOBAL-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
-; GLOBAL-NEXT:    lfs 2, .LCPI15_0@toc@l(3)
-; GLOBAL-NEXT:    addis 3, 2, .LCPI15_1@toc@ha
-; GLOBAL-NEXT:    lfs 3, .LCPI15_1@toc@l(3)
+; GLOBAL-NEXT:    lfs 3, .LCPI15_0@toc@l(3)
 ; GLOBAL-NEXT:    xsmulsp 1, 1, 0
 ; GLOBAL-NEXT:    xsmaddasp 2, 1, 0
 ; GLOBAL-NEXT:    xsmulsp 0, 1, 3
@@ -499,14 +499,14 @@
 ; FMF-LABEL: sqrt_fast_preserve_sign:
 ; FMF:       # %bb.0:
 ; FMF-NEXT:    xxlxor 0, 0, 0
+; FMF-NEXT:    vspltisw 2, -3
 ; FMF-NEXT:    fcmpu 0, 1, 0
+; FMF-NEXT:    xvcvsxwsp 2, 34
 ; FMF-NEXT:    beq 0, .LBB16_2
 ; FMF-NEXT:  # %bb.1:
 ; FMF-NEXT:    xsrsqrtesp 0, 1
 ; FMF-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
-; FMF-NEXT:    lfs 2, .LCPI16_0@toc@l(3)
-; FMF-NEXT:    addis 3, 2, .LCPI16_1@toc@ha
-; FMF-NEXT:    lfs 3, .LCPI16_1@toc@l(3)
+; FMF-NEXT:    lfs 3, .LCPI16_0@toc@l(3)
 ; FMF-NEXT:    xsmulsp 1, 1, 0
 ; FMF-NEXT:    xsmaddasp 2, 1, 0
 ; FMF-NEXT:    xsmulsp 0, 1, 3
@@ -518,14 +518,14 @@
 ; GLOBAL-LABEL: sqrt_fast_preserve_sign:
 ; GLOBAL:       # %bb.0:
 ; GLOBAL-NEXT:    xxlxor 0, 0, 0
+; GLOBAL-NEXT:    vspltisw 2, -3
 ; GLOBAL-NEXT:    fcmpu 0, 1, 0
+; GLOBAL-NEXT:    xvcvsxwsp 2, 34
 ; GLOBAL-NEXT:    beq 0, .LBB16_2
 ; GLOBAL-NEXT:  # %bb.1:
 ; GLOBAL-NEXT:    xsrsqrtesp 0, 1
 ; GLOBAL-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
-; GLOBAL-NEXT:    lfs 2, .LCPI16_0@toc@l(3)
-; GLOBAL-NEXT:    addis 3, 2, .LCPI16_1@toc@ha
-; GLOBAL-NEXT:    lfs 3, .LCPI16_1@toc@l(3)
+; GLOBAL-NEXT:    lfs 3, .LCPI16_0@toc@l(3)
 ; GLOBAL-NEXT:    xsmulsp 1, 1, 0
 ; GLOBAL-NEXT:    xsmaddasp 2, 1, 0
 ; GLOBAL-NEXT:    xsmulsp 0, 1, 3
diff --git a/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll b/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
--- a/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
+++ b/llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
@@ -1231,11 +1231,12 @@
 ; P8-NEXT:    bl __gnu_h2f_ieee
 ; P8-NEXT:    nop
 ; P8-NEXT:    xxlxor f0, f0, f0
+; P8-NEXT:    vspltisw v2, 1
 ; P8-NEXT:    fcmpu cr0, f1, f0
+; P8-NEXT:    xvcvsxwsp vs1, vs34
 ; P8-NEXT:    beq cr0, .LBB20_2
 ; P8-NEXT:  # %bb.1:
-; P8-NEXT:    addis r3, r2, .LCPI20_0@toc@ha
-; P8-NEXT:    lfs f0, .LCPI20_0@toc@l(r3)
+; P8-NEXT:    fmr f0, f1
 ; P8-NEXT:  .LBB20_2:
 ; P8-NEXT:    fmr f1, f0
 ; P8-NEXT:    addi r1, r1, 32
@@ -1246,16 +1247,17 @@
 ; CHECK-LABEL: PR40273:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xscvdphp f0, f1
+; CHECK-NEXT:    vspltisw v2, 1
 ; CHECK-NEXT:    xxlxor f1, f1, f1
 ; CHECK-NEXT:    mffprwz r3, f0
 ; CHECK-NEXT:    clrlwi r3, r3, 16
 ; CHECK-NEXT:    mtfprwz f0, r3
 ; CHECK-NEXT:    xscvhpdp f0, f0
 ; CHECK-NEXT:    fcmpu cr0, f0, f1
+; CHECK-NEXT:    xvcvsxwsp vs0, vs34
 ; CHECK-NEXT:    beqlr cr0
 ; CHECK-NEXT:  # %bb.1:
-; CHECK-NEXT:    addis r3, r2, .LCPI20_0@toc@ha
-; CHECK-NEXT:    lfs f1, .LCPI20_0@toc@l(r3)
+; CHECK-NEXT:    fmr f1, f0
 ; CHECK-NEXT:    blr
 ;
 ; SOFT-LABEL: PR40273:
diff --git a/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll b/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
--- a/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
+++ b/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
@@ -1,39 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
 ; Function Attrs: nounwind
 define dso_local void @test(ptr nocapture readonly %Fptr, ptr nocapture %Vptr) local_unnamed_addr #0 !dbg !10 {
 ; CHECK-LABEL: test:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:          #DEBUG_VALUE: test:Fptr <- $x3
-; CHECK-NEXT:          #DEBUG_VALUE: test:Vptr <- $x4
-; CHECK-NEXT:          addis 5, 2, .LCPI0_0@toc@ha
+; CHECK:         .loc 1 1 0 # test.c:1:0
+; CHECK-NEXT:    .cfi_sections .debug_frame
+; CHECK-NEXT:    .cfi_startproc
+; CHECK-NEXT:  .Lfunc_gep0:
+; CHECK-NEXT:    addis 2, 12, .TOC.-.Lfunc_gep0@ha
+; CHECK-NEXT:    addi 2, 2, .TOC.-.Lfunc_gep0@l
+; CHECK-NEXT:  .Lfunc_lep0:
+; CHECK-NEXT:    .localentry test, .Lfunc_lep0-.Lfunc_gep0
+; CHECK-NEXT:  # %bb.0: # %entry
+; CHECK-NEXT:    #DEBUG_VALUE: test:Fptr <- $x3
+; CHECK-NEXT:    #DEBUG_VALUE: test:Vptr <- $x4
+; CHECK-NEXT:    vspltisw 2, 1
 ; CHECK-NEXT:  .Ltmp0:
-; CHECK-NEXT:          .loc    1 2 38 prologue_end
-; CHECK-NEXT:          lfs 0, 0(3)
-; CHECK-NEXT:          addis 3, 2, .LCPI0_1@toc@ha
+; CHECK-NEXT:    .loc 1 2 38 prologue_end # test.c:2:38
+; CHECK-NEXT:    lfs 1, 0(3)
+; CHECK-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
 ; CHECK-NEXT:  .Ltmp1:
-; CHECK-NEXT:          .loc    1 0 38 is_stmt 0
-; CHECK-NEXT:          lfs 1, .LCPI0_0@toc@l(5)
-; CHECK-NEXT:          lfd 2, .LCPI0_1@toc@l(3)
-; CHECK-NEXT:          .loc    1 2 27
-; CHECK-NEXT:          xssubdp 1, 1, 0
-; CHECK-NEXT:          .loc    1 2 45
-; CHECK-NEXT:          xsadddp 1, 1, 2
+; CHECK-NEXT:    .loc 1 0 38 is_stmt 0 # test.c:0:38
+; CHECK-NEXT:    lfd 2, .LCPI0_0@toc@l(3)
+; CHECK-NEXT:    xvcvsxwdp 0, 34
+; CHECK-NEXT:    .loc 1 2 27 # test.c:2:27
+; CHECK-NEXT:    xssubdp 0, 0, 1
+; CHECK-NEXT:    .loc 1 2 45 # test.c:2:45
+; CHECK-NEXT:    xsadddp 0, 0, 2
 ; CHECK-NEXT:  .Ltmp2:
-; CHECK-NEXT:          #DEBUG_VALUE: test:Val <- undef
-; CHECK-NEXT:          .loc    1 0 45
-; CHECK-NEXT:          xxlxor 2, 2, 2
-; CHECK-NEXT:          .loc    1 3 26 is_stmt 1
-; CHECK-NEXT:          xxmrghd 0, 0, 2
-; CHECK-NEXT:          xxmrghd 1, 2, 1
-; CHECK-NEXT:          xvcvdpsp 34, 0
-; CHECK-NEXT:          xvcvdpsp 35, 1
-; CHECK-NEXT:          vmrgew 2, 2, 3
-; CHECK-NEXT:          .loc    1 3 9 is_stmt 0
-; CHECK-NEXT:          xxswapd	0, 34
-; CHECK-NEXT:          stxvd2x 0, 0, 4
-; CHECK-NEXT:          .loc    1 4 1 is_stmt 1
-; CHECK-NEXT:          blr
+; CHECK-NEXT:    #DEBUG_VALUE: test:Val <- undef
+; CHECK-NEXT:    .loc 1 0 45 # test.c:0:45
+; CHECK-NEXT:    xxlxor 2, 2, 2
+; CHECK-NEXT:    .loc 1 3 26 is_stmt 1 # test.c:3:26
+; CHECK-NEXT:    xxmrghd 1, 1, 2
+; CHECK-NEXT:    xxmrghd 0, 2, 0
+; CHECK-NEXT:    xvcvdpsp 34, 1
+; CHECK-NEXT:    xvcvdpsp 35, 0
+; CHECK-NEXT:    vmrgew 2, 2, 3
+; CHECK-NEXT:    .loc 1 3 9 is_stmt 0 # test.c:3:9
+; CHECK-NEXT:    xxswapd 0, 34
+; CHECK-NEXT:    stxvd2x 0, 0, 4
+; CHECK-NEXT:    .loc 1 4 1 is_stmt 1 # test.c:4:1
+; CHECK-NEXT:    blr
+; CHECK-NEXT:  .Ltmp3:
 entry:
   call void @llvm.dbg.value(metadata ptr %Fptr, metadata !19, metadata !DIExpression()), !dbg !22
   call void @llvm.dbg.value(metadata ptr %Vptr, metadata !20, metadata !DIExpression()), !dbg !22
diff --git a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
--- a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
@@ -144,22 +144,23 @@
 ; CHECK-NEXT:  .LBB0_14: # %bb41
 ; CHECK-NEXT:    # implicit-def: $r3
 ; CHECK-NEXT:  .LBB0_15: # %bb50
+; CHECK-NEXT:    vspltisw v2, -1
 ; CHECK-NEXT:    li r4, 0
-; CHECK-NEXT:    xxspltidp vs3, -1082130432
-; CHECK-NEXT:    xxspltidp vs4, -1082130432
 ; CHECK-NEXT:    extsh r9, r3
 ; CHECK-NEXT:    extsw r6, r28
 ; CHECK-NEXT:    li r5, 0
-; CHECK-NEXT:    li r7, 0
 ; CHECK-NEXT:    std r30, 104(r1)
 ; CHECK-NEXT:    std r29, 96(r1)
+; CHECK-NEXT:    std r4, 152(r1)
+; CHECK-NEXT:    li r4, -1
+; CHECK-NEXT:    li r7, 0
 ; CHECK-NEXT:    li r8, 0
 ; CHECK-NEXT:    li r10, 0
 ; CHECK-NEXT:    xxlxor f1, f1, f1
-; CHECK-NEXT:    std r4, 152(r1)
-; CHECK-NEXT:    li r4, -1
+; CHECK-NEXT:    xvcvsxwsp vs3, v2
 ; CHECK-NEXT:    std r4, 112(r1)
 ; CHECK-NEXT:    li r4, 1024
+; CHECK-NEXT:    fmr f4, f3
 ; CHECK-NEXT:    bl call_4@notoc
 ; CHECK-NEXT:  .LBB0_16: # %bb54
 ; CHECK-NEXT:    bc 12, 4*cr2+un, .LBB0_19
@@ -302,22 +303,23 @@
 ; CHECK-BE-NEXT:  .LBB0_14: # %bb41
 ; CHECK-BE-NEXT:    # implicit-def: $r3
 ; CHECK-BE-NEXT:  .LBB0_15: # %bb50
+; CHECK-BE-NEXT:    vspltisw v2, -1
 ; CHECK-BE-NEXT:    li r4, 0
-; CHECK-BE-NEXT:    xxspltidp vs3, -1082130432
-; CHECK-BE-NEXT:    xxspltidp vs4, -1082130432
 ; CHECK-BE-NEXT:    extsh r9, r3
 ; CHECK-BE-NEXT:    extsw r6, r28
 ; CHECK-BE-NEXT:    li r5, 0
-; CHECK-BE-NEXT:    li r7, 0
 ; CHECK-BE-NEXT:    std r30, 120(r1)
 ; CHECK-BE-NEXT:    std r29, 112(r1)
+; CHECK-BE-NEXT:    std r4, 168(r1)
+; CHECK-BE-NEXT:    li r4, -1
+; CHECK-BE-NEXT:    li r7, 0
 ; CHECK-BE-NEXT:    li r8, 0
 ; CHECK-BE-NEXT:    li r10, 0
 ; CHECK-BE-NEXT:    xxlxor f1, f1, f1
-; CHECK-BE-NEXT:    std r4, 168(r1)
-; CHECK-BE-NEXT:    li r4, -1
+; CHECK-BE-NEXT:    xvcvsxwsp vs3, v2
 ; CHECK-BE-NEXT:    std r4, 128(r1)
 ; CHECK-BE-NEXT:    li r4, 1024
+; CHECK-BE-NEXT:    fmr f4, f3
 ; CHECK-BE-NEXT:    bl call_4
 ; CHECK-BE-NEXT:    nop
 ; CHECK-BE-NEXT:  .LBB0_16: # %bb54
diff --git a/llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll b/llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
--- a/llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
+++ b/llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
@@ -11,30 +11,30 @@
 ; CHECK-LNX-LABEL: llvmintr_powf_f32_fast025:
 ; CHECK-LNX:       # %bb.0: # %entry
 ; CHECK-LNX-NEXT:    xsrsqrtesp 0, 1
+; CHECK-LNX-NEXT:    vspltisw 2, -3
 ; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-LNX-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
+; CHECK-LNX-NEXT:    lfs 4, .LCPI0_0@toc@l(3)
 ; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
-; CHECK-LNX-NEXT:    lfs 4, .LCPI0_1@toc@l(3)
-; CHECK-LNX-NEXT:    addis 3, 2, .LCPI0_2@toc@ha
-; CHECK-LNX-NEXT:    lfs 5, .LCPI0_2@toc@l(3)
-; CHECK-LNX-NEXT:    xsmulsp 2, 1, 0
+; CHECK-LNX-NEXT:    lfs 5, .LCPI0_1@toc@l(3)
+; CHECK-LNX-NEXT:    xvcvsxwsp 2, 34
+; CHECK-LNX-NEXT:    xsmulsp 3, 1, 0
 ; CHECK-LNX-NEXT:    xsabsdp 1, 1
-; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
-; CHECK-LNX-NEXT:    xsmulsp 2, 2, 3
+; CHECK-LNX-NEXT:    xsmulsp 0, 3, 0
+; CHECK-LNX-NEXT:    xsmulsp 3, 3, 4
 ; CHECK-LNX-NEXT:    xssubsp 1, 1, 5
-; CHECK-LNX-NEXT:    xsaddsp 0, 0, 4
-; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
-; CHECK-LNX-NEXT:    xxlxor 2, 2, 2
-; CHECK-LNX-NEXT:    fsel 0, 1, 0, 2
+; CHECK-LNX-NEXT:    xsaddsp 0, 0, 2
+; CHECK-LNX-NEXT:    xsmulsp 0, 3, 0
+; CHECK-LNX-NEXT:    xxlxor 3, 3, 3
+; CHECK-LNX-NEXT:    fsel 0, 1, 0, 3
 ; CHECK-LNX-NEXT:    xsrsqrtesp 1, 0
 ; CHECK-LNX-NEXT:    xsmulsp 6, 0, 1
 ; CHECK-LNX-NEXT:    xsabsdp 0, 0
 ; CHECK-LNX-NEXT:    xsmulsp 1, 6, 1
-; CHECK-LNX-NEXT:    xsmulsp 3, 6, 3
+; CHECK-LNX-NEXT:    xsmulsp 4, 6, 4
 ; CHECK-LNX-NEXT:    xssubsp 0, 0, 5
-; CHECK-LNX-NEXT:    xsaddsp 1, 1, 4
-; CHECK-LNX-NEXT:    xsmulsp 1, 3, 1
-; CHECK-LNX-NEXT:    fsel 1, 0, 1, 2
+; CHECK-LNX-NEXT:    xsaddsp 1, 1, 2
+; CHECK-LNX-NEXT:    xsmulsp 1, 4, 1
+; CHECK-LNX-NEXT:    fsel 1, 0, 1, 3
 ; CHECK-LNX-NEXT:    blr
 ;
 ; CHECK-AIX-LABEL: llvmintr_powf_f32_fast025:
@@ -60,11 +60,11 @@
 define double @llvmintr_pow_f64_fast025(double %a) #1 {
 ; CHECK-LNX-LABEL: llvmintr_pow_f64_fast025:
 ; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    vspltisw 2, -3
 ; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
 ; CHECK-LNX-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
-; CHECK-LNX-NEXT:    addis 4, 2, .LCPI1_1@toc@ha
 ; CHECK-LNX-NEXT:    lfs 0, .LCPI1_0@toc@l(3)
-; CHECK-LNX-NEXT:    lfs 2, .LCPI1_1@toc@l(4)
+; CHECK-LNX-NEXT:    xvcvsxwdp 2, 34
 ; CHECK-LNX-NEXT:    bc 12, 2, .LBB1_3
 ; CHECK-LNX-NEXT:  # %bb.1: # %entry
 ; CHECK-LNX-NEXT:    xsrsqrtedp 3, 1
@@ -125,30 +125,30 @@
 ; CHECK-LNX-LABEL: llvmintr_powf_f32_fast075:
 ; CHECK-LNX:       # %bb.0: # %entry
 ; CHECK-LNX-NEXT:    xsrsqrtesp 0, 1
+; CHECK-LNX-NEXT:    vspltisw 2, -3
 ; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
-; CHECK-LNX-NEXT:    lfs 3, .LCPI2_0@toc@l(3)
+; CHECK-LNX-NEXT:    lfs 4, .LCPI2_0@toc@l(3)
 ; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_1@toc@ha
-; CHECK-LNX-NEXT:    lfs 4, .LCPI2_1@toc@l(3)
-; CHECK-LNX-NEXT:    addis 3, 2, .LCPI2_2@toc@ha
-; CHECK-LNX-NEXT:    lfs 5, .LCPI2_2@toc@l(3)
-; CHECK-LNX-NEXT:    xsmulsp 2, 1, 0
+; CHECK-LNX-NEXT:    lfs 5, .LCPI2_1@toc@l(3)
+; CHECK-LNX-NEXT:    xvcvsxwsp 2, 34
+; CHECK-LNX-NEXT:    xsmulsp 3, 1, 0
 ; CHECK-LNX-NEXT:    xsabsdp 1, 1
-; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
-; CHECK-LNX-NEXT:    xsmulsp 2, 2, 3
+; CHECK-LNX-NEXT:    xsmulsp 0, 3, 0
+; CHECK-LNX-NEXT:    xsmulsp 3, 3, 4
 ; CHECK-LNX-NEXT:    xssubsp 1, 1, 5
-; CHECK-LNX-NEXT:    xsaddsp 0, 0, 4
-; CHECK-LNX-NEXT:    xsmulsp 0, 2, 0
-; CHECK-LNX-NEXT:    xxlxor 2, 2, 2
-; CHECK-LNX-NEXT:    fsel 0, 1, 0, 2
+; CHECK-LNX-NEXT:    xsaddsp 0, 0, 2
+; CHECK-LNX-NEXT:    xsmulsp 0, 3, 0
+; CHECK-LNX-NEXT:    xxlxor 3, 3, 3
+; CHECK-LNX-NEXT:    fsel 0, 1, 0, 3
 ; CHECK-LNX-NEXT:    xsrsqrtesp 1, 0
 ; CHECK-LNX-NEXT:    xsmulsp 6, 0, 1
 ; CHECK-LNX-NEXT:    xsmulsp 1, 6, 1
-; CHECK-LNX-NEXT:    xsmulsp 3, 6, 3
-; CHECK-LNX-NEXT:    xsaddsp 1, 1, 4
-; CHECK-LNX-NEXT:    xsabsdp 4, 0
-; CHECK-LNX-NEXT:    xsmulsp 1, 3, 1
-; CHECK-LNX-NEXT:    xssubsp 3, 4, 5
-; CHECK-LNX-NEXT:    fsel 1, 3, 1, 2
+; CHECK-LNX-NEXT:    xsmulsp 4, 6, 4
+; CHECK-LNX-NEXT:    xsaddsp 1, 1, 2
+; CHECK-LNX-NEXT:    xsabsdp 2, 0
+; CHECK-LNX-NEXT:    xsmulsp 1, 4, 1
+; CHECK-LNX-NEXT:    xssubsp 2, 2, 5
+; CHECK-LNX-NEXT:    fsel 1, 2, 1, 3
 ; CHECK-LNX-NEXT:    xsmulsp 1, 0, 1
 ; CHECK-LNX-NEXT:    blr
 ;
@@ -175,11 +175,11 @@
 define double @llvmintr_pow_f64_fast075(double %a) #1 {
 ; CHECK-LNX-LABEL: llvmintr_pow_f64_fast075:
 ; CHECK-LNX:       # %bb.0: # %entry
+; CHECK-LNX-NEXT:    vspltisw 2, -3
 ; CHECK-LNX-NEXT:    xstsqrtdp 0, 1
 ; CHECK-LNX-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-LNX-NEXT:    addis 4, 2, .LCPI3_1@toc@ha
 ; CHECK-LNX-NEXT:    lfs 0, .LCPI3_0@toc@l(3)
-; CHECK-LNX-NEXT:    lfs 2, .LCPI3_1@toc@l(4)
+; CHECK-LNX-NEXT:    xvcvsxwdp 2, 34
 ; CHECK-LNX-NEXT:    bc 12, 2, .LBB3_3
 ; CHECK-LNX-NEXT:  # %bb.1: # %entry
 ; CHECK-LNX-NEXT:    xsrsqrtedp 3, 1
diff --git a/llvm/test/CodeGen/PowerPC/recipest.ll b/llvm/test/CodeGen/PowerPC/recipest.ll
--- a/llvm/test/CodeGen/PowerPC/recipest.ll
+++ b/llvm/test/CodeGen/PowerPC/recipest.ll
@@ -32,33 +32,33 @@
 ;
 ; CHECK-P8-LABEL: foo_fmf:
 ; CHECK-P8:       # %bb.0:
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    xsrsqrtedp 0, 2
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P8-NEXT:    lfs 4, .LCPI0_0@toc@l(3)
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
-; CHECK-P8-NEXT:    lfs 5, .LCPI0_1@toc@l(3)
-; CHECK-P8-NEXT:    fmr 6, 4
-; CHECK-P8-NEXT:    xsmuldp 3, 2, 0
-; CHECK-P8-NEXT:    xsmaddadp 6, 3, 0
+; CHECK-P8-NEXT:    lfs 5, .LCPI0_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwdp 3, 34
+; CHECK-P8-NEXT:    xsmuldp 4, 2, 0
+; CHECK-P8-NEXT:    fmr 6, 3
+; CHECK-P8-NEXT:    xsmaddadp 6, 4, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 6
 ; CHECK-P8-NEXT:    xsmuldp 2, 2, 0
-; CHECK-P8-NEXT:    xsmaddadp 4, 2, 0
+; CHECK-P8-NEXT:    xsmaddadp 3, 2, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
+; CHECK-P8-NEXT:    xsmuldp 0, 0, 3
 ; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: foo_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xsrsqrtedp 0, 2
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P9-NEXT:    lfs 4, .LCPI0_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
 ; CHECK-P9-NEXT:    xsmuldp 3, 2, 0
+; CHECK-P9-NEXT:    xvcvsxwdp 4, 34
 ; CHECK-P9-NEXT:    fmr 5, 4
 ; CHECK-P9-NEXT:    xsmaddadp 5, 3, 0
-; CHECK-P9-NEXT:    lfs 3, .LCPI0_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 3
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-P9-NEXT:    xsmuldp 2, 2, 0
@@ -136,26 +136,26 @@
 ; CHECK-P8-LABEL: foof_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xsrsqrtesp 0, 2
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
-; CHECK-P8-NEXT:    lfs 3, .LCPI3_1@toc@l(3)
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
 ; CHECK-P8-NEXT:    lfs 4, .LCPI3_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwsp 3, 34
 ; CHECK-P8-NEXT:    xsmulsp 2, 2, 0
-; CHECK-P8-NEXT:    xsmulsp 3, 0, 3
-; CHECK-P8-NEXT:    xsmaddasp 4, 2, 0
-; CHECK-P8-NEXT:    xsmulsp 0, 3, 4
+; CHECK-P8-NEXT:    xsmaddasp 3, 2, 0
+; CHECK-P8-NEXT:    xsmulsp 0, 0, 4
+; CHECK-P8-NEXT:    xsmulsp 0, 0, 3
 ; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: foof_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xsrsqrtesp 0, 2
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-P9-NEXT:    lfs 3, .LCPI3_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
 ; CHECK-P9-NEXT:    xsmulsp 2, 2, 0
+; CHECK-P9-NEXT:    xvcvsxwsp 3, 34
 ; CHECK-P9-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-P9-NEXT:    lfs 2, .LCPI3_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 2, .LCPI3_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 2
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 3
 ; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
@@ -212,20 +212,20 @@
 ;
 ; CHECK-P8-LABEL: food_fmf:
 ; CHECK-P8:       # %bb.0:
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    xsrsqrtedp 0, 2
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; CHECK-P8-NEXT:    lfs 4, .LCPI5_0@toc@l(3)
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
-; CHECK-P8-NEXT:    lfs 5, .LCPI5_1@toc@l(3)
-; CHECK-P8-NEXT:    fmr 6, 4
-; CHECK-P8-NEXT:    xsmuldp 3, 2, 0
-; CHECK-P8-NEXT:    xsmaddadp 6, 3, 0
+; CHECK-P8-NEXT:    lfs 5, .LCPI5_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwdp 3, 34
+; CHECK-P8-NEXT:    xsmuldp 4, 2, 0
+; CHECK-P8-NEXT:    fmr 6, 3
+; CHECK-P8-NEXT:    xsmaddadp 6, 4, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 6
 ; CHECK-P8-NEXT:    xsmuldp 2, 2, 0
-; CHECK-P8-NEXT:    xsmaddadp 4, 2, 0
+; CHECK-P8-NEXT:    xsmaddadp 3, 2, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
+; CHECK-P8-NEXT:    xsmuldp 0, 0, 3
 ; CHECK-P8-NEXT:    xsrsp 0, 0
 ; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P8-NEXT:    blr
@@ -233,13 +233,13 @@
 ; CHECK-P9-LABEL: food_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xsrsqrtedp 0, 2
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; CHECK-P9-NEXT:    lfs 4, .LCPI5_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
 ; CHECK-P9-NEXT:    xsmuldp 3, 2, 0
+; CHECK-P9-NEXT:    xvcvsxwdp 4, 34
 ; CHECK-P9-NEXT:    fmr 5, 4
 ; CHECK-P9-NEXT:    xsmaddadp 5, 3, 0
-; CHECK-P9-NEXT:    lfs 3, .LCPI5_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 3, .LCPI5_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 3
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-P9-NEXT:    xsmuldp 2, 2, 0
@@ -300,26 +300,26 @@
 ; CHECK-P8-LABEL: goo_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xsrsqrtesp 0, 2
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI7_1@toc@ha
-; CHECK-P8-NEXT:    lfs 3, .LCPI7_1@toc@l(3)
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
 ; CHECK-P8-NEXT:    lfs 4, .LCPI7_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwsp 3, 34
 ; CHECK-P8-NEXT:    xsmulsp 2, 2, 0
-; CHECK-P8-NEXT:    xsmulsp 3, 0, 3
-; CHECK-P8-NEXT:    xsmaddasp 4, 2, 0
-; CHECK-P8-NEXT:    xsmulsp 0, 3, 4
+; CHECK-P8-NEXT:    xsmaddasp 3, 2, 0
+; CHECK-P8-NEXT:    xsmulsp 0, 0, 4
+; CHECK-P8-NEXT:    xsmulsp 0, 0, 3
 ; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: goo_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xsrsqrtesp 0, 2
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
-; CHECK-P9-NEXT:    lfs 3, .LCPI7_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI7_1@toc@ha
 ; CHECK-P9-NEXT:    xsmulsp 2, 2, 0
+; CHECK-P9-NEXT:    xvcvsxwsp 3, 34
 ; CHECK-P9-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-P9-NEXT:    lfs 2, .LCPI7_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 2, .LCPI7_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 2
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 3
 ; CHECK-P9-NEXT:    xsmulsp 1, 1, 0
@@ -397,10 +397,10 @@
 ; CHECK-P8-LABEL: rsqrt_fmul_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xsrsqrtesp 0, 1
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
-; CHECK-P8-NEXT:    lfs 4, .LCPI10_0@toc@l(3)
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI10_1@toc@ha
-; CHECK-P8-NEXT:    lfs 5, .LCPI10_1@toc@l(3)
+; CHECK-P8-NEXT:    lfs 5, .LCPI10_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwsp 4, 34
 ; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P8-NEXT:    xsmaddasp 4, 1, 0
 ; CHECK-P8-NEXT:    xsmulsp 0, 0, 5
@@ -415,12 +415,12 @@
 ; CHECK-P9-LABEL: rsqrt_fmul_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xsrsqrtesp 0, 1
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
-; CHECK-P9-NEXT:    lfs 4, .LCPI10_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI10_1@toc@ha
 ; CHECK-P9-NEXT:    xsmulsp 1, 1, 0
+; CHECK-P9-NEXT:    xvcvsxwsp 4, 34
 ; CHECK-P9-NEXT:    xsmaddasp 4, 1, 0
-; CHECK-P9-NEXT:    lfs 1, .LCPI10_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 1, .LCPI10_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 1
 ; CHECK-P9-NEXT:    xsresp 1, 2
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 4
@@ -581,9 +581,9 @@
 ;
 ; CHECK-P8-LABEL: foo2_fmf:
 ; CHECK-P8:       # %bb.0:
+; CHECK-P8-NEXT:    vspltisw 2, -1
 ; CHECK-P8-NEXT:    xsredp 3, 2
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
-; CHECK-P8-NEXT:    lfs 0, .LCPI14_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwdp 0, 34
 ; CHECK-P8-NEXT:    xsmaddadp 0, 2, 3
 ; CHECK-P8-NEXT:    xsnmsubadp 3, 3, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 1, 3
@@ -594,9 +594,9 @@
 ;
 ; CHECK-P9-LABEL: foo2_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
+; CHECK-P9-NEXT:    vspltisw 2, -1
 ; CHECK-P9-NEXT:    xsredp 3, 2
-; CHECK-P9-NEXT:    lfs 0, .LCPI14_0@toc@l(3)
+; CHECK-P9-NEXT:    xvcvsxwdp 0, 34
 ; CHECK-P9-NEXT:    xsmaddadp 0, 2, 3
 ; CHECK-P9-NEXT:    xsnmsubadp 3, 3, 0
 ; CHECK-P9-NEXT:    xsmuldp 0, 1, 3
@@ -777,20 +777,20 @@
 ; CHECK-P8-NEXT:    xstsqrtdp 0, 1
 ; CHECK-P8-NEXT:    bc 12, 2, .LBB20_2
 ; CHECK-P8-NEXT:  # %bb.1:
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    xsrsqrtedp 0, 1
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
-; CHECK-P8-NEXT:    lfs 3, .LCPI20_0@toc@l(3)
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI20_1@toc@ha
-; CHECK-P8-NEXT:    lfs 4, .LCPI20_1@toc@l(3)
-; CHECK-P8-NEXT:    fmr 5, 3
-; CHECK-P8-NEXT:    xsmuldp 2, 1, 0
-; CHECK-P8-NEXT:    xsmaddadp 5, 2, 0
+; CHECK-P8-NEXT:    lfs 4, .LCPI20_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwdp 2, 34
+; CHECK-P8-NEXT:    xsmuldp 3, 1, 0
+; CHECK-P8-NEXT:    fmr 5, 2
+; CHECK-P8-NEXT:    xsmaddadp 5, 3, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
-; CHECK-P8-NEXT:    xsmaddadp 3, 1, 0
+; CHECK-P8-NEXT:    xsmaddadp 2, 1, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 1, 4
-; CHECK-P8-NEXT:    xsmuldp 1, 0, 3
+; CHECK-P8-NEXT:    xsmuldp 1, 0, 2
 ; CHECK-P8-NEXT:    blr
 ; CHECK-P8-NEXT:  .LBB20_2:
 ; CHECK-P8-NEXT:    xssqrtdp 1, 1
@@ -802,13 +802,13 @@
 ; CHECK-P9-NEXT:    bc 12, 2, .LBB20_2
 ; CHECK-P9-NEXT:  # %bb.1:
 ; CHECK-P9-NEXT:    xsrsqrtedp 0, 1
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
-; CHECK-P9-NEXT:    lfs 3, .LCPI20_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI20_1@toc@ha
 ; CHECK-P9-NEXT:    xsmuldp 2, 1, 0
+; CHECK-P9-NEXT:    xvcvsxwdp 3, 34
 ; CHECK-P9-NEXT:    fmr 4, 3
 ; CHECK-P9-NEXT:    xsmaddadp 4, 2, 0
-; CHECK-P9-NEXT:    lfs 2, .LCPI20_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 2, .LCPI20_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 2
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 4
 ; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
@@ -853,25 +853,25 @@
 ; CHECK-P8-LABEL: foo3_fmf_crbits_off:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xsabsdp 0, 1
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_2@toc@ha
-; CHECK-P8-NEXT:    lfd 2, .LCPI21_2@toc@l(3)
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
+; CHECK-P8-NEXT:    lfd 2, .LCPI21_1@toc@l(3)
 ; CHECK-P8-NEXT:    xscmpudp 0, 0, 2
 ; CHECK-P8-NEXT:    blt 0, .LBB21_2
 ; CHECK-P8-NEXT:  # %bb.1:
+; CHECK-P8-NEXT:    vspltisw 2, -3
 ; CHECK-P8-NEXT:    xsrsqrtedp 0, 1
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
-; CHECK-P8-NEXT:    lfs 3, .LCPI21_0@toc@l(3)
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
-; CHECK-P8-NEXT:    lfs 4, .LCPI21_1@toc@l(3)
-; CHECK-P8-NEXT:    fmr 5, 3
-; CHECK-P8-NEXT:    xsmuldp 2, 1, 0
-; CHECK-P8-NEXT:    xsmaddadp 5, 2, 0
+; CHECK-P8-NEXT:    lfs 4, .LCPI21_0@toc@l(3)
+; CHECK-P8-NEXT:    xvcvsxwdp 2, 34
+; CHECK-P8-NEXT:    xsmuldp 3, 1, 0
+; CHECK-P8-NEXT:    fmr 5, 2
+; CHECK-P8-NEXT:    xsmaddadp 5, 3, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
 ; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
 ; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
-; CHECK-P8-NEXT:    xsmaddadp 3, 1, 0
+; CHECK-P8-NEXT:    xsmaddadp 2, 1, 0
 ; CHECK-P8-NEXT:    xsmuldp 0, 1, 4
-; CHECK-P8-NEXT:    xsmuldp 1, 0, 3
+; CHECK-P8-NEXT:    xsmuldp 1, 0, 2
 ; CHECK-P8-NEXT:    blr
 ; CHECK-P8-NEXT:  .LBB21_2:
 ; CHECK-P8-NEXT:    xssqrtdp 1, 1
@@ -879,20 +879,20 @@
 ;
 ; CHECK-P9-LABEL: foo3_fmf_crbits_off:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_2@toc@ha
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
 ; CHECK-P9-NEXT:    xsabsdp 0, 1
-; CHECK-P9-NEXT:    lfd 2, .LCPI21_2@toc@l(3)
+; CHECK-P9-NEXT:    lfd 2, .LCPI21_1@toc@l(3)
 ; CHECK-P9-NEXT:    xscmpudp 0, 0, 2
 ; CHECK-P9-NEXT:    blt 0, .LBB21_2
 ; CHECK-P9-NEXT:  # %bb.1:
 ; CHECK-P9-NEXT:    xsrsqrtedp 0, 1
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
-; CHECK-P9-NEXT:    lfs 3, .LCPI21_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
 ; CHECK-P9-NEXT:    xsmuldp 2, 1, 0
+; CHECK-P9-NEXT:    xvcvsxwdp 3, 34
 ; CHECK-P9-NEXT:    fmr 4, 3
 ; CHECK-P9-NEXT:    xsmaddadp 4, 2, 0
-; CHECK-P9-NEXT:    lfs 2, .LCPI21_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 2, .LCPI21_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 2
 ; CHECK-P9-NEXT:    xsmuldp 0, 0, 4
 ; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
@@ -953,17 +953,17 @@
 ; CHECK-P8-LABEL: goo3_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xsabsdp 0, 1
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI23_2@toc@ha
-; CHECK-P8-NEXT:    lfs 2, .LCPI23_2@toc@l(3)
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
+; CHECK-P8-NEXT:    vspltisw 2, -3
+; CHECK-P8-NEXT:    lfs 2, .LCPI23_1@toc@l(3)
 ; CHECK-P8-NEXT:    fcmpu 0, 0, 2
+; CHECK-P8-NEXT:    xvcvsxwsp 2, 34
 ; CHECK-P8-NEXT:    xxlxor 0, 0, 0
 ; CHECK-P8-NEXT:    blt 0, .LBB23_2
 ; CHECK-P8-NEXT:  # %bb.1:
 ; CHECK-P8-NEXT:    xsrsqrtesp 0, 1
 ; CHECK-P8-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
-; CHECK-P8-NEXT:    lfs 2, .LCPI23_0@toc@l(3)
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
-; CHECK-P8-NEXT:    lfs 3, .LCPI23_1@toc@l(3)
+; CHECK-P8-NEXT:    lfs 3, .LCPI23_0@toc@l(3)
 ; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P8-NEXT:    xsmaddasp 2, 1, 0
 ; CHECK-P8-NEXT:    xsmulsp 0, 1, 3
@@ -974,20 +974,20 @@
 ;
 ; CHECK-P9-LABEL: goo3_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_2@toc@ha
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
+; CHECK-P9-NEXT:    vspltisw 2, -3
 ; CHECK-P9-NEXT:    xsabsdp 0, 1
-; CHECK-P9-NEXT:    lfs 2, .LCPI23_2@toc@l(3)
-; CHECK-P9-NEXT:    fcmpu 0, 0, 2
+; CHECK-P9-NEXT:    lfs 3, .LCPI23_1@toc@l(3)
+; CHECK-P9-NEXT:    xvcvsxwsp 2, 34
+; CHECK-P9-NEXT:    fcmpu 0, 0, 3
 ; CHECK-P9-NEXT:    xxlxor 0, 0, 0
 ; CHECK-P9-NEXT:    blt 0, .LBB23_2
 ; CHECK-P9-NEXT:  # %bb.1:
 ; CHECK-P9-NEXT:    xsrsqrtesp 0, 1
 ; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
-; CHECK-P9-NEXT:    lfs 2, .LCPI23_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
 ; CHECK-P9-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P9-NEXT:    xsmaddasp 2, 1, 0
-; CHECK-P9-NEXT:    lfs 0, .LCPI23_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 0, .LCPI23_0@toc@l(3)
 ; CHECK-P9-NEXT:    xsmulsp 0, 1, 0
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 2
 ; CHECK-P9-NEXT:  .LBB23_2:
diff --git a/llvm/test/CodeGen/PowerPC/scalar_cmp.ll b/llvm/test/CodeGen/PowerPC/scalar_cmp.ll
--- a/llvm/test/CodeGen/PowerPC/scalar_cmp.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar_cmp.ll
@@ -895,43 +895,47 @@
 define double @onecmp1(double %a, double %y, double %z) {
 ; FAST-P8-LABEL: onecmp1:
 ; FAST-P8:       # %bb.0: # %entry
-; FAST-P8-NEXT:    addis r3, r2, .LCPI24_0@toc@ha
-; FAST-P8-NEXT:    lfs f0, .LCPI24_0@toc@l(r3)
-; FAST-P8-NEXT:    xssubdp f0, f1, f0
+; FAST-P8-NEXT:    vspltisw v2, -1
+; FAST-P8-NEXT:    xvcvsxwdp vs0, vs34
+; FAST-P8-NEXT:    xsadddp f0, f1, f0
 ; FAST-P8-NEXT:    fsel f1, f0, f2, f3
 ; FAST-P8-NEXT:    blr
 ;
 ; FAST-P9-LABEL: onecmp1:
 ; FAST-P9:       # %bb.0: # %entry
-; FAST-P9-NEXT:    addis r3, r2, .LCPI24_0@toc@ha
-; FAST-P9-NEXT:    lfs f0, .LCPI24_0@toc@l(r3)
-; FAST-P9-NEXT:    xssubdp f0, f1, f0
+; FAST-P9-NEXT:    vspltisw v2, -1
+; FAST-P9-NEXT:    xvcvsxwdp vs0, vs34
+; FAST-P9-NEXT:    xsadddp f0, f1, f0
 ; FAST-P9-NEXT:    fsel f1, f0, f2, f3
 ; FAST-P9-NEXT:    blr
 ;
 ; NO-FAST-P8-LABEL: onecmp1:
 ; NO-FAST-P8:       # %bb.0: # %entry
-; NO-FAST-P8-NEXT:    addis r3, r2, .LCPI24_0@toc@ha
-; NO-FAST-P8-NEXT:    lfs f0, .LCPI24_0@toc@l(r3)
+; NO-FAST-P8-NEXT:    vspltisw v2, 1
+; NO-FAST-P8-NEXT:    xvcvsxwdp vs0, vs34
 ; NO-FAST-P8-NEXT:    fcmpu cr0, f1, f0
-; NO-FAST-P8-NEXT:    cror 4*cr5+lt, lt, un
-; NO-FAST-P8-NEXT:    bc 12, 4*cr5+lt, .LBB24_2
+; NO-FAST-P8-NEXT:    bc 12, lt, .LBB24_3
 ; NO-FAST-P8-NEXT:  # %bb.1: # %entry
+; NO-FAST-P8-NEXT:    fcmpu cr0, f1, f1
+; NO-FAST-P8-NEXT:    bc 12, un, .LBB24_3
+; NO-FAST-P8-NEXT:  # %bb.2: # %entry
 ; NO-FAST-P8-NEXT:    fmr f3, f2
-; NO-FAST-P8-NEXT:  .LBB24_2: # %entry
+; NO-FAST-P8-NEXT:  .LBB24_3: # %entry
 ; NO-FAST-P8-NEXT:    fmr f1, f3
 ; NO-FAST-P8-NEXT:    blr
 ;
 ; NO-FAST-P9-LABEL: onecmp1:
 ; NO-FAST-P9:       # %bb.0: # %entry
-; NO-FAST-P9-NEXT:    addis r3, r2, .LCPI24_0@toc@ha
-; NO-FAST-P9-NEXT:    lfs f0, .LCPI24_0@toc@l(r3)
+; NO-FAST-P9-NEXT:    vspltisw v2, 1
+; NO-FAST-P9-NEXT:    xvcvsxwdp vs0, vs34
 ; NO-FAST-P9-NEXT:    fcmpu cr0, f1, f0
-; NO-FAST-P9-NEXT:    cror 4*cr5+lt, lt, un
-; NO-FAST-P9-NEXT:    bc 12, 4*cr5+lt, .LBB24_2
+; NO-FAST-P9-NEXT:    bc 12, lt, .LBB24_3
 ; NO-FAST-P9-NEXT:  # %bb.1: # %entry
+; NO-FAST-P9-NEXT:    fcmpu cr0, f1, f1
+; NO-FAST-P9-NEXT:    bc 12, un, .LBB24_3
+; NO-FAST-P9-NEXT:  # %bb.2: # %entry
 ; NO-FAST-P9-NEXT:    fmr f3, f2
-; NO-FAST-P9-NEXT:  .LBB24_2: # %entry
+; NO-FAST-P9-NEXT:  .LBB24_3: # %entry
 ; NO-FAST-P9-NEXT:    fmr f1, f3
 ; NO-FAST-P9-NEXT:    blr
 entry:
@@ -943,24 +947,24 @@
 define double @onecmp2(double %a, double %y, double %z) {
 ; FAST-P8-LABEL: onecmp2:
 ; FAST-P8:       # %bb.0: # %entry
-; FAST-P8-NEXT:    addis r3, r2, .LCPI25_0@toc@ha
-; FAST-P8-NEXT:    lfs f0, .LCPI25_0@toc@l(r3)
+; FAST-P8-NEXT:    vspltisw v2, 1
+; FAST-P8-NEXT:    xvcvsxwdp vs0, vs34
 ; FAST-P8-NEXT:    xssubdp f0, f0, f1
 ; FAST-P8-NEXT:    fsel f1, f0, f3, f2
 ; FAST-P8-NEXT:    blr
 ;
 ; FAST-P9-LABEL: onecmp2:
 ; FAST-P9:       # %bb.0: # %entry
-; FAST-P9-NEXT:    addis r3, r2, .LCPI25_0@toc@ha
-; FAST-P9-NEXT:    lfs f0, .LCPI25_0@toc@l(r3)
+; FAST-P9-NEXT:    vspltisw v2, 1
+; FAST-P9-NEXT:    xvcvsxwdp vs0, vs34
 ; FAST-P9-NEXT:    xssubdp f0, f0, f1
 ; FAST-P9-NEXT:    fsel f1, f0, f3, f2
 ; FAST-P9-NEXT:    blr
 ;
 ; NO-FAST-P8-LABEL: onecmp2:
 ; NO-FAST-P8:       # %bb.0: # %entry
-; NO-FAST-P8-NEXT:    addis r3, r2, .LCPI25_0@toc@ha
-; NO-FAST-P8-NEXT:    lfs f0, .LCPI25_0@toc@l(r3)
+; NO-FAST-P8-NEXT:    vspltisw v2, 1
+; NO-FAST-P8-NEXT:    xvcvsxwdp vs0, vs34
 ; NO-FAST-P8-NEXT:    xscmpudp cr0, f1, f0
 ; NO-FAST-P8-NEXT:    fmr f1, f2
 ; NO-FAST-P8-NEXT:    bgtlr cr0
@@ -970,8 +974,8 @@
 ;
 ; NO-FAST-P9-LABEL: onecmp2:
 ; NO-FAST-P9:       # %bb.0: # %entry
-; NO-FAST-P9-NEXT:    addis r3, r2, .LCPI25_0@toc@ha
-; NO-FAST-P9-NEXT:    lfs f0, .LCPI25_0@toc@l(r3)
+; NO-FAST-P9-NEXT:    vspltisw v2, 1
+; NO-FAST-P9-NEXT:    xvcvsxwdp vs0, vs34
 ; NO-FAST-P9-NEXT:    xscmpudp cr0, f1, f0
 ; NO-FAST-P9-NEXT:    bgt cr0, .LBB25_2
 ; NO-FAST-P9-NEXT:  # %bb.1: # %entry
@@ -988,9 +992,9 @@
 define double @onecmp3(double %a, double %y, double %z) {
 ; FAST-P8-LABEL: onecmp3:
 ; FAST-P8:       # %bb.0: # %entry
-; FAST-P8-NEXT:    addis r3, r2, .LCPI26_0@toc@ha
-; FAST-P8-NEXT:    lfs f0, .LCPI26_0@toc@l(r3)
-; FAST-P8-NEXT:    xssubdp f0, f1, f0
+; FAST-P8-NEXT:    vspltisw v2, -1
+; FAST-P8-NEXT:    xvcvsxwdp vs0, vs34
+; FAST-P8-NEXT:    xsadddp f0, f1, f0
 ; FAST-P8-NEXT:    xsnegdp f1, f0
 ; FAST-P8-NEXT:    fsel f0, f0, f2, f3
 ; FAST-P8-NEXT:    fsel f1, f1, f0, f3
@@ -998,9 +1002,9 @@
 ;
 ; FAST-P9-LABEL: onecmp3:
 ; FAST-P9:       # %bb.0: # %entry
-; FAST-P9-NEXT:    addis r3, r2, .LCPI26_0@toc@ha
-; FAST-P9-NEXT:    lfs f0, .LCPI26_0@toc@l(r3)
-; FAST-P9-NEXT:    xssubdp f0, f1, f0
+; FAST-P9-NEXT:    vspltisw v2, -1
+; FAST-P9-NEXT:    xvcvsxwdp vs0, vs34
+; FAST-P9-NEXT:    xsadddp f0, f1, f0
 ; FAST-P9-NEXT:    fsel f1, f0, f2, f3
 ; FAST-P9-NEXT:    xsnegdp f0, f0
 ; FAST-P9-NEXT:    fsel f1, f0, f1, f3
@@ -1008,8 +1012,8 @@
 ;
 ; NO-FAST-P8-LABEL: onecmp3:
 ; NO-FAST-P8:       # %bb.0: # %entry
-; NO-FAST-P8-NEXT:    addis r3, r2, .LCPI26_0@toc@ha
-; NO-FAST-P8-NEXT:    lfs f0, .LCPI26_0@toc@l(r3)
+; NO-FAST-P8-NEXT:    vspltisw v2, 1
+; NO-FAST-P8-NEXT:    xvcvsxwdp vs0, vs34
 ; NO-FAST-P8-NEXT:    xscmpudp cr0, f1, f0
 ; NO-FAST-P8-NEXT:    fmr f1, f2
 ; NO-FAST-P8-NEXT:    beqlr cr0
@@ -1019,8 +1023,8 @@
 ;
 ; NO-FAST-P9-LABEL: onecmp3:
 ; NO-FAST-P9:       # %bb.0: # %entry
-; NO-FAST-P9-NEXT:    addis r3, r2, .LCPI26_0@toc@ha
-; NO-FAST-P9-NEXT:    lfs f0, .LCPI26_0@toc@l(r3)
+; NO-FAST-P9-NEXT:    vspltisw v2, 1
+; NO-FAST-P9-NEXT:    xvcvsxwdp vs0, vs34
 ; NO-FAST-P9-NEXT:    xscmpudp cr0, f1, f0
 ; NO-FAST-P9-NEXT:    beq cr0, .LBB26_2
 ; NO-FAST-P9-NEXT:  # %bb.1: # %entry
diff --git a/llvm/test/CodeGen/PowerPC/select_const.ll b/llvm/test/CodeGen/PowerPC/select_const.ll
--- a/llvm/test/CodeGen/PowerPC/select_const.ll
+++ b/llvm/test/CodeGen/PowerPC/select_const.ll
@@ -911,10 +911,12 @@
 ; ALL-NEXT:  # %bb.1:
 ; ALL-NEXT:    addis 3, 2, .LCPI48_0@toc@ha
 ; ALL-NEXT:    lfd 1, .LCPI48_0@toc@l(3)
+; ALL-NEXT:    # kill: def $f1 killed $f1 killed $vsl1
 ; ALL-NEXT:    blr
 ; ALL-NEXT:  .LBB48_2:
-; ALL-NEXT:    addis 3, 2, .LCPI48_1@toc@ha
-; ALL-NEXT:    lfs 1, .LCPI48_1@toc@l(3)
+; ALL-NEXT:    vspltisw 2, -4
+; ALL-NEXT:    xvcvsxwdp 1, 34
+; ALL-NEXT:    # kill: def $f1 killed $f1 killed $vsl1
 ; ALL-NEXT:    blr
   %sel = select i1 %cond, double -4.0, double 23.3
   %bo = frem double %sel, 5.1
diff --git a/llvm/test/CodeGen/PowerPC/toc-float.ll b/llvm/test/CodeGen/PowerPC/toc-float.ll
--- a/llvm/test/CodeGen/PowerPC/toc-float.ll
+++ b/llvm/test/CodeGen/PowerPC/toc-float.ll
@@ -7,14 +7,16 @@
 define double @doubleConstant1() {
 ; CHECK-P9-LABEL: doubleConstant1:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P9-NEXT:    lfs 1, .LCPI0_0@toc@l(3)
+; CHECK-P9-NEXT:    vspltisw 2, 14
+; CHECK-P9-NEXT:    xvcvsxwdp 1, 34
+; CHECK-P9-NEXT:    # kill: def $f1 killed $f1 killed $vsl1
 ; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: doubleConstant1:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P8-NEXT:    lfs 1, .LCPI0_0@toc@l(3)
+; CHECK-P8-NEXT:    vspltisw 2, 14
+; CHECK-P8-NEXT:    xvcvsxwdp 1, 34
+; CHECK-P8-NEXT:    # kill: def $f1 killed $f1 killed $vsl1
 ; CHECK-P8-NEXT:    blr
   ret double 1.400000e+01
 }
diff --git a/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll b/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
--- a/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
@@ -193,9 +193,9 @@
 ; CHECK-LE-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
 ; CHECK-LE-NEXT:    addi 3, 3, .LCPI9_0@toc@l
 ; CHECK-LE-NEXT:    lxv 0, 0(3)
-; CHECK-LE-NEXT:    addis 3, 2, .LCPI9_1@toc@ha
-; CHECK-LE-NEXT:    lfs 1, .LCPI9_1@toc@l(3)
 ; CHECK-LE-NEXT:    xxperm 35, 34, 0
+; CHECK-LE-NEXT:    vspltisw 2, 1
+; CHECK-LE-NEXT:    xvcvsxwdp 1, 34
 ; CHECK-LE-NEXT:    xxswapd 0, 35
 ; CHECK-LE-NEXT:    xsadddp 1, 0, 1
 ; CHECK-LE-NEXT:    blr
@@ -205,9 +205,9 @@
 ; CHECK-BE-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
 ; CHECK-BE-NEXT:    addi 3, 3, .LCPI9_0@toc@l
 ; CHECK-BE-NEXT:    lxv 0, 0(3)
-; CHECK-BE-NEXT:    addis 3, 2, .LCPI9_1@toc@ha
 ; CHECK-BE-NEXT:    xxperm 34, 35, 0
-; CHECK-BE-NEXT:    lfs 0, .LCPI9_1@toc@l(3)
+; CHECK-BE-NEXT:    vspltisw 3, 1
+; CHECK-BE-NEXT:    xvcvsxwdp 0, 35
 ; CHECK-BE-NEXT:    xsadddp 1, 34, 0
 ; CHECK-BE-NEXT:    blr
 entry: