diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -554,6 +554,16 @@
 
     setOperationAction(ISD::ABS, MVT::i32, Legal);
     setOperationAction(ISD::ABS, MVT::i64, Legal);
+
+    setOperationAction(ISD::SMAX, MVT::i32, Legal);
+    setOperationAction(ISD::SMAX, MVT::i64, Legal);
+    setOperationAction(ISD::UMAX, MVT::i32, Legal);
+    setOperationAction(ISD::UMAX, MVT::i64, Legal);
+
+    setOperationAction(ISD::SMIN, MVT::i32, Legal);
+    setOperationAction(ISD::SMIN, MVT::i64, Legal);
+    setOperationAction(ISD::UMIN, MVT::i32, Legal);
+    setOperationAction(ISD::UMIN, MVT::i64, Legal);
   } else {
     setOperationAction(ISD::CTPOP, MVT::i32, Custom);
     setOperationAction(ISD::CTPOP, MVT::i64, Custom);
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -8559,10 +8559,10 @@
 defm CNT : OneOperandData<0b000111, "cnt", ctpop>, Requires<[HasCSSC]>;
 defm CTZ : OneOperandData<0b000110, "ctz", cttz>, Requires<[HasCSSC]>;
 
-defm SMAX : ComparisonOp<0, 0, "smax">, Requires<[HasCSSC]>;
-defm SMIN : ComparisonOp<0, 1, "smin">, Requires<[HasCSSC]>;
-defm UMAX : ComparisonOp<1, 0, "umax">, Requires<[HasCSSC]>;
-defm UMIN : ComparisonOp<1, 1, "umin">, Requires<[HasCSSC]>;
+defm SMAX : ComparisonOp<0, 0, "smax", smax>, Requires<[HasCSSC]>;
+defm SMIN : ComparisonOp<0, 1, "smin", smin>, Requires<[HasCSSC]>;
+defm UMAX : ComparisonOp<1, 0, "umax", umax>, Requires<[HasCSSC]>;
+defm UMIN : ComparisonOp<1, 1, "umin", umin>, Requires<[HasCSSC]>;
 
 def RPRFM:
     I<(outs), (ins rprfop:$Rt, GPR64:$Rm, GPR64sp:$Rn),
diff --git a/llvm/test/CodeGen/AArch64/min-max.ll b/llvm/test/CodeGen/AArch64/min-max.ll
--- a/llvm/test/CodeGen/AArch64/min-max.ll
+++ b/llvm/test/CodeGen/AArch64/min-max.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL
+; RUN: llc -mtriple=aarch64-eabi %s -o - -mattr=+cssc | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL-CSSC
 ; RUN: llc -mtriple=aarch64-eabi -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL
 
-
 ; These tests just check that the plumbing is in place for @llvm.smax, @llvm.umax,
 ; @llvm.smin, @llvm.umin.
 
@@ -17,6 +17,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, gt
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smaxi8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    sxtb w8, w1
+; CHECK-ISEL-CSSC-NEXT:    sxtb w9, w0
+; CHECK-ISEL-CSSC-NEXT:    smax w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smaxi8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    sxtb w8, w0
@@ -38,6 +45,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, gt
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smaxi16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    sxth w8, w1
+; CHECK-ISEL-CSSC-NEXT:    sxth w9, w0
+; CHECK-ISEL-CSSC-NEXT:    smax w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smaxi16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    sxth w8, w0
@@ -51,11 +65,22 @@
 declare i32 @llvm.smax.i32(i32 %a, i32 %b) readnone
 
 define i32 @smaxi32(i32 %a, i32 %b) {
-; CHECK-LABEL: smaxi32:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp w0, w1
-; CHECK-NEXT:    csel w0, w0, w1, gt
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: smaxi32:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp w0, w1
+; CHECK-ISEL-NEXT:    csel w0, w0, w1, gt
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: smaxi32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smax w0, w0, w1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smaxi32:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp w0, w1
+; CHECK-GLOBAL-NEXT:    csel w0, w0, w1, gt
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i32 @llvm.smax.i32(i32 %a, i32 %b)
   ret i32 %c
 }
@@ -63,11 +88,22 @@
 declare i64 @llvm.smax.i64(i64 %a, i64 %b) readnone
 
 define i64 @smaxi64(i64 %a, i64 %b) {
-; CHECK-LABEL: smaxi64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp x0, x1
-; CHECK-NEXT:    csel x0, x0, x1, gt
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: smaxi64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp x0, x1
+; CHECK-ISEL-NEXT:    csel x0, x0, x1, gt
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: smaxi64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smax x0, x0, x1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smaxi64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp x0, x1
+; CHECK-GLOBAL-NEXT:    csel x0, x0, x1, gt
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i64 @llvm.smax.i64(i64 %a, i64 %b)
   ret i64 %c
 }
@@ -104,6 +140,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smax32i8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smax v1.16b, v1.16b, v3.16b
+; CHECK-ISEL-CSSC-NEXT:    smax v0.16b, v0.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smax32i8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    smax v0.16b, v0.16b, v2.16b
@@ -147,6 +190,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smax16i16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smax v1.8h, v1.8h, v3.8h
+; CHECK-ISEL-CSSC-NEXT:    smax v0.8h, v0.8h, v2.8h
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smax16i16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    smax v0.8h, v0.8h, v2.8h
@@ -190,6 +240,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smax8i32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smax v1.4s, v1.4s, v3.4s
+; CHECK-ISEL-CSSC-NEXT:    smax v0.4s, v0.4s, v2.4s
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smax8i32:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    smax v0.4s, v0.4s, v2.4s
@@ -210,6 +267,12 @@
 ; CHECK-ISEL-NEXT:    bif v0.8b, v1.8b, v2.8b
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smax1i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmgt d2, d0, d1
+; CHECK-ISEL-CSSC-NEXT:    bif v0.8b, v1.8b, v2.8b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smax1i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    fmov x8, d0
@@ -224,11 +287,23 @@
 declare <2 x i64> @llvm.smax.v2i64(<2 x i64> %a, <2 x i64> %b) readnone
 
 define <2 x i64> @smax2i64(<2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: smax2i64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmgt v2.2d, v0.2d, v1.2d
-; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: smax2i64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmgt v2.2d, v0.2d, v1.2d
+; CHECK-ISEL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: smax2i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmgt v2.2d, v0.2d, v1.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smax2i64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmgt v2.2d, v0.2d, v1.2d
+; CHECK-GLOBAL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-GLOBAL-NEXT:    ret
   %c = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %a, <2 x i64> %b)
   ret <2 x i64> %c
 }
@@ -245,6 +320,15 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smax4i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmgt v4.2d, v1.2d, v3.2d
+; CHECK-ISEL-CSSC-NEXT:    cmgt v5.2d, v0.2d, v2.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v1.16b, v3.16b, v4.16b
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v2.16b, v5.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smax4i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    cmgt v4.2d, v0.2d, v2.2d
@@ -269,6 +353,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, hi
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umaxi8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    and w8, w1, #0xff
+; CHECK-ISEL-CSSC-NEXT:    and w9, w0, #0xff
+; CHECK-ISEL-CSSC-NEXT:    umax w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umaxi8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    and w8, w0, #0xff
@@ -290,6 +381,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, hi
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umaxi16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    and w8, w1, #0xffff
+; CHECK-ISEL-CSSC-NEXT:    and w9, w0, #0xffff
+; CHECK-ISEL-CSSC-NEXT:    umax w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umaxi16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    and w8, w0, #0xffff
@@ -303,11 +401,22 @@
 declare i32 @llvm.umax.i32(i32 %a, i32 %b) readnone
 
 define i32 @umaxi32(i32 %a, i32 %b) {
-; CHECK-LABEL: umaxi32:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp w0, w1
-; CHECK-NEXT:    csel w0, w0, w1, hi
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: umaxi32:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp w0, w1
+; CHECK-ISEL-NEXT:    csel w0, w0, w1, hi
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: umaxi32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umax w0, w0, w1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: umaxi32:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp w0, w1
+; CHECK-GLOBAL-NEXT:    csel w0, w0, w1, hi
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i32 @llvm.umax.i32(i32 %a, i32 %b)
   ret i32 %c
 }
@@ -315,11 +424,22 @@
 declare i64 @llvm.umax.i64(i64 %a, i64 %b) readnone
 
 define i64 @umaxi64(i64 %a, i64 %b) {
-; CHECK-LABEL: umaxi64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp x0, x1
-; CHECK-NEXT:    csel x0, x0, x1, hi
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: umaxi64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp x0, x1
+; CHECK-ISEL-NEXT:    csel x0, x0, x1, hi
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: umaxi64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umax x0, x0, x1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: umaxi64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp x0, x1
+; CHECK-GLOBAL-NEXT:    csel x0, x0, x1, hi
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i64 @llvm.umax.i64(i64 %a, i64 %b)
   ret i64 %c
 }
@@ -356,6 +476,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umax32i8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umax v1.16b, v1.16b, v3.16b
+; CHECK-ISEL-CSSC-NEXT:    umax v0.16b, v0.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umax32i8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    umax v0.16b, v0.16b, v2.16b
@@ -399,6 +526,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umax16i16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umax v1.8h, v1.8h, v3.8h
+; CHECK-ISEL-CSSC-NEXT:    umax v0.8h, v0.8h, v2.8h
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umax16i16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    umax v0.8h, v0.8h, v2.8h
@@ -442,6 +576,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umax8i32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umax v1.4s, v1.4s, v3.4s
+; CHECK-ISEL-CSSC-NEXT:    umax v0.4s, v0.4s, v2.4s
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umax8i32:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    umax v0.4s, v0.4s, v2.4s
@@ -462,6 +603,12 @@
 ; CHECK-ISEL-NEXT:    bif v0.8b, v1.8b, v2.8b
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umax1i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmhi d2, d0, d1
+; CHECK-ISEL-CSSC-NEXT:    bif v0.8b, v1.8b, v2.8b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umax1i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    fmov x8, d0
@@ -476,11 +623,23 @@
 declare <2 x i64> @llvm.umax.v2i64(<2 x i64> %a, <2 x i64> %b) readnone
 
 define <2 x i64> @umax2i64(<2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: umax2i64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmhi v2.2d, v0.2d, v1.2d
-; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: umax2i64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmhi v2.2d, v0.2d, v1.2d
+; CHECK-ISEL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: umax2i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmhi v2.2d, v0.2d, v1.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: umax2i64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmhi v2.2d, v0.2d, v1.2d
+; CHECK-GLOBAL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-GLOBAL-NEXT:    ret
   %c = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %a, <2 x i64> %b)
   ret <2 x i64> %c
 }
@@ -497,6 +656,15 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umax4i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmhi v4.2d, v1.2d, v3.2d
+; CHECK-ISEL-CSSC-NEXT:    cmhi v5.2d, v0.2d, v2.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v1.16b, v3.16b, v4.16b
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v2.16b, v5.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umax4i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    cmhi v4.2d, v0.2d, v2.2d
@@ -521,6 +689,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, lt
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smini8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    sxtb w8, w1
+; CHECK-ISEL-CSSC-NEXT:    sxtb w9, w0
+; CHECK-ISEL-CSSC-NEXT:    smin w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smini8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    sxtb w8, w0
@@ -542,6 +717,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, lt
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smini16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    sxth w8, w1
+; CHECK-ISEL-CSSC-NEXT:    sxth w9, w0
+; CHECK-ISEL-CSSC-NEXT:    smin w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smini16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    sxth w8, w0
@@ -555,11 +737,22 @@
 declare i32 @llvm.smin.i32(i32 %a, i32 %b) readnone
 
 define i32 @smini32(i32 %a, i32 %b) {
-; CHECK-LABEL: smini32:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp w0, w1
-; CHECK-NEXT:    csel w0, w0, w1, lt
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: smini32:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp w0, w1
+; CHECK-ISEL-NEXT:    csel w0, w0, w1, lt
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: smini32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smin w0, w0, w1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smini32:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp w0, w1
+; CHECK-GLOBAL-NEXT:    csel w0, w0, w1, lt
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i32 @llvm.smin.i32(i32 %a, i32 %b)
   ret i32 %c
 }
@@ -567,11 +760,22 @@
 declare i64 @llvm.smin.i64(i64 %a, i64 %b) readnone
 
 define i64 @smini64(i64 %a, i64 %b) {
-; CHECK-LABEL: smini64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp x0, x1
-; CHECK-NEXT:    csel x0, x0, x1, lt
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: smini64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp x0, x1
+; CHECK-ISEL-NEXT:    csel x0, x0, x1, lt
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: smini64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smin x0, x0, x1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smini64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp x0, x1
+; CHECK-GLOBAL-NEXT:    csel x0, x0, x1, lt
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i64 @llvm.smin.i64(i64 %a, i64 %b)
   ret i64 %c
 }
@@ -608,6 +812,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smin32i8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smin v1.16b, v1.16b, v3.16b
+; CHECK-ISEL-CSSC-NEXT:    smin v0.16b, v0.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smin32i8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    smin v0.16b, v0.16b, v2.16b
@@ -651,6 +862,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smin16i16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smin v1.8h, v1.8h, v3.8h
+; CHECK-ISEL-CSSC-NEXT:    smin v0.8h, v0.8h, v2.8h
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smin16i16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    smin v0.8h, v0.8h, v2.8h
@@ -694,6 +912,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smin8i32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    smin v1.4s, v1.4s, v3.4s
+; CHECK-ISEL-CSSC-NEXT:    smin v0.4s, v0.4s, v2.4s
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smin8i32:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    smin v0.4s, v0.4s, v2.4s
@@ -714,6 +939,12 @@
 ; CHECK-ISEL-NEXT:    bif v0.8b, v1.8b, v2.8b
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smin1i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmgt d2, d1, d0
+; CHECK-ISEL-CSSC-NEXT:    bif v0.8b, v1.8b, v2.8b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smin1i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    fmov x8, d0
@@ -728,11 +959,23 @@
 declare <2 x i64> @llvm.smin.v2i64(<2 x i64> %a, <2 x i64> %b) readnone
 
 define <2 x i64> @smin2i64(<2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: smin2i64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmgt v2.2d, v1.2d, v0.2d
-; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: smin2i64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmgt v2.2d, v1.2d, v0.2d
+; CHECK-ISEL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: smin2i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmgt v2.2d, v1.2d, v0.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smin2i64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmgt v2.2d, v1.2d, v0.2d
+; CHECK-GLOBAL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-GLOBAL-NEXT:    ret
   %c = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %a, <2 x i64> %b)
   ret <2 x i64> %c
 }
@@ -749,6 +992,15 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: smin4i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmgt v4.2d, v3.2d, v1.2d
+; CHECK-ISEL-CSSC-NEXT:    cmgt v5.2d, v2.2d, v0.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v1.16b, v3.16b, v4.16b
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v2.16b, v5.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: smin4i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    cmgt v4.2d, v2.2d, v0.2d
@@ -773,6 +1025,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, lo
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umini8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    and w8, w1, #0xff
+; CHECK-ISEL-CSSC-NEXT:    and w9, w0, #0xff
+; CHECK-ISEL-CSSC-NEXT:    umin w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umini8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    and w8, w0, #0xff
@@ -794,6 +1053,13 @@
 ; CHECK-ISEL-NEXT:    csel w0, w9, w8, lo
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umini16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    and w8, w1, #0xffff
+; CHECK-ISEL-CSSC-NEXT:    and w9, w0, #0xffff
+; CHECK-ISEL-CSSC-NEXT:    umin w0, w9, w8
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umini16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    and w8, w0, #0xffff
@@ -807,11 +1073,22 @@
 declare i32 @llvm.umin.i32(i32 %a, i32 %b) readnone
 
 define i32 @umini32(i32 %a, i32 %b) {
-; CHECK-LABEL: umini32:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp w0, w1
-; CHECK-NEXT:    csel w0, w0, w1, lo
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: umini32:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp w0, w1
+; CHECK-ISEL-NEXT:    csel w0, w0, w1, lo
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: umini32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umin w0, w0, w1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: umini32:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp w0, w1
+; CHECK-GLOBAL-NEXT:    csel w0, w0, w1, lo
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i32 @llvm.umin.i32(i32 %a, i32 %b)
   ret i32 %c
 }
@@ -819,11 +1096,22 @@
 declare i64 @llvm.umin.i64(i64 %a, i64 %b) readnone
 
 define i64 @umini64(i64 %a, i64 %b) {
-; CHECK-LABEL: umini64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmp x0, x1
-; CHECK-NEXT:    csel x0, x0, x1, lo
-; CHECK-NEXT:    ret
+; CHECK-ISEL-LABEL: umini64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmp x0, x1
+; CHECK-ISEL-NEXT:    csel x0, x0, x1, lo
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: umini64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umin x0, x0, x1
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: umini64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp x0, x1
+; CHECK-GLOBAL-NEXT:    csel x0, x0, x1, lo
+; CHECK-GLOBAL-NEXT:    ret
   %c = call i64 @llvm.umin.i64(i64 %a, i64 %b)
   ret i64 %c
 }
@@ -860,6 +1148,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umin32i8:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umin v1.16b, v1.16b, v3.16b
+; CHECK-ISEL-CSSC-NEXT:    umin v0.16b, v0.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umin32i8:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    umin v0.16b, v0.16b, v2.16b
@@ -903,6 +1198,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umin16i16:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umin v1.8h, v1.8h, v3.8h
+; CHECK-ISEL-CSSC-NEXT:    umin v0.8h, v0.8h, v2.8h
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umin16i16:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    umin v0.8h, v0.8h, v2.8h
@@ -946,6 +1248,13 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umin8i32:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    umin v1.4s, v1.4s, v3.4s
+; CHECK-ISEL-CSSC-NEXT:    umin v0.4s, v0.4s, v2.4s
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umin8i32:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    umin v0.4s, v0.4s, v2.4s
@@ -966,6 +1275,12 @@
 ; CHECK-ISEL-NEXT:    bif v0.8b, v1.8b, v2.8b
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umin1i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmhi d2, d1, d0
+; CHECK-ISEL-CSSC-NEXT:    bif v0.8b, v1.8b, v2.8b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umin1i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    fmov x8, d0
@@ -980,12 +1295,24 @@
 declare <2 x i64> @llvm.umin.v2i64(<2 x i64> %a, <2 x i64> %b) readnone
 
 define <2 x i64> @umin2i64(<2 x i64> %a, <2 x i64> %b) {
-; CHECK-LABEL: umin2i64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    cmhi v2.2d, v1.2d, v0.2d
-; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b
-; CHECK-NEXT:    ret
-  %c = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %a, <2 x i64> %b)
+; CHECK-ISEL-LABEL: umin2i64:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    cmhi v2.2d, v1.2d, v0.2d
+; CHECK-ISEL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-ISEL-CSSC-LABEL: umin2i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmhi v2.2d, v1.2d, v0.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: umin2i64:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmhi v2.2d, v1.2d, v0.2d
+; CHECK-GLOBAL-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-GLOBAL-NEXT:    ret
+%c = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %a, <2 x i64> %b)
   ret <2 x i64> %c
 }
 
@@ -1001,6 +1328,15 @@
 ; CHECK-ISEL-NEXT:    stp q0, q1, [x0]
 ; CHECK-ISEL-NEXT:    ret
 ;
+; CHECK-ISEL-CSSC-LABEL: umin4i64:
+; CHECK-ISEL-CSSC:       // %bb.0:
+; CHECK-ISEL-CSSC-NEXT:    cmhi v4.2d, v3.2d, v1.2d
+; CHECK-ISEL-CSSC-NEXT:    cmhi v5.2d, v2.2d, v0.2d
+; CHECK-ISEL-CSSC-NEXT:    bif v1.16b, v3.16b, v4.16b
+; CHECK-ISEL-CSSC-NEXT:    bif v0.16b, v2.16b, v5.16b
+; CHECK-ISEL-CSSC-NEXT:    stp q0, q1, [x0]
+; CHECK-ISEL-CSSC-NEXT:    ret
+;
 ; CHECK-GLOBAL-LABEL: umin4i64:
 ; CHECK-GLOBAL:       // %bb.0:
 ; CHECK-GLOBAL-NEXT:    cmhi v4.2d, v2.2d, v0.2d