diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
@@ -259,7 +259,7 @@
   }
 
   bool isLegalMaskedGatherScatter(Type *DataType) const {
-    if (!ST->hasSVE())
+    if (!ST->hasSVE() || ST->forceStreamingCompatibleSVE())
       return false;
 
     // For fixed vectors, scalarize if not using SVE for them.
diff --git a/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-gather.ll b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-gather.ll
--- a/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-gather.ll
+++ b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-gather.ll
@@ -3,8 +3,28 @@
 
 define <2 x i32> @scalarize_v2i32(<2 x i32*> %p, <2 x i1> %mask, <2 x i32> %passthru) {
 ; CHECK-LABEL: @scalarize_v2i32(
-; CHECK-NEXT:    [[RET:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> [[P:%.*]], i32 8, <2 x i1> [[MASK:%.*]], <2 x i32> [[PASSTHRU:%.*]])
-; CHECK-NEXT:    ret <2 x i32> [[RET]]
+; CHECK-NEXT:    [[SCALAR_MASK:%.*]] = bitcast <2 x i1> [[MASK:%.*]] to i2
+; CHECK-NEXT:    [[TMP1:%.*]] = and i2 [[SCALAR_MASK]], 1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i2 [[TMP1]], 0
+; CHECK-NEXT:    br i1 [[TMP2]], label [[COND_LOAD:%.*]], label [[ELSE:%.*]]
+; CHECK:       cond.load:
+; CHECK-NEXT:    [[PTR0:%.*]] = extractelement <2 x i32*> [[P:%.*]], i64 0
+; CHECK-NEXT:    [[LOAD0:%.*]] = load i32, i32* [[PTR0]], align 8
+; CHECK-NEXT:    [[RES0:%.*]] = insertelement <2 x i32> [[PASSTHRU:%.*]], i32 [[LOAD0]], i64 0
+; CHECK-NEXT:    br label [[ELSE]]
+; CHECK:       else:
+; CHECK-NEXT:    [[RES_PHI_ELSE:%.*]] = phi <2 x i32> [ [[RES0]], [[COND_LOAD]] ], [ [[PASSTHRU]], [[TMP0:%.*]] ]
+; CHECK-NEXT:    [[TMP3:%.*]] = and i2 [[SCALAR_MASK]], -2
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i2 [[TMP3]], 0
+; CHECK-NEXT:    br i1 [[TMP4]], label [[COND_LOAD1:%.*]], label [[ELSE2:%.*]]
+; CHECK:       cond.load1:
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i32*> [[P]], i64 1
+; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, i32* [[PTR1]], align 8
+; CHECK-NEXT:    [[RES1:%.*]] = insertelement <2 x i32> [[RES_PHI_ELSE]], i32 [[LOAD1]], i64 1
+; CHECK-NEXT:    br label [[ELSE2]]
+; CHECK:       else2:
+; CHECK-NEXT:    [[RES_PHI_ELSE3:%.*]] = phi <2 x i32> [ [[RES1]], [[COND_LOAD1]] ], [ [[RES_PHI_ELSE]], [[ELSE]] ]
+; CHECK-NEXT:    ret <2 x i32> [[RES_PHI_ELSE3]]
 ;
   %ret = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %p, i32 8, <2 x i1> %mask, <2 x i32> %passthru)
   ret <2 x i32> %ret
@@ -12,8 +32,13 @@
 
 define <2 x i32> @scalarize_v2i32_ones_mask(<2 x i32*> %p, <2 x i32> %passthru) {
 ; CHECK-LABEL: @scalarize_v2i32_ones_mask(
-; CHECK-NEXT:    [[RET:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> [[P:%.*]], i32 8, <2 x i1> <i1 true, i1 true>, <2 x i32> [[PASSTHRU:%.*]])
-; CHECK-NEXT:    ret <2 x i32> [[RET]]
+; CHECK-NEXT:    [[PTR0:%.*]] = extractelement <2 x i32*> [[P:%.*]], i64 0
+; CHECK-NEXT:    [[LOAD0:%.*]] = load i32, i32* [[PTR0]], align 8
+; CHECK-NEXT:    [[RES0:%.*]] = insertelement <2 x i32> [[PASSTHRU:%.*]], i32 [[LOAD0]], i64 0
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i32*> [[P]], i64 1
+; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, i32* [[PTR1]], align 8
+; CHECK-NEXT:    [[RES1:%.*]] = insertelement <2 x i32> [[RES0]], i32 [[LOAD1]], i64 1
+; CHECK-NEXT:    ret <2 x i32> [[RES1]]
 ;
   %ret = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %p, i32 8, <2 x i1> <i1 true, i1 true>, <2 x i32> %passthru)
   ret <2 x i32> %ret
@@ -21,8 +46,7 @@
 
 define <2 x i32> @scalarize_v2i32_zero_mask(<2 x i32*> %p, <2 x i32> %passthru) {
 ; CHECK-LABEL: @scalarize_v2i32_zero_mask(
-; CHECK-NEXT:    [[RET:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> [[P:%.*]], i32 8, <2 x i1> zeroinitializer, <2 x i32> [[PASSTHRU:%.*]])
-; CHECK-NEXT:    ret <2 x i32> [[RET]]
+; CHECK-NEXT:    ret <2 x i32> [[PASSTHRU:%.*]]
 ;
   %ret = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %p, i32 8, <2 x i1> <i1 false, i1 false>, <2 x i32> %passthru)
   ret <2 x i32> %ret
@@ -30,8 +54,10 @@
 
 define <2 x i32> @scalarize_v2i32_const_mask(<2 x i32*> %p, <2 x i32> %passthru) {
 ; CHECK-LABEL: @scalarize_v2i32_const_mask(
-; CHECK-NEXT:    [[RET:%.*]] = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> [[P:%.*]], i32 8, <2 x i1> <i1 false, i1 true>, <2 x i32> [[PASSTHRU:%.*]])
-; CHECK-NEXT:    ret <2 x i32> [[RET]]
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i32*> [[P:%.*]], i64 1
+; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, i32* [[PTR1]], align 8
+; CHECK-NEXT:    [[RES1:%.*]] = insertelement <2 x i32> [[PASSTHRU:%.*]], i32 [[LOAD1]], i64 1
+; CHECK-NEXT:    ret <2 x i32> [[RES1]]
 ;
   %ret = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %p, i32 8, <2 x i1> <i1 false, i1 true>, <2 x i32> %passthru)
   ret <2 x i32> %ret
diff --git a/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-scatter.ll b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-scatter.ll
--- a/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-scatter.ll
+++ b/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-scatter.ll
@@ -3,7 +3,25 @@
 
 define void @scalarize_v2i64(<2 x i64*> %p, <2 x i1> %mask, <2 x i64> %value) {
 ; CHECK-LABEL: @scalarize_v2i64(
-; CHECK-NEXT:    call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> [[VALUE:%.*]], <2 x i64*> [[P:%.*]], i32 8, <2 x i1> [[MASK:%.*]])
+; CHECK-NEXT:    [[SCALAR_MASK:%.*]] = bitcast <2 x i1> [[MASK:%.*]] to i2
+; CHECK-NEXT:    [[TMP1:%.*]] = and i2 [[SCALAR_MASK]], 1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i2 [[TMP1]], 0
+; CHECK-NEXT:    br i1 [[TMP2]], label [[COND_STORE:%.*]], label [[ELSE:%.*]]
+; CHECK:       cond.store:
+; CHECK-NEXT:    [[ELT0:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 0
+; CHECK-NEXT:    [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 0
+; CHECK-NEXT:    store i64 [[ELT0]], i64* [[PTR0]], align 8
+; CHECK-NEXT:    br label [[ELSE]]
+; CHECK:       else:
+; CHECK-NEXT:    [[TMP3:%.*]] = and i2 [[SCALAR_MASK]], -2
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i2 [[TMP3]], 0
+; CHECK-NEXT:    br i1 [[TMP4]], label [[COND_STORE1:%.*]], label [[ELSE2:%.*]]
+; CHECK:       cond.store1:
+; CHECK-NEXT:    [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE]], i64 1
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i64 1
+; CHECK-NEXT:    store i64 [[ELT1]], i64* [[PTR1]], align 8
+; CHECK-NEXT:    br label [[ELSE2]]
+; CHECK:       else2:
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> %mask)
@@ -12,7 +30,12 @@
 
 define void @scalarize_v2i64_ones_mask(<2 x i64*> %p, <2 x i64> %value) {
 ; CHECK-LABEL: @scalarize_v2i64_ones_mask(
-; CHECK-NEXT:    call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> [[VALUE:%.*]], <2 x i64*> [[P:%.*]], i32 8, <2 x i1> <i1 true, i1 true>)
+; CHECK-NEXT:    [[ELT0:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 0
+; CHECK-NEXT:    [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 0
+; CHECK-NEXT:    store i64 [[ELT0]], i64* [[PTR0]], align 8
+; CHECK-NEXT:    [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE]], i64 1
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i64 1
+; CHECK-NEXT:    store i64 [[ELT1]], i64* [[PTR1]], align 8
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 true, i1 true>)
@@ -21,7 +44,6 @@
 
 define void @scalarize_v2i64_zero_mask(<2 x i64*> %p, <2 x i64> %value) {
 ; CHECK-LABEL: @scalarize_v2i64_zero_mask(
-; CHECK-NEXT:    call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> [[VALUE:%.*]], <2 x i64*> [[P:%.*]], i32 8, <2 x i1> zeroinitializer)
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 false>)
@@ -30,7 +52,9 @@
 
 define void @scalarize_v2i64_const_mask(<2 x i64*> %p, <2 x i64> %value) {
 ; CHECK-LABEL: @scalarize_v2i64_const_mask(
-; CHECK-NEXT:    call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> [[VALUE:%.*]], <2 x i64*> [[P:%.*]], i32 8, <2 x i1> <i1 false, i1 true>)
+; CHECK-NEXT:    [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 1
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 1
+; CHECK-NEXT:    store i64 [[ELT1]], i64* [[PTR1]], align 8
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 true>)