This op allows to reinterpret between memrefs with different element types.
See the discussion https://discourse.llvm.org/t/rfc-memref-bitcasting/66395
Details
- Reviewers
nicolasvasilache ftynse bondhugula
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td | ||
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2134 | This can be marked MemRefsNormalizable as well. | |
2138 | an existing memref ... as a ... | |
2138 | with a different ... | |
2139 | have the same shape, ... | |
2140 | -> The source memref should be allocated with ... | |
2141 | with the proper | |
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | ||
3167–3168 | Can use auto here since the type is on the RHS. | |
3170–3174 | Nit: Messages can all start in lowercase. No need of full stop at the end since there would be a trailing part. | |
mlir/test/Dialect/MemRef/canonicalize.mlir | ||
852–854 | ||
853–854 | Nit: Indent the start of the actual MLIR fragment correctly. |
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | ||
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3176–3180 | This check looks incomplete - it doesn't cover vector elemental type cases? |
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | ||
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3176–3180 | Checking vector and index sizes require DataLayout, I'm not sure if we should do this in verifier. |
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | ||
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3176–3180 | Can elt type bitcasts like those from vector<2xi16> to <i16> or to <i64> still be valid for some data layout? (We don't need to worry about index types here. memrefs of index type may not even be a case of interest for such elt type bit casts.) |
Can elt type bitcasts like those from vector<2xi16> to <i16> or to <i64> still be valid for some data layout?
More realistic case will be vector<3xi32> <-> vector<2xi64> cast, where vector<3xi32> may or may not be padded to 128 bits depending on layout.
Default data layout implementation assumes it is https://github.com/llvm/llvm-project/blob/8f60eee9144cd4178938d231ecccb65c43f78cde/mlir/lib/Interfaces/DataLayoutInterfaces.cpp#L78, but it can be overridden.
And I don't want to replicate this vector logic in verifier anyway. So the question is, is it ok to access data layout structures in op verifier?
And another question, do we really need such strict check in verifier? IMO, it better to do a trivial int/float check in verifier and then potentially reject it on memref->llvm conversion level where we have all required info about layout and which seems a proper place for this.
Dismissing change request.
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | ||
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3191–3196 | Code comment needed here and/or above. |
This can be marked MemRefsNormalizable as well.