diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
@@ -26,7 +26,46 @@
                    std::unique_ptr<MCCodeEmitter> MCE)
       : MCELFStreamer(C, std::move(MAB), std::move(MOW), std::move(MCE)) {}
 
+  void emitFill(const MCExpr &NumBytes, uint64_t FillValue, SMLoc Loc) override;
+  void changeSection(MCSection *Section, const MCExpr *Subsection) override;
   void emitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override;
+  void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
+  void emitBytes(StringRef Data) override;
+  void setAttributeItem(unsigned Attribute, StringRef Value,
+                        bool OverwriteExisting);
+
+private:
+  enum ElfMappingSymbol { EMS_None, EMS_ISA, EMS_Change, EMS_Data };
+
+  struct ElfMappingSymbolInfo {
+    explicit ElfMappingSymbolInfo(SMLoc Loc, MCFragment *F, uint64_t O)
+        : Loc(Loc), F(F), Offset(O), State(EMS_None) {}
+    void resetInfo() {
+      F = nullptr;
+      Offset = 0;
+    }
+    bool hasInfo() { return F != nullptr; }
+    SMLoc Loc;
+    MCFragment *F;
+    uint64_t Offset;
+    ElfMappingSymbol State;
+    std::string ISAInfo;
+  };
+
+  void emitDataMappingSymbol();
+  void FlushPendingMappingSymbol();
+  void ChangeISAMappingSymbol(StringRef arch);
+  void EmitISAMappingSymbol();
+  void EmitMappingSymbol(StringRef Name, SMLoc Loc, MCFragment *F,
+                         uint64_t Offset);
+  void EmitMappingSymbol(StringRef Name);
+
+  int64_t MappingSymbolCounter = 0;
+
+  DenseMap<const MCSection *, std::unique_ptr<ElfMappingSymbolInfo>>
+      LastMappingSymbols;
+
+  std::unique_ptr<ElfMappingSymbolInfo> LastEMSInfo;
 };
 
 namespace llvm {
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
@@ -59,6 +59,8 @@
 void RISCVTargetELFStreamer::emitTextAttribute(unsigned Attribute,
                                                StringRef String) {
   setAttributeItem(Attribute, String, /*OverwriteExisting=*/true);
+  static_cast<RISCVELFStreamer &>(getStreamer())
+      .setAttributeItem(Attribute, String, true);
 }
 
 void RISCVTargetELFStreamer::emitIntTextAttribute(unsigned Attribute,
@@ -249,8 +251,35 @@
   MCELFStreamer::reset();
 }
 
+// This part is for mapping symbol.
+
+void RISCVELFStreamer::emitFill(const MCExpr &NumBytes, uint64_t FillValue,
+                                SMLoc Loc) {
+  emitDataMappingSymbol();
+  MCObjectStreamer::emitFill(NumBytes, FillValue, Loc);
+}
+
+void RISCVELFStreamer::changeSection(MCSection *Section,
+                                     const MCExpr *Subsection) {
+  LastMappingSymbols[getCurrentSection().first] = std::move(LastEMSInfo);
+  MCELFStreamer::changeSection(Section, Subsection);
+  auto LastMappingSymbol = LastMappingSymbols.find(Section);
+  if (LastMappingSymbol != LastMappingSymbols.end()) {
+    LastEMSInfo = std::move(LastMappingSymbol->second);
+    return;
+  }
+  LastEMSInfo.reset(new ElfMappingSymbolInfo(SMLoc(), nullptr, EMS_None));
+}
+
+void RISCVELFStreamer::setAttributeItem(unsigned Attribute, StringRef Value,
+                                        bool OverwriteExisting) {
+  if (Attribute == RISCVAttrs::ARCH)
+    ChangeISAMappingSymbol(Value);
+}
+
 void RISCVELFStreamer::emitValueImpl(const MCExpr *Value, unsigned Size,
                                      SMLoc Loc) {
+  emitDataMappingSymbol();
   const MCExpr *A, *B;
   if (!requiresFixups(getContext(), Value, A, B))
     return MCELFStreamer::emitValueImpl(Value, Size, Loc);
@@ -272,6 +301,84 @@
   DF->getContents().resize(DF->getContents().size() + Size, 0);
 }
 
+/// This function is the one used to emit instruction data into the ELF
+/// streamer. We override it to add the appropriate mapping symbol if
+/// necessary.
+void RISCVELFStreamer::emitInstruction(const MCInst &Inst,
+                                       const MCSubtargetInfo &STI) {
+  EmitISAMappingSymbol();
+  MCELFStreamer::emitInstruction(Inst, STI);
+}
+
+/// This is one of the functions used to emit data into an ELF section, so the
+/// RISCV streamer overrides it to add the appropriate mapping symbol ($d) if
+/// necessary.
+void RISCVELFStreamer::emitBytes(StringRef Data) {
+  emitDataMappingSymbol();
+  MCELFStreamer::emitBytes(Data);
+}
+
+void RISCVELFStreamer::emitDataMappingSymbol() {
+  if (LastEMSInfo->State == EMS_Data)
+    return;
+  else if (LastEMSInfo->State == EMS_None) {
+    ElfMappingSymbolInfo *EMS = LastEMSInfo.get();
+    auto *DF = dyn_cast_or_null<MCDataFragment>(getCurrentFragment());
+    if (!DF)
+      return;
+    EMS->Loc = SMLoc();
+    EMS->F = getCurrentFragment();
+    EMS->Offset = DF->getContents().size();
+    LastEMSInfo->State = EMS_Data;
+    return;
+  }
+  EmitMappingSymbol("$d");
+  LastEMSInfo->State = EMS_Data;
+}
+
+void RISCVELFStreamer::FlushPendingMappingSymbol() {
+  if (!LastEMSInfo->hasInfo())
+    return;
+  ElfMappingSymbolInfo *EMS = LastEMSInfo.get();
+  EmitMappingSymbol("$d", EMS->Loc, EMS->F, EMS->Offset);
+  EMS->resetInfo();
+}
+
+void RISCVELFStreamer::ChangeISAMappingSymbol(StringRef arch) {
+  if (arch != LastEMSInfo->ISAInfo) {
+    LastEMSInfo->State = EMS_Change;
+    LastEMSInfo->ISAInfo = std::string(arch);
+  }
+}
+
+void RISCVELFStreamer::EmitISAMappingSymbol() {
+  if (LastEMSInfo->State == EMS_ISA)
+    return;
+  FlushPendingMappingSymbol();
+  if (LastEMSInfo->ISAInfo.empty())
+    EmitMappingSymbol("$x");
+  else
+    EmitMappingSymbol("$x" + LastEMSInfo->ISAInfo);
+  LastEMSInfo->State = EMS_ISA;
+}
+
+void RISCVELFStreamer::EmitMappingSymbol(StringRef Name, SMLoc Loc,
+                                         MCFragment *F, uint64_t Offset) {
+  auto *Symbol = cast<MCSymbolELF>(getContext().getOrCreateSymbol(
+      Name + "." + Twine(MappingSymbolCounter++)));
+  emitLabelAtPos(Symbol, Loc, F, Offset);
+  Symbol->setType(ELF::STT_NOTYPE);
+  Symbol->setBinding(ELF::STB_LOCAL);
+}
+
+void RISCVELFStreamer::EmitMappingSymbol(StringRef Name) {
+  auto *Symbol = cast<MCSymbolELF>(getContext().getOrCreateSymbol(
+      Name + "." + Twine(MappingSymbolCounter++)));
+  getAssembler().registerSymbol(*Symbol);
+  Symbol->setType(ELF::STT_NOTYPE);
+  Symbol->setBinding(ELF::STB_LOCAL);
+}
+
 namespace llvm {
 MCELFStreamer *createRISCVELFStreamer(MCContext &C,
                                       std::unique_ptr<MCAsmBackend> MAB,
diff --git a/llvm/test/MC/RISCV/Inputs/1.s b/llvm/test/MC/RISCV/Inputs/1.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/1.s
@@ -0,0 +1,3 @@
+        .section        .foobar,"ax",%progbits
+        nop
+        .word 32
diff --git a/llvm/test/MC/RISCV/Inputs/2.s b/llvm/test/MC/RISCV/Inputs/2.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/2.s
@@ -0,0 +1,3 @@
+        .section        .foobar,"",%progbits
+        nop
+        .word 32
diff --git a/llvm/test/MC/RISCV/Inputs/3.s b/llvm/test/MC/RISCV/Inputs/3.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/3.s
@@ -0,0 +1,3 @@
+        .section        .foobar,"aw",%progbits
+        nop
+        .word 32
diff --git a/llvm/test/MC/RISCV/Inputs/4.s b/llvm/test/MC/RISCV/Inputs/4.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/4.s
@@ -0,0 +1,2 @@
+        .section        .foobar,"",%progbits
+        .word 32
diff --git a/llvm/test/MC/RISCV/Inputs/5.s b/llvm/test/MC/RISCV/Inputs/5.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/5.s
@@ -0,0 +1,2 @@
+        .section        .foobar,"aw",%progbits
+        .word 32
diff --git a/llvm/test/MC/RISCV/Inputs/6.s b/llvm/test/MC/RISCV/Inputs/6.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/6.s
@@ -0,0 +1,12 @@
+        .section        .foo
+        .word 30
+        .word 31
+        .word 32
+        .word 33
+        nop
+        .word 34
+        .word 35
+        .word 36
+        .word 37
+        .word 38
+        nop
diff --git a/llvm/test/MC/RISCV/Inputs/7.s b/llvm/test/MC/RISCV/Inputs/7.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/7.s
@@ -0,0 +1,3 @@
+        .section        .foobar,"aw",%progbits
+        .word 32
+        nop
diff --git a/llvm/test/MC/RISCV/Inputs/ident.s b/llvm/test/MC/RISCV/Inputs/ident.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/Inputs/ident.s
@@ -0,0 +1 @@
+	.ident	"LLVM RISCV Compiler"
diff --git a/llvm/test/MC/RISCV/mapping-isa.s b/llvm/test/MC/RISCV/mapping-isa.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/mapping-isa.s
@@ -0,0 +1,312 @@
+## Arch string with mapping symbols.
+
+# RUN: llvm-mc -triple=riscv32 -filetype=obj -o %t.o %s
+# RUN: llvm-objdump -t %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %s
+# RUN: llvm-objdump -t %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+
+nop
+.word 32
+# MAPPINGSYMBOLS: $x
+
+.attribute arch, "rv32i"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0
+
+.attribute arch, "rv32i2"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0
+
+.attribute arch, "rv32i2p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0
+
+.attribute arch, "rv32i2_m2"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0
+
+.attribute arch, "rv32i2_ma"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0_a2p0
+
+.attribute arch, "rv32g"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0_a2p0_f2p0_d2p0
+
+.attribute arch, "rv32imafdc"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0
+
+.attribute arch, "rv32i2p0_mafdc"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0
+
+.attribute arch, "rv32ima2p0_fdc"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0
+
+.attribute arch, "rv32ima2p0_fdc"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0
+
+.attribute arch, "rv32iv"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl32b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl64b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl128b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl256b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl512b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl1024b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl2048b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl4096b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl8192b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
+
+.attribute arch, "rv32ivzvl16384b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
+
+.attribute arch, "rv32ivzvl32768b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
+
+.attribute arch, "rv32ivzvl65536b"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0
+
+.attribute arch, "rv32izve32x"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zve32x1p0_zvl32b1p0
+
+.attribute arch, "rv32ifzve32f"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_zve32f1p0_zve32x1p0_zvl32b1p0
+
+.attribute arch, "rv32izve64x"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ifzve64f"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_zve32f1p0_zve32x1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ifdzve64d"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_d2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32izicbom"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zicbom1p0
+
+.attribute arch, "rv32izicboz"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zicboz1p0
+
+.attribute arch, "rv32izicbop"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zicbop1p0
+
+## Experimental extensions require version string to be explicitly specified
+
+.attribute arch, "rv32izba1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zba1p0
+
+.attribute arch, "rv32izbb1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbb1p0
+
+.attribute arch, "rv32izbc1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbc1p0
+
+.attribute arch, "rv32izbs1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbs1p0
+
+.attribute arch, "rv32ifzfhmin1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_zfhmin1p0
+
+.attribute arch, "rv32ifzfh1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_zfh1p0
+
+.attribute arch, "rv32izfinx"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zfinx1p0
+
+.attribute arch, "rv32izfinx_zdinx"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zfinx1p0_zdinx1p0
+
+.attribute arch, "rv32izfinx_zhinxmin"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zfinx1p0_zhinxmin1p0
+
+.attribute arch, "rv32izfinx_zhinx1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zfinx1p0_zhinx1p0
+
+.attribute arch, "rv32i_zbkb1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbkb1p0
+
+.attribute arch, "rv32i_zbkc1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbkc1p0
+
+.attribute arch, "rv32i_zbkx1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbkx1p0
+
+.attribute arch, "rv32i_zknd1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zknd1p0
+
+.attribute arch, "rv32i_zkne1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zkne1p0
+
+.attribute arch, "rv32i_zknh1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zknh1p0
+
+.attribute arch, "rv32i_zksed1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zksed1p0
+
+.attribute arch, "rv32i_zksh1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zksh1p0
+
+.attribute arch, "rv32i_zkr1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zkr1p0
+
+.attribute arch, "rv32i_zkn1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0
+
+.attribute arch, "rv32i_zks1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zks1p0_zksed1p0_zksh1p0
+
+.attribute arch, "rv32i_zkt1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zkt1p0
+
+.attribute arch, "rv32i_zk1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0
+
+.attribute arch, "rv32izihintntl0p2"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zihintntl0p2
+
+.attribute arch, "rv32iczihintntl0p2"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_c2p0_zihintntl0p2
+
+.attribute arch, "rv32if_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_f2p0_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0
+
+.attribute arch, "rv32izca0p70"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zca0p70
+
+.attribute arch, "rv32izawrs1p0"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_zawrs1p0
+
+.attribute arch, "rv32iztso0p1"
+nop
+.word 32
+# MAPPINGSYMBOLS: $xrv32i2p0_ztso0p1
diff --git a/llvm/test/MC/RISCV/mapping-symbols.s b/llvm/test/MC/RISCV/mapping-symbols.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/mapping-symbols.s
@@ -0,0 +1,44 @@
+# Check section containing code and data with permission executable for the section.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/1.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s
+
+# Check section containing code and data with no permissions for the section.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/2.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s
+
+# Check section containing code and data with read/write permissions for the section.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/3.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s
+
+# Check section containing data with no permissions for the section.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/4.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+
+# Check section containing only data with read/write permissions for the section.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/5.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+
+# Check section containing the ident string with no permissions for the section.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/ident.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+
+# Check section containing code and data with no permissions for the section.
+# data comes before code.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/6.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s -check-prefix=MIX
+
+# Check section containing code and data with no permissions for the section.
+# data comes before code.
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %p/Inputs/7.s
+# RUN: llvm-readelf -s %t.o | FileCheck %s
+
+#CHECK-DAG: $x
+#CHECK-DAG: $d
+
+#MIX: $d
+#MIX: $x
+#MIX: $d
+#MIX: $x
+
+#MAPPINGSYMBOLS-NOT: $x
+#MAPPINGSYMBOLS-NOT: $d
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -464,8 +464,14 @@
   return Elf && Elf->getEMachine() == ELF::EM_CSKY;
 }
 
+static bool isRISCVElf(const ObjectFile &Obj) {
+  const auto *Elf = dyn_cast<ELFObjectFileBase>(&Obj);
+  return Elf && Elf->getEMachine() == ELF::EM_RISCV;
+}
+
 static bool hasMappingSymbols(const ObjectFile &Obj) {
-  return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ;
+  return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ||
+         isRISCVElf(Obj);
 }
 
 static bool isMappingSymbol(const SymbolInfoTy &Sym) {