diff --git a/lld/test/ELF/riscv-relax-align-rvc.s b/lld/test/ELF/riscv-relax-align-rvc.s
--- a/lld/test/ELF/riscv-relax-align-rvc.s
+++ b/lld/test/ELF/riscv-relax-align-rvc.s
@@ -50,7 +50,7 @@
 # CHECK-NEXT:           c.addi  a0, 8
 # CHECK-EMPTY:
 
-# CHECK:      <.text2>:
+# CHECK:      <$x.1>:
 # CHECK-NEXT:           addi    a0, a1, 1
 # CHECK-NEXT:           c.addi  a0, 1
 # CHECK-NEXT:           c.nop
diff --git a/lld/test/ELF/riscv-relax-call.s b/lld/test/ELF/riscv-relax-call.s
--- a/lld/test/ELF/riscv-relax-call.s
+++ b/lld/test/ELF/riscv-relax-call.s
@@ -47,16 +47,16 @@
 # NORVC-NEXT:            jal    ra, 0x10420
 # NORVC-EMPTY:
 
-# NORVC-LABEL: <.mid>:
+# NORVC-LABEL: <$x.1>:
 # NORVC-NEXT:    10800:  jal    ra, {{.*}} <_start>
 # NORVC-NEXT:            jal    ra, {{.*}} <_start>
 # NORVC-EMPTY:
 
-# NORVC-LABEL: <.mid2>:
+# NORVC-LABEL: <$x.2>:
 # NORVC-NEXT:    1080c:  jal    ra, {{.*}} <_start>
 # NORVC-EMPTY:
 
-# NORVC-LABEL: <.high>:
+# NORVC-LABEL: <$x.3>:
 # NORVC-NEXT:   110006:  auipc  ra, 1048320
 # NORVC-NEXT:            jalr   ra, -6(ra)
 # NORVC-NEXT:            auipc  ra, 1048320
@@ -87,18 +87,18 @@
 # RVC-NEXT:              c.jr   ra
 # RVC-EMPTY:
 
-# RVC-LABEL:   <.mid>:
+# RVC-LABEL:   <$x.1>:
 # RVC32-NEXT:    10800:  c.jal  {{.*}} <_start>
 # RVC64-NEXT:    10800:  jal    ra, {{.*}} <_start>
 # RVC-NEXT:              jal    ra, {{.*}} <_start>
 # RVC-EMPTY:
 
-# RVC-LABEL:   <.mid2>:
+# RVC-LABEL:   <$x.2>:
 # RVC32-NEXT:    1080a:  jal    ra, {{.*}} <_start>
 # RVC64-NEXT:    1080c:  jal    ra, {{.*}} <_start>
 # RVC-EMPTY:
 
-# RVC-LABEL:   <.high>:
+# RVC-LABEL:   <$x.3>:
 # RVC32-NEXT:   110000:  jal    ra, 0x10000 <_start>
 # RVC32-NEXT:            auipc  ra, 1048320
 # RVC32-NEXT:            jalr   ra, -4(ra)
diff --git a/lld/test/ELF/riscv-relax-call2.s b/lld/test/ELF/riscv-relax-call2.s
--- a/lld/test/ELF/riscv-relax-call2.s
+++ b/lld/test/ELF/riscv-relax-call2.s
@@ -20,12 +20,12 @@
 # CHECK-NEXT:             jalr   zero, -4(t1)
 # CHECK-EMPTY:
 
-# CHECK-LABEL:  <.mid>:
+# CHECK-LABEL:  <$x.1>:
 # CHECK-NEXT:             jal    zero, 0x101000
 # CHECK-NEXT:             c.j    0x101000
 # CHECK-EMPTY:
 
-# CHECK2-LABEL: <.mid>:
+# CHECK2-LABEL: <$x.1>:
 # CHECK2-NEXT:            auipc  t1, 0
 # CHECK2-NEXT:            jalr   zero, 0(t1)
 # CHECK2-NEXT:            auipc  t1, 0
diff --git a/lld/test/ELF/riscv-tls-le.s b/lld/test/ELF/riscv-tls-le.s
--- a/lld/test/ELF/riscv-tls-le.s
+++ b/lld/test/ELF/riscv-tls-le.s
@@ -49,7 +49,7 @@
 # LE-NEXT: sw a0, -2048(a4)
 # LE-EMPTY:
 
-# LE-RELAX:      <.text>:
+# LE-RELAX:      <$x.0>:
 # LE-RELAX-NEXT:   addi a1, tp, 8
 # LE-RELAX-NEXT:   addi a2, tp, 2044
 # LE-RELAX-NEXT:   addi a0, a0, 1
diff --git a/lld/test/ELF/riscv-variant-cc.s b/lld/test/ELF/riscv-variant-cc.s
--- a/lld/test/ELF/riscv-variant-cc.s
+++ b/lld/test/ELF/riscv-variant-cc.s
@@ -45,9 +45,10 @@
 # CHECK5:      0 NOTYPE  GLOBAL DEFAULT [VARIANT_CC] UND   func_global_undef
 # CHECK5-NEXT: 0 NOTYPE  GLOBAL DEFAULT [VARIANT_CC] [[#]] func_global_def
 # CHECK5-NEXT: 0 IFUNC   GLOBAL DEFAULT [VARIANT_CC] [[#]] ifunc_global_def
-# CHECK5:      Symbol table '.symtab' contains 9 entries:
+# CHECK5:      Symbol table '.symtab' contains 10 entries:
 # CHECK5:      0 NOTYPE  LOCAL  DEFAULT [VARIANT_CC] [[#]] func_local
 # CHECK5-NEXT: 0 IFUNC   LOCAL  DEFAULT [VARIANT_CC] [[#]] ifunc_local
+# CHECK5-NEXT: 0 NOTYPE  LOCAL  DEFAULT              [[#]] $x.0
 # CHECK5:      0 NOTYPE  LOCAL  HIDDEN  [VARIANT_CC] [[#]] func_global_hidden
 # CHECK5-NEXT: 0 IFUNC   LOCAL  HIDDEN  [VARIANT_CC] [[#]] ifunc_global_hidden
 # CHECK5:      0 NOTYPE  GLOBAL DEFAULT [VARIANT_CC] [[#]] func_global_def
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
@@ -25,7 +25,40 @@
                    std::unique_ptr<MCCodeEmitter> MCE)
       : MCELFStreamer(C, std::move(MAB), std::move(MOW), std::move(MCE)) {}
 
+  void emitFill(const MCExpr &NumBytes, uint64_t FillValue, SMLoc Loc) override;
+  void changeSection(MCSection *Section, const MCExpr *Subsection) override;
   void emitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override;
+  void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
+  void emitBytes(StringRef Data) override;
+  void ChangeISAMappingSymbol(unsigned Attribute, StringRef Value);
+
+private:
+  enum ElfMappingSymbol { EMS_None, EMS_ISA, EMS_Change, EMS_Data };
+
+  struct ElfMappingSymbolInfo {
+    explicit ElfMappingSymbolInfo(SMLoc Loc, MCFragment *F, uint64_t O)
+        : Loc(Loc), F(F), Offset(O), State(EMS_None) {}
+
+    SMLoc Loc;
+    MCFragment *F;
+    uint64_t Offset;
+    ElfMappingSymbol State;
+    std::string ISAInfo;
+  };
+
+  void emitDataMappingSymbol();
+  void FlushPendingMappingSymbol();
+  void EmitISAMappingSymbol();
+  void EmitMappingSymbol(StringRef Name, SMLoc Loc, MCFragment *F,
+                         uint64_t Offset);
+  void EmitMappingSymbol(StringRef Name);
+
+  int64_t MappingSymbolCounter = 0;
+
+  DenseMap<const MCSection *, std::unique_ptr<ElfMappingSymbolInfo>>
+      LastMappingSymbols;
+
+  std::unique_ptr<ElfMappingSymbolInfo> LastEMSInfo;
 };
 
 namespace llvm {
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
@@ -59,6 +59,7 @@
 void RISCVTargetELFStreamer::emitTextAttribute(unsigned Attribute,
                                                StringRef String) {
   getStreamer().setAttributeItem(Attribute, String, /*OverwriteExisting=*/true);
+  getStreamer().ChangeISAMappingSymbol(Attribute, String);
 }
 
 void RISCVTargetELFStreamer::emitIntTextAttribute(unsigned Attribute,
@@ -175,10 +176,35 @@
 void RISCVELFStreamer::reset() {
   static_cast<RISCVTargetStreamer *>(getTargetStreamer())->reset();
   MCELFStreamer::reset();
+
+  MappingSymbolCounter = 0;
+  LastMappingSymbols.clear();
+  LastEMSInfo.reset(new ElfMappingSymbolInfo(SMLoc(), nullptr, EMS_None));
+}
+
+// This part is for mapping symbol.
+
+void RISCVELFStreamer::emitFill(const MCExpr &NumBytes, uint64_t FillValue,
+                                SMLoc Loc) {
+  emitDataMappingSymbol();
+  MCObjectStreamer::emitFill(NumBytes, FillValue, Loc);
+}
+
+void RISCVELFStreamer::changeSection(MCSection *Section,
+                                     const MCExpr *Subsection) {
+  LastMappingSymbols[getCurrentSection().first] = std::move(LastEMSInfo);
+  MCELFStreamer::changeSection(Section, Subsection);
+  auto LastMappingSymbol = LastMappingSymbols.find(Section);
+  if (LastMappingSymbol != LastMappingSymbols.end()) {
+    LastEMSInfo = std::move(LastMappingSymbol->second);
+    return;
+  }
+  LastEMSInfo.reset(new ElfMappingSymbolInfo(SMLoc(), nullptr, EMS_None));
 }
 
 void RISCVELFStreamer::emitValueImpl(const MCExpr *Value, unsigned Size,
                                      SMLoc Loc) {
+
   const MCExpr *A, *B;
   if (!requiresFixups(getContext(), Value, A, B))
     return MCELFStreamer::emitValueImpl(Value, Size, Loc);
@@ -198,6 +224,71 @@
       MCFixup::create(DF->getContents().size(), B, Sub, Loc));
 
   DF->getContents().resize(DF->getContents().size() + Size, 0);
+  emitDataMappingSymbol();
+}
+
+/// This function is the one used to emit instruction data into the ELF
+/// streamer. We override it to add the appropriate mapping symbol if
+/// necessary.
+void RISCVELFStreamer::emitInstruction(const MCInst &Inst,
+                                       const MCSubtargetInfo &STI) {
+  EmitISAMappingSymbol();
+  MCELFStreamer::emitInstruction(Inst, STI);
+}
+
+/// This is one of the functions used to emit data into an ELF section, so the
+/// RISCV streamer overrides it to add the appropriate mapping symbol ($d) if
+/// necessary.
+void RISCVELFStreamer::emitBytes(StringRef Data) {
+  emitDataMappingSymbol();
+  MCELFStreamer::emitBytes(Data);
+}
+
+void RISCVELFStreamer::emitDataMappingSymbol() {
+  if (LastEMSInfo->State == EMS_Data)
+    return;
+  LastEMSInfo->State = EMS_Data;
+  EmitMappingSymbol("$d");
+}
+
+void RISCVELFStreamer::ChangeISAMappingSymbol(unsigned Attribute,
+                                              StringRef arch) {
+  if (Attribute != RISCVAttrs::ARCH)
+    return;
+  if (arch != LastEMSInfo->ISAInfo) {
+    LastEMSInfo->State = EMS_Change;
+    LastEMSInfo->ISAInfo = std::string(arch);
+  }
+}
+
+void RISCVELFStreamer::EmitISAMappingSymbol() {
+  if (LastEMSInfo->State == EMS_ISA)
+    return;
+  if (LastEMSInfo->State == EMS_Change) {
+    EmitMappingSymbol("$x" + LastEMSInfo->ISAInfo);
+    LastEMSInfo->State = EMS_ISA;
+    return;
+  }
+  EmitMappingSymbol("$x");
+  LastEMSInfo->State = EMS_ISA;
+}
+
+// void RISCVELFStreamer::EmitMappingSymbol(StringRef Name, SMLoc Loc,
+//                                          MCFragment *F, uint64_t Offset) {
+//   auto *Symbol = cast<MCSymbolELF>(getContext().getOrCreateSymbol(
+//       Name + "." + Twine(MappingSymbolCounter++)));
+//   emitLabelAtPos(Symbol, Loc, F, Offset);
+//   Symbol->setType(ELF::STT_NOTYPE);
+//   Symbol->setBinding(ELF::STB_LOCAL);
+// }
+
+void RISCVELFStreamer::EmitMappingSymbol(StringRef Name) {
+  auto *Symbol = cast<MCSymbolELF>(getContext().getOrCreateSymbol(
+      Name + "." + Twine(MappingSymbolCounter++)));
+  emitLabel(Symbol);
+  Symbol->setType(ELF::STT_NOTYPE);
+  Symbol->setBinding(ELF::STB_LOCAL);
+  Symbol->setExternal(false);
 }
 
 namespace llvm {
diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s
--- a/llvm/test/MC/RISCV/align.s
+++ b/llvm/test/MC/RISCV/align.s
@@ -128,7 +128,7 @@
 	.word 9
 # Check that the initial alignment is properly handled when using .option to
 # disable the C extension. This used to crash.
-# C-OR-ZCA-EXT-RELAX-INST:      <.text2>:
+# C-OR-ZCA-EXT-RELAX-INST:      <$x.4>:
 # C-OR-ZCA-EXT-RELAX-INST-NEXT: add a0, a0, a1
 	.section .text2, "x"
 	.option norvc
diff --git a/llvm/test/MC/RISCV/mapping-across-sections.s b/llvm/test/MC/RISCV/mapping-across-sections.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/mapping-across-sections.s
@@ -0,0 +1,27 @@
+# RUN: llvm-mc -triple=riscv32 -filetype=obj -o %t.o %s
+# RUN: llvm-objdump -t %t.o | FileCheck %s
+
+.text
+nop
+
+.section .foo
+nop
+
+.section .starts_data
+.word 32
+
+
+.text
+nop
+
+#With all those constraints, we want:
+#   + .text to have $x and no others
+#   + .foo to have $x and no others
+#   + .starts_data to have $d and no others
+
+
+# CHECK:             $x
+# CHECK-NEXT:        $x
+# CHECK-NEXT:        $d
+# CHECK-NOT: ${{[adtx]}}
+
diff --git a/llvm/test/MC/RISCV/mapping-isa.s b/llvm/test/MC/RISCV/mapping-isa.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/mapping-isa.s
@@ -0,0 +1,369 @@
+## Arch string with mapping symbols.
+## This file associates with attribute-arch.s
+
+# RUN: llvm-mc -triple=riscv32 -filetype=obj -o %t.o %s
+# RUN: llvm-objdump -t %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+# RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t.o %s
+# RUN: llvm-objdump -t %t.o | FileCheck %s -check-prefix=MAPPINGSYMBOLS
+
+.text
+.attribute arch, "rv32i"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1
+
+.attribute arch, "rv32i2p1"
+nop
+# MAPPINGSYMBOLS-NOT: $xrv32i2p1
+## The arch "rv32i" and "rv32i2p1" has the same isa string
+## So the nop should have no mapping-symbol
+
+.attribute arch, "rv32e"
+nop
+# MAPPINGSYMBOLS: $xrv32e2p0
+
+.attribute arch, "rv64e"
+nop
+# MAPPINGSYMBOLS: $xrv64e2p0
+
+.attribute arch, "rv32i2p1_m2"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_m2p0
+
+.attribute arch, "rv32i2p1_ma"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_m2p0_a2p1
+
+.attribute arch, "rv32g"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0
+
+.attribute arch, "rv32imafdc"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0
+
+.attribute arch, "rv32i2p1_mafdc"
+nop
+# MAPPINGSYMBOLS-NOT: ${{[xd]}}
+.attribute arch, "rv32ima2p1_fdc"
+nop
+# MAPPINGSYMBOLS-NOT: ${{[xd]}}
+.attribute arch, "rv32ima2p1_fdc"
+nop
+# MAPPINGSYMBOLS-NOT: ${{[xd]}}
+## The arch "rv32imafdc", "rv32i2p1_mafdc", "rv32ima2p1_fdc",  "rv32ima2p1_fdc" has the same isa string
+## So the nop should have no mapping-symbol
+
+.attribute arch, "rv32iv"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl32b"
+nop
+# MAPPINGSYMBOLS-NOT: ${{[xd]}}
+.attribute arch, "rv32ivzvl64b"
+nop
+# MAPPINGSYMBOLS-NOT: ${{[xd]}}
+.attribute arch, "rv32ivzvl128b"
+nop
+# MAPPINGSYMBOLS-NOT: ${{[xd]}}
+## The arch "rv32iv", "rv32i2p1_mafdc", "rv32ivzvl64b",  "rv32ivzvl128b" has the same isa string
+## So the nop should have no mapping-symbol
+
+
+.attribute arch, "rv32ivzvl256b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl512b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl1024b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl2048b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl4096b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0
+
+.attribute arch, "rv32ivzvl8192b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
+
+.attribute arch, "rv32ivzvl16384b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
+
+.attribute arch, "rv32ivzvl32768b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
+
+.attribute arch, "rv32ivzvl65536b"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0
+
+.attribute arch, "rv32izve32x"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zvl32b1p0
+
+.attribute arch, "rv32ifzve32f"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvl32b1p0
+
+.attribute arch, "rv32izve64x"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ifzve64f"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32ifdzve64d"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_d2p2_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32izicbom"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicbom1p0
+
+.attribute arch, "rv32izicboz"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicboz1p0
+
+.attribute arch, "rv32izicbop"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicbop1p0
+
+## Experimental extensions require version string to be explicitly specified
+
+.attribute arch, "rv32izba1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zba1p0
+
+.attribute arch, "rv32izbb1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbb1p0
+
+.attribute arch, "rv32izbc1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbc1p0
+
+.attribute arch, "rv32i_zve64x_zvbb0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zvbb0p5_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve64x_zvbc0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zvbc0p5_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve32x_zvkg0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zvkg0p5_zvl32b1p0
+
+.attribute arch, "rv32i_zve64x_zvkn0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkn0p5_zvkned0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve64x_zvkng0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvkn0p5_zvkned0p5_zvkng0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve32x_zvknha0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zvknha0p5_zvl32b1p0
+
+.attribute arch, "rv32i_zve64x_zvknhb0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p5_zvknhb0p5_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve32x_zvkned0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zvkned0p5_zvl32b1p0
+
+.attribute arch, "rv32i_zve64x_zvks0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvks0p5_zvksed0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve64x_zvksg0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvks0p5_zvksed0p5_zvksg0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0
+
+.attribute arch, "rv32i_zve32x_zvksed0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zvksed0p5_zvl32b1p0
+
+.attribute arch, "rv32i_zve32x_zvksh0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zve32x1p0_zvksh0p5_zvl32b1p0
+
+.attribute arch, "rv32i_zvkt0p5"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zvkt0p5
+
+.attribute arch, "rv32izbs1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbs1p0
+
+.attribute arch, "rv32ifzfhmin1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zfhmin1p0
+
+.attribute arch, "rv32ifzfh1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zfh1p0
+
+.attribute arch, "rv32izfinx"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zfinx1p0
+
+.attribute arch, "rv32izfinx_zdinx"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zfinx1p0_zdinx1p0
+
+.attribute arch, "rv32izfinx_zhinxmin"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zfinx1p0_zhinxmin1p0
+
+.attribute arch, "rv32izfinx_zhinx1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0_zfinx1p0_zhinx1p0
+
+.attribute arch, "rv32i_zbkb1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbkb1p0
+
+.attribute arch, "rv32i_zbkc1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbkc1p0
+
+.attribute arch, "rv32i_zbkx1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbkx1p0
+
+.attribute arch, "rv32i_zknd1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zknd1p0
+
+.attribute arch, "rv32i_zkne1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zkne1p0
+
+.attribute arch, "rv32i_zknh1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zknh1p0
+
+.attribute arch, "rv32i_zksed1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zksed1p0
+
+.attribute arch, "rv32i_zksh1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zksh1p0
+
+.attribute arch, "rv32i_zkr1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zkr1p0
+
+.attribute arch, "rv32i_zkn1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbkb1p0_zbkc1p0_zbkx1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0
+
+.attribute arch, "rv32i_zks1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbkb1p0_zbkc1p0_zbkx1p0_zks1p0_zksed1p0_zksh1p0
+
+.attribute arch, "rv32i_zkt1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zkt1p0
+
+.attribute arch, "rv32i_zk1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0
+
+.attribute arch, "rv32izihintntl0p2"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zihintntl0p2
+
+.attribute arch, "rv32iczihintntl0p2"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_c2p0_zihintntl0p2
+
+.attribute arch, "rv32if_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0
+
+.attribute arch, "rv32izca1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zca1p0
+
+.attribute arch, "rv32izcd1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zcd1p0
+
+.attribute arch, "rv32izcf1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zcf1p0
+
+.attribute arch, "rv32izcb1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zca1p0_zcb1p0
+
+.attribute arch, "rv32izcmp1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zca1p0_zcmp1p0
+
+.attribute arch, "rv32izcmt1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zca1p0_zcmt1p0
+
+.attribute arch, "rv64i_xsfvcp"
+nop
+# MAPPINGSYMBOLS: $xrv64i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_xsfvcp1p0
+
+.attribute arch, "rv32izawrs1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zawrs1p0
+
+.attribute arch, "rv32iztso0p1"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_ztso0p1
+
+.attribute arch, "rv32izicsr2p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicsr2p0
+
+.attribute arch, "rv32izifencei2p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zifencei2p0
+
+.attribute arch, "rv32izfa0p2"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zfa0p2
+
+.attribute arch, "rv32izicond1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_zicond1p0
+
+.attribute arch, "rv32i_smaia1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_smaia1p0
+
+.attribute arch, "rv32i_ssaia1p0"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_ssaia1p0
+
+.attribute arch, "rv32i_zfbfmin0p6"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zfbfmin0p6
+
+.attribute arch, "rv32i_zvfbfmin0p6"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin0p6_zvl32b1p0
+
+.attribute arch, "rv32i_zvfbfwma0p6"
+nop
+# MAPPINGSYMBOLS: $xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfwma0p6_zvl32b1p0
diff --git a/llvm/test/MC/RISCV/mapping-within-section.s b/llvm/test/MC/RISCV/mapping-within-section.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/mapping-within-section.s
@@ -0,0 +1,23 @@
+# RUN: llvm-mc -triple=riscv32 -filetype=obj -o %t.o %s
+# RUN: llvm-objdump -t %t.o | FileCheck %s
+
+.section .foo
+nop
+.word 32
+nop
+.word 32
+# CHECK:      $x
+# CHECK-NEXT: $d
+# CHECK-NEXT: $x
+# CHECK-NEXT: $d
+
+.attribute arch, "rv32i"
+nop
+nop
+nop
+nop
+
+# CHECK-NEXT:      $x
+# CHECK-NOT: ${{[x]}}
+# CHECK-NOT: ${{[x]}}
+# CHECK-NOT: ${{[x]}}
\ No newline at end of file
diff --git a/llvm/test/MC/RISCV/nop-slide.s b/llvm/test/MC/RISCV/nop-slide.s
--- a/llvm/test/MC/RISCV/nop-slide.s
+++ b/llvm/test/MC/RISCV/nop-slide.s
@@ -9,19 +9,26 @@
 .balign 4
 auipc a0, 0
 
-# CHECK-RVC-NORELAX: 0000000000000000 <.text>:
+# CHECK-RVC-NORELAX: 0000000000000000 <$d.0>:
 # CHECK-RVC-NORELAX-NEXT: 0: 00 00        	unimp
 # CHECK-RVC-NORELAX-NEXT: 2: 01 00        	nop
+
+# CHECK-RVC-NORELAX: 0000000000000004 <$x.1>:
 # CHECK-RVC-NORELAX-NEXT: 4: 17 05 00 00  	auipc	a0, 0
 
 # CHECK-RVC-RELAX: 0000000000000000 <.text>:
 # CHECK-RVC-RELAX-NEXT:   0: 01 00        	nop
+
+# CHECK-RVC-RELAX: 0000000000000002 <$d.0>:
 # CHECK-RVC-RELAX-NEXT:   2: 00 01        	addi	s0, sp, 128
 # CHECK-RVC-RELAX-NEXT:   4: 00 17        	addi	s0, sp, 928
-# CHECK-RVC-RELAX-NEXT:   6: 05 00        	c.nop	1
-# CHECK-RVC-RELAX-NEXT:   8: 00           	<unknown>
 
-# CHECK: 0000000000000000 <.text>:
+# CHECK-RVC-RELAX: 0000000000000005 <$x.1>:
+# CHECK-RVC-RELAX-NEXT:   5: 17 05 00 00          auipc   a0, 0
+
+# CHECK: 0000000000000000 <$d.0>:
 # CHECK-NEXT: 0: 00 00        	<unknown>
 # CHECK-NEXT: 2: 00 00        	<unknown>
+
+# CHECK: 0000000000000004 <$x.1>:
 # CHECK-NEXT: 4: 17 05 00 00  	auipc	a0, 0
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -465,8 +465,14 @@
   return Elf && Elf->getEMachine() == ELF::EM_CSKY;
 }
 
+static bool isRISCVElf(const ObjectFile &Obj) {
+  const auto *Elf = dyn_cast<ELFObjectFileBase>(&Obj);
+  return Elf && Elf->getEMachine() == ELF::EM_RISCV;
+}
+
 static bool hasMappingSymbols(const ObjectFile &Obj) {
-  return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ;
+  return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ||
+         isRISCVElf(Obj);
 }
 
 static bool isMappingSymbol(const SymbolInfoTy &Sym) {
@@ -1753,7 +1759,7 @@
         // denoted as a word/short etc.
         if (!MappingSymbols.empty()) {
           char Kind = getMappingSymbolKind(MappingSymbols, Index);
-          DumpARMELFData = Kind == 'd';
+          DumpARMELFData = (Kind == 'd' && !isRISCVElf(Obj));
           if (SecondarySTI) {
             if (Kind == 'a') {
               STI = PrimaryIsThumb ? SecondarySTI : PrimarySTI;