diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -1180,6 +1180,13 @@
   umbrella_lit_testsuite_begin(check-all)
 endif()
 
+if (NOT BUILD_SHARED_LIBS AND NOT APPLE AND
+    (NOT (WIN32 OR CYGWIN) OR (MINGW AND CMAKE_CXX_COMPILER_ID MATCHES "Clang")) AND
+    NOT (${CMAKE_SYSTEM_NAME} MATCHES "AIX") AND
+    NOT DEFINED CMAKE_CXX_VISIBILITY_PRESET)
+  set(LLVM_CAN_USE_HIDDEN_VISIBILITY ON)
+endif()
+
 # Put this before tblgen. Else we have a circular dependence.
 add_subdirectory(lib/Demangle)
 add_subdirectory(lib/Support)
diff --git a/llvm/include/llvm/CodeGen/CommandFlags.h b/llvm/include/llvm/CodeGen/CommandFlags.h
--- a/llvm/include/llvm/CodeGen/CommandFlags.h
+++ b/llvm/include/llvm/CodeGen/CommandFlags.h
@@ -28,7 +28,7 @@
 class Function;
 class Triple;
 
-namespace codegen {
+namespace codegen LLVM_EXTERNAL_VISIBILITY {
 
 std::string getMArch();
 
@@ -146,7 +146,7 @@
 
 /// Create this object with static storage to register codegen-related command
 /// line options.
-struct RegisterCodeGenFlags {
+struct LLVM_EXTERNAL_VISIBILITY RegisterCodeGenFlags {
   RegisterCodeGenFlags();
 };
 
@@ -179,7 +179,7 @@
 /// Should value-tracking variable locations / instruction referencing be
 /// enabled by default for this triple?
 bool getDefaultValueTrackingVariableLocations(const llvm::Triple &T);
-} // namespace codegen
+} // namespace LLVM_EXTERNAL_VISIBILITY
 } // namespace llvm
 
 #endif // LLVM_CODEGEN_COMMANDFLAGS_H
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -218,6 +218,7 @@
 /// It keeps internally the insertion point and debug location for all
 /// the new instructions we want to create.
 /// This information can be modify via the related setters.
+LLVM_EXTERNAL_VISIBILITY // For unittests
 class MachineIRBuilder {
 
   MachineIRBuilderState State;
diff --git a/llvm/include/llvm/CodeGen/MIRParser/MIRParser.h b/llvm/include/llvm/CodeGen/MIRParser/MIRParser.h
--- a/llvm/include/llvm/CodeGen/MIRParser/MIRParser.h
+++ b/llvm/include/llvm/CodeGen/MIRParser/MIRParser.h
@@ -41,7 +41,7 @@
 
 /// This class initializes machine functions by applying the state loaded from
 /// a MIR file.
-class MIRParser {
+class LLVM_EXTERNAL_VISIBILITY MIRParser {
   std::unique_ptr<MIRParserImpl> Impl;
 
 public:
@@ -74,6 +74,7 @@
 /// \param Context - Context which will be used for the parsed LLVM IR module.
 /// \param ProcessIRFunction - function to run on every IR function or stub
 /// loaded from the MIR file.
+LLVM_EXTERNAL_VISIBILITY
 std::unique_ptr<MIRParser> createMIRParserFromFile(
     StringRef Filename, SMDiagnostic &Error, LLVMContext &Context,
     std::function<void(Function &)> ProcessIRFunction = nullptr);
@@ -86,6 +87,7 @@
 ///
 /// \param Contents - The MemoryBuffer containing the machine level IR.
 /// \param Context - Context which will be used for the parsed LLVM IR module.
+LLVM_EXTERNAL_VISIBILITY
 std::unique_ptr<MIRParser>
 createMIRParser(std::unique_ptr<MemoryBuffer> Contents, LLVMContext &Context,
                 std::function<void(Function &)> ProcessIRFunction = nullptr);
diff --git a/llvm/include/llvm/CodeGen/MIRPrinter.h b/llvm/include/llvm/CodeGen/MIRPrinter.h
--- a/llvm/include/llvm/CodeGen/MIRPrinter.h
+++ b/llvm/include/llvm/CodeGen/MIRPrinter.h
@@ -14,6 +14,8 @@
 #ifndef LLVM_CODEGEN_MIRPRINTER_H
 #define LLVM_CODEGEN_MIRPRINTER_H
 
+#include "llvm/Support/Compiler.h"
+
 namespace llvm {
 
 class MachineBasicBlock;
@@ -23,10 +25,12 @@
 template <typename T> class SmallVectorImpl;
 
 /// Print LLVM IR using the MIR serialization format to the given output stream.
+LLVM_EXTERNAL_VISIBILITY
 void printMIR(raw_ostream &OS, const Module &M);
 
 /// Print a machine function using the MIR serialization format to the given
 /// output stream.
+LLVM_EXTERNAL_VISIBILITY
 void printMIR(raw_ostream &OS, const MachineFunction &MF);
 
 /// Determine a possible list of successors of a basic block based on the
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -74,7 +74,7 @@
   MBBSectionID(SectionType T) : Type(T), Number(0) {}
 };
 
-template <> struct ilist_traits<MachineInstr> {
+template <> struct LLVM_EXTERNAL_VISIBILITY ilist_traits<MachineInstr> {
 private:
   friend class MachineBasicBlock; // Set by the owning MachineBasicBlock.
 
@@ -91,7 +91,7 @@
   void deleteNode(MachineInstr *MI);
 };
 
-class MachineBasicBlock
+class LLVM_EXTERNAL_VISIBILITY MachineBasicBlock
     : public ilist_node_with_parent<MachineBasicBlock, MachineFunction> {
 public:
   /// Pair of physical register and lane mask.
diff --git a/llvm/include/llvm/CodeGen/MachineDominators.h b/llvm/include/llvm/CodeGen/MachineDominators.h
--- a/llvm/include/llvm/CodeGen/MachineDominators.h
+++ b/llvm/include/llvm/CodeGen/MachineDominators.h
@@ -48,7 +48,7 @@
 /// DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to
 /// compute a normal dominator tree.
 ///
-class MachineDominatorTree : public MachineFunctionPass {
+class LLVM_EXTERNAL_VISIBILITY MachineDominatorTree : public MachineFunctionPass {
   /// Helper structure used to hold all the basic blocks
   /// involved in the split of a critical edge.
   struct CriticalEdge {
diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
--- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
@@ -103,7 +103,7 @@
 /// the program.
 ///
 /// Abstract Stack Frame Information
-class MachineFrameInfo {
+class LLVM_EXTERNAL_VISIBILITY MachineFrameInfo {
 public:
   /// Stack Smashing Protection (SSP) rules require that vulnerable stack
   /// allocations are located close the stack protector.
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -78,7 +78,7 @@
   void deleteNode(MachineBasicBlock *MBB);
 };
 
-template <> struct ilist_callback_traits<MachineBasicBlock> {
+template <> struct LLVM_EXTERNAL_VISIBILITY ilist_callback_traits<MachineBasicBlock> {
   void addNodeToList(MachineBasicBlock* N);
   void removeNodeFromList(MachineBasicBlock* N);
 
diff --git a/llvm/include/llvm/CodeGen/MachineFunctionPass.h b/llvm/include/llvm/CodeGen/MachineFunctionPass.h
--- a/llvm/include/llvm/CodeGen/MachineFunctionPass.h
+++ b/llvm/include/llvm/CodeGen/MachineFunctionPass.h
@@ -27,7 +27,7 @@
 /// allow convenient creation of passes that operate on the MachineFunction
 /// representation. Instead of overriding runOnFunction, subclasses
 /// override runOnMachineFunction.
-class MachineFunctionPass : public FunctionPass {
+class LLVM_EXTERNAL_VISIBILITY MachineFunctionPass : public FunctionPass {
 public:
   bool doInitialization(Module&) override {
     // Cache the properties info at module-init time so we don't have to
diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -63,7 +63,7 @@
 /// MachineFunction is deleted, all the contained MachineInstrs are deallocated
 /// without having their destructor called.
 ///
-class MachineInstr
+class LLVM_EXTERNAL_VISIBILITY MachineInstr
     : public ilist_node_with_parent<MachineInstr, MachineBasicBlock,
                                     ilist_sentinel_tracking<true>> {
 public:
diff --git a/llvm/include/llvm/CodeGen/MachineModuleInfo.h b/llvm/include/llvm/CodeGen/MachineModuleInfo.h
--- a/llvm/include/llvm/CodeGen/MachineModuleInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineModuleInfo.h
@@ -35,6 +35,7 @@
 #include "llvm/IR/PassManager.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/Pass.h"
+#include "llvm/Support/Compiler.h"
 #include <memory>
 #include <utility>
 #include <vector>
@@ -71,7 +72,7 @@
 /// made by different debugging and exception handling schemes and reformated
 /// for specific use.
 ///
-class MachineModuleInfo {
+class LLVM_EXTERNAL_VISIBILITY MachineModuleInfo {
   friend class MachineModuleInfoWrapperPass;
   friend class MachineModuleAnalysis;
 
@@ -211,7 +212,8 @@
   }
 }; // End class MachineModuleInfo
 
-class MachineModuleInfoWrapperPass : public ImmutablePass {
+class LLVM_EXTERNAL_VISIBILITY MachineModuleInfoWrapperPass
+    : public ImmutablePass {
   MachineModuleInfo MMI;
 
 public:
diff --git a/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h b/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h
--- a/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h
+++ b/llvm/include/llvm/CodeGen/MachineModuleSlotTracker.h
@@ -10,6 +10,7 @@
 #define LLVM_CODEGEN_MACHINEMODULESLOTTRACKER_H
 
 #include "llvm/IR/ModuleSlotTracker.h"
+#include "llvm/Support/Compiler.h"
 
 namespace llvm {
 
@@ -19,7 +20,8 @@
 class MachineFunction;
 class Module;
 
-class MachineModuleSlotTracker : public ModuleSlotTracker {
+class LLVM_EXTERNAL_VISIBILITY MachineModuleSlotTracker
+    : public ModuleSlotTracker {
   const Function &TheFunction;
   const MachineModuleInfo &TheMMI;
   unsigned MDNStartSlot = 0, MDNEndSlot = 0;
diff --git a/llvm/include/llvm/CodeGen/MachineOperand.h b/llvm/include/llvm/CodeGen/MachineOperand.h
--- a/llvm/include/llvm/CodeGen/MachineOperand.h
+++ b/llvm/include/llvm/CodeGen/MachineOperand.h
@@ -45,7 +45,7 @@
 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
 /// not having to call the MachineOperand destructor.
 ///
-class MachineOperand {
+class LLVM_EXTERNAL_VISIBILITY MachineOperand {
 public:
   enum MachineOperandType : unsigned char {
     MO_Register,          ///< Register operand.
diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -47,7 +47,7 @@
 /// MachineRegisterInfo - Keep track of information for virtual and physical
 /// registers, including vreg register classes, use/def chains for registers,
 /// etc.
-class MachineRegisterInfo {
+class LLVM_EXTERNAL_VISIBILITY MachineRegisterInfo {
 public:
   class Delegate {
     virtual void anchor();
diff --git a/llvm/include/llvm/CodeGen/NonRelocatableStringpool.h b/llvm/include/llvm/CodeGen/NonRelocatableStringpool.h
--- a/llvm/include/llvm/CodeGen/NonRelocatableStringpool.h
+++ b/llvm/include/llvm/CodeGen/NonRelocatableStringpool.h
@@ -20,7 +20,7 @@
 ///
 /// Use this class when a string table doesn't need relocations.
 /// This class provides this ability by just associating offsets with strings.
-class NonRelocatableStringpool {
+class LLVM_EXTERNAL_VISIBILITY NonRelocatableStringpool {
 public:
   /// Entries are stored into the StringMap and simply linked together through
   /// the second element of this pair in order to keep track of insertion
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -34,7 +34,7 @@
 } // End llvm namespace
 
 // List of target independent CodeGen pass IDs.
-namespace llvm {
+namespace llvm LLVM_EXTERNAL_VISIBILITY {
 
   /// AtomicExpandPass - At IR level this pass replace atomic instructions with
   /// __atomic_* library calls, or target specific instruction which implement the
diff --git a/llvm/include/llvm/CodeGen/PseudoSourceValue.h b/llvm/include/llvm/CodeGen/PseudoSourceValue.h
--- a/llvm/include/llvm/CodeGen/PseudoSourceValue.h
+++ b/llvm/include/llvm/CodeGen/PseudoSourceValue.h
@@ -152,7 +152,7 @@
 };
 
 /// Manages creation of pseudo source values.
-class PseudoSourceValueManager {
+class LLVM_EXTERNAL_VISIBILITY PseudoSourceValueManager {
   const TargetMachine &TM;
   const PseudoSourceValue StackPSV, GOTPSV, JumpTablePSV, ConstantPoolPSV;
   std::map<int, std::unique_ptr<FixedStackPseudoSourceValue>> FSValues;
diff --git a/llvm/include/llvm/CodeGen/SchedulerRegistry.h b/llvm/include/llvm/CodeGen/SchedulerRegistry.h
--- a/llvm/include/llvm/CodeGen/SchedulerRegistry.h
+++ b/llvm/include/llvm/CodeGen/SchedulerRegistry.h
@@ -60,11 +60,13 @@
 
 /// createBURRListDAGScheduler - This creates a bottom up register usage
 /// reduction list scheduler.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
                                                CodeGenOpt::Level OptLevel);
 
 /// createBURRListDAGScheduler - This creates a bottom up list scheduler that
 /// schedules nodes in source code order when possible.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createSourceListDAGScheduler(SelectionDAGISel *IS,
                                                  CodeGenOpt::Level OptLevel);
 
@@ -72,6 +74,7 @@
 /// aware list scheduler that make use of latency information to avoid stalls
 /// for long latency instructions in low register pressure mode. In high
 /// register pressure mode it schedules to reduce register pressure.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createHybridListDAGScheduler(SelectionDAGISel *IS,
                                                  CodeGenOpt::Level);
 
@@ -79,26 +82,31 @@
 /// aware list scheduler that tries to increase instruction level parallelism
 /// in low register pressure mode. In high register pressure mode it schedules
 /// to reduce register pressure.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createILPListDAGScheduler(SelectionDAGISel *IS,
                                               CodeGenOpt::Level);
 
 /// createFastDAGScheduler - This creates a "fast" scheduler.
 ///
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
                                            CodeGenOpt::Level OptLevel);
 
 /// createVLIWDAGScheduler - Scheduler for VLIW targets. This creates top down
 /// DFA driven list scheduler with clustering heuristic to control
 /// register pressure.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createVLIWDAGScheduler(SelectionDAGISel *IS,
                                            CodeGenOpt::Level OptLevel);
 /// createDefaultScheduler - This creates an instruction scheduler appropriate
 /// for the target.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
                                            CodeGenOpt::Level OptLevel);
 
 /// createDAGLinearizer - This creates a "no-scheduling" scheduler which
 /// linearize the DAG using topological order.
+LLVM_EXTERNAL_VISIBILITY
 ScheduleDAGSDNodes *createDAGLinearizer(SelectionDAGISel *IS,
                                         CodeGenOpt::Level OptLevel);
 
diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -81,7 +81,7 @@
 ///
 /// This is an ImmutablePass solely for the purpose of exposing CodeGen options
 /// to the internals of other CodeGen passes.
-class TargetPassConfig : public ImmutablePass {
+class LLVM_EXTERNAL_VISIBILITY TargetPassConfig : public ImmutablePass {
 private:
   PassManagerBase *PM = nullptr;
   AnalysisID StartBefore = nullptr;
diff --git a/llvm/include/llvm/IR/BuiltinGCs.h b/llvm/include/llvm/IR/BuiltinGCs.h
--- a/llvm/include/llvm/IR/BuiltinGCs.h
+++ b/llvm/include/llvm/IR/BuiltinGCs.h
@@ -14,6 +14,8 @@
 #ifndef LLVM_IR_BUILTINGCS_H
 #define LLVM_IR_BUILTINGCS_H
 
+#include "llvm/Support/Compiler.h"
+
 namespace llvm {
 
 /// FIXME: Collector instances are not useful on their own. These no longer
@@ -23,9 +25,11 @@
 void linkAllBuiltinGCs();
 
 /// Creates an ocaml-compatible metadata printer.
+LLVM_EXTERNAL_VISIBILITY
 void linkOcamlGCPrinter();
 
 /// Creates an erlang-compatible metadata printer.
+LLVM_EXTERNAL_VISIBILITY
 void linkErlangGCPrinter();
 
 } // namespace llvm
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -14,7 +14,9 @@
 #ifndef LLVM_INITIALIZEPASSES_H
 #define LLVM_INITIALIZEPASSES_H
 
-namespace llvm {
+#include "llvm/Support/Compiler.h"
+
+namespace llvm LLVM_EXTERNAL_VISIBILITY {
 
 class PassRegistry;
 
diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt
--- a/llvm/lib/CodeGen/CMakeLists.txt
+++ b/llvm/lib/CodeGen/CMakeLists.txt
@@ -1,3 +1,7 @@
+if (LLVM_CAN_USE_HIDDEN_VISIBILITY)
+  set(CMAKE_CXX_VISIBILITY_PRESET hidden)
+endif()
+
 if (DEFINED LLVM_HAVE_TF_AOT OR DEFINED LLVM_HAVE_TF_API)
   include(TensorFlowCompile)
   set(LLVM_RAEVICT_MODEL_PATH_DEFAULT "models/regalloc-eviction")
diff --git a/llvm/lib/Target/CMakeLists.txt b/llvm/lib/Target/CMakeLists.txt
--- a/llvm/lib/Target/CMakeLists.txt
+++ b/llvm/lib/Target/CMakeLists.txt
@@ -21,12 +21,7 @@
 
 # When building shared objects for each target there are some internal APIs
 # that are used across shared objects which we can't hide.
-if (NOT BUILD_SHARED_LIBS AND NOT APPLE AND
-    (NOT (WIN32 OR CYGWIN) OR (MINGW AND CMAKE_CXX_COMPILER_ID MATCHES "Clang")) AND
-    NOT (${CMAKE_SYSTEM_NAME} MATCHES "AIX") AND
-    NOT DEFINED CMAKE_CXX_VISIBILITY_PRESET)
-  # Set default visibility to hidden, so we don't export all the Target classes
-  # in libLLVM.so.
+if (LLVM_CAN_USE_HIDDEN_VISIBILITY)
   set(CMAKE_CXX_VISIBILITY_PRESET hidden)
 endif()