diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -713,6 +713,7 @@
   * Support intrinsic of ``_mm(256)_cvtneoph_ps``.
   * Support intrinsic of ``_mm(256)_cvtneps_avx_pbh``.
 - ``-march=raptorlake`` and ``-march=meteorlake`` are now supported.
+* ``-march=sierraforest``, ``-march=graniterapids`` and ``-march=grandridge`` are now supported.
 
 WebAssembly Support in Clang
 ----------------------------
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -526,6 +526,9 @@
   case CK_Alderlake:
   case CK_Raptorlake:
   case CK_Meteorlake:
+  case CK_Sierraforest:
+  case CK_Grandridge:
+  case CK_Graniterapids:
     // FIXME: Historically, we defined this legacy name, it would be nice to
     // remove it at some point. We've never exposed fine-grained names for
     // recent primary x86 CPUs, and we should keep it that way.
@@ -1413,6 +1416,9 @@
     case CK_Alderlake:
     case CK_Raptorlake:
     case CK_Meteorlake:
+    case CK_Sierraforest:
+    case CK_Grandridge:
+    case CK_Graniterapids:
     case CK_KNL:
     case CK_KNM:
     // K7
diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c
--- a/clang/test/CodeGen/attr-target-mv.c
+++ b/clang/test/CodeGen/attr-target-mv.c
@@ -17,6 +17,9 @@
 int __attribute__((target("arch=core2"))) foo(void) {return 13;}
 int __attribute__((target("arch=raptorlake"))) foo(void) {return 14;}
 int __attribute__((target("arch=meteorlake"))) foo(void) {return 15;}
+int __attribute__((target("arch=sierraforest"))) foo(void) {return 16;}
+int __attribute__((target("arch=grandridge"))) foo(void) {return 17;}
+int __attribute__((target("arch=graniterapids"))) foo(void) {return 18;}
 int __attribute__((target("default"))) foo(void) { return 2; }
 
 int bar(void) {
@@ -155,6 +158,12 @@
 // LINUX: ret i32 14
 // LINUX: define{{.*}} i32 @foo.arch_meteorlake()
 // LINUX: ret i32 15
+// LINUX: define{{.*}} i32 @foo.arch_sierraforest()
+// LINUX: ret i32 16
+// LINUX: define{{.*}} i32 @foo.arch_grandridge()
+// LINUX: ret i32 17
+// LINUX: define{{.*}} i32 @foo.arch_graniterapids()
+// LINUX: ret i32 18
 // LINUX: define{{.*}} i32 @foo()
 // LINUX: ret i32 2
 // LINUX: define{{.*}} i32 @bar()
@@ -190,6 +199,12 @@
 // WINDOWS: ret i32 14
 // WINDOWS: define dso_local i32 @foo.arch_meteorlake()
 // WINDOWS: ret i32 15
+// WINDOWS: define{{.*}} i32 @foo.arch_sierraforest()
+// WINDOWS: ret i32 16
+// WINDOWS: define{{.*}} i32 @foo.arch_grandridge()
+// WINDOWS: ret i32 17
+// WINDOWS: define{{.*}} i32 @foo.arch_graniterapids()
+// WINDOWS: ret i32 18
 // WINDOWS: define dso_local i32 @foo()
 // WINDOWS: ret i32 2
 // WINDOWS: define dso_local i32 @bar()
diff --git a/clang/test/CodeGen/target-builtin-noerror.c b/clang/test/CodeGen/target-builtin-noerror.c
--- a/clang/test/CodeGen/target-builtin-noerror.c
+++ b/clang/test/CodeGen/target-builtin-noerror.c
@@ -107,6 +107,8 @@
   (void)__builtin_cpu_is("corei7");
   (void)__builtin_cpu_is("goldmont");
   (void)__builtin_cpu_is("goldmont-plus");
+  (void)__builtin_cpu_is("grandridge");
+  (void)__builtin_cpu_is("graniterapids");
   (void)__builtin_cpu_is("haswell");
   (void)__builtin_cpu_is("icelake-client");
   (void)__builtin_cpu_is("icelake-server");
@@ -121,6 +123,7 @@
   (void)__builtin_cpu_is("rocketlake");
   (void)__builtin_cpu_is("sandybridge");
   (void)__builtin_cpu_is("shanghai");
+  (void)__builtin_cpu_is("sierraforest");
   (void)__builtin_cpu_is("silvermont");
   (void)__builtin_cpu_is("skylake");
   (void)__builtin_cpu_is("skylake-avx512");
diff --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c
--- a/clang/test/Driver/x86-march.c
+++ b/clang/test/Driver/x86-march.c
@@ -119,6 +119,17 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=tremont 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=tremont
 // tremont: "-target-cpu" "tremont"
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=sierraforest 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=sierraforest
+// sierraforest: "-target-cpu" "sierraforest"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=grandridge 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=grandridge
+// grandridge: "-target-cpu" "grandridge"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=graniterapids 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=graniterapids
+// graniterapids: "-target-cpu" "graniterapids"
 //
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=sapphirerapids 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=sapphirerapids
diff --git a/clang/test/Misc/target-invalid-cpu-note.c b/clang/test/Misc/target-invalid-cpu-note.c
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -13,19 +13,19 @@
 
 // RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86
 // X86: error: unknown target CPU 'not-a-cpu'
-// X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, x86-64-v2, x86-64-v3, x86-64-v4, geode{{$}}
+// X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, sierraforest, grandridge, graniterapids, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, x86-64-v2, x86-64-v3, x86-64-v4, geode{{$}}
 
 // RUN: not %clang_cc1 -triple x86_64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86_64
 // X86_64: error: unknown target CPU 'not-a-cpu'
-// X86_64-NEXT: note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, x86-64-v2, x86-64-v3, x86-64-v4{{$}}
+// X86_64-NEXT: note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, sierraforest, grandridge, graniterapids, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, x86-64-v2, x86-64-v3, x86-64-v4{{$}}
 
 // RUN: not %clang_cc1 -triple i386--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_X86
 // TUNE_X86: error: unknown target CPU 'not-a-cpu'
-// TUNE_X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, geode{{$}}
+// TUNE_X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, sierraforest, grandridge, graniterapids, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, geode{{$}}
 
 // RUN: not %clang_cc1 -triple x86_64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_X86_64
 // TUNE_X86_64: error: unknown target CPU 'not-a-cpu'
-// TUNE_X86_64-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, geode{{$}}
+// TUNE_X86_64-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, raptorlake, meteorlake, sierraforest, grandridge, graniterapids, knl, knm, lakemont, k6, k6-2, k6-3, athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x86-64, geode{{$}}
 
 // RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX
 // NVPTX: error: unknown target CPU 'not-a-cpu'
diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c
--- a/clang/test/Preprocessor/predefined-arch-macros.c
+++ b/clang/test/Preprocessor/predefined-arch-macros.c
@@ -1788,6 +1788,155 @@
 // CHECK_SPR_M64: #define __x86_64 1
 // CHECK_SPR_M64: #define __x86_64__ 1
 
+// RUN: %clang -march=graniterapids -m32 -E -dM %s -o - 2>&1 \
+// RUN:     --target=i386 \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_GNR_M32
+// CHECK_GNR_M32: #define __AES__ 1
+// CHECK_GNR_M32: #define __AMXBF16__ 1
+// CHECK_GNR_M32: #define __AMXFP16__ 1
+// CHECK_GNR_M32: #define __AMXINT8__ 1
+// CHECK_GNR_M32: #define __AMXTILE__ 1
+// CHECK_GNR_M32: #define __AVX2__ 1
+// CHECK_GNR_M32: #define __AVX512BF16__ 1
+// CHECK_GNR_M32: #define __AVX512BITALG__ 1
+// CHECK_GNR_M32: #define __AVX512BW__ 1
+// CHECK_GNR_M32: #define __AVX512CD__ 1
+// CHECK_GNR_M32: #define __AVX512DQ__ 1
+// CHECK_GNR_M32: #define __AVX512FP16__ 1
+// CHECK_GNR_M32: #define __AVX512F__ 1
+// CHECK_GNR_M32: #define __AVX512IFMA__ 1
+// CHECK_GNR_M32: #define __AVX512VBMI2__ 1
+// CHECK_GNR_M32: #define __AVX512VBMI__ 1
+// CHECK_GNR_M32: #define __AVX512VL__ 1
+// CHECK_GNR_M32: #define __AVX512VNNI__ 1
+// CHECK_GNR_M32: #define __AVX512VPOPCNTDQ__ 1
+// CHECK_GNR_M32: #define __AVXVNNI__ 1
+// CHECK_GNR_M32: #define __AVX__ 1
+// CHECK_GNR_M32: #define __BMI2__ 1
+// CHECK_GNR_M32: #define __BMI__ 1
+// CHECK_GNR_M32: #define __CLDEMOTE__ 1
+// CHECK_GNR_M32: #define __CLFLUSHOPT__ 1
+// CHECK_GNR_M32: #define __CLWB__ 1
+// CHECK_GNR_M32: #define __ENQCMD__ 1
+// CHECK_GNR_M32: #define __F16C__ 1
+// CHECK_GNR_M32: #define __FMA__ 1
+// CHECK_GNR_M32: #define __GFNI__ 1
+// CHECK_GNR_M32: #define __INVPCID__ 1
+// CHECK_GNR_M32: #define __LZCNT__ 1
+// CHECK_GNR_M32: #define __MMX__ 1
+// CHECK_GNR_M32: #define __MOVBE__ 1
+// CHECK_GNR_M32: #define __PCLMUL__ 1
+// CHECK_GNR_M32: #define __PCONFIG__ 1
+// CHECK_GNR_M32: #define __PKU__ 1
+// CHECK_GNR_M32: #define __POPCNT__ 1
+// CHECK_GNR_M32: #define __PREFETCHI__ 1
+// CHECK_GNR_M32: #define __PRFCHW__ 1
+// CHECK_GNR_M32: #define __PTWRITE__ 1
+// CHECK_GNR_M32: #define __RDPID__ 1
+// CHECK_GNR_M32: #define __RDRND__ 1
+// CHECK_GNR_M32: #define __RDSEED__ 1
+// CHECK_GNR_M32: #define __SERIALIZE__ 1
+// CHECK_GNR_M32: #define __SGX__ 1
+// CHECK_GNR_M32: #define __SHA__ 1
+// CHECK_GNR_M32: #define __SHSTK__ 1
+// CHECK_GNR_M32: #define __SSE2__ 1
+// CHECK_GNR_M32: #define __SSE3__ 1
+// CHECK_GNR_M32: #define __SSE4_1__ 1
+// CHECK_GNR_M32: #define __SSE4_2__ 1
+// CHECK_GNR_M32: #define __SSE__ 1
+// CHECK_GNR_M32: #define __SSSE3__ 1
+// CHECK_GNR_M32: #define __TSXLDTRK__ 1
+// CHECK_GNR_M32: #define __UINTR__ 1
+// CHECK_GNR_M32: #define __VAES__ 1
+// CHECK_GNR_M32: #define __VPCLMULQDQ__ 1
+// CHECK_GNR_M32: #define __WAITPKG__ 1
+// CHECK_GNR_M32: #define __WBNOINVD__ 1
+// CHECK_GNR_M32: #define __XSAVEC__ 1
+// CHECK_GNR_M32: #define __XSAVEOPT__ 1
+// CHECK_GNR_M32: #define __XSAVES__ 1
+// CHECK_GNR_M32: #define __XSAVE__ 1
+// CHECK_GNR_M32: #define __corei7 1
+// CHECK_GNR_M32: #define __corei7__ 1
+// CHECK_GNR_M32: #define __i386 1
+// CHECK_GNR_M32: #define __i386__ 1
+// CHECK_GNR_M32: #define __tune_corei7__ 1
+// CHECK_GNR_M32: #define i386 1
+
+// RUN: %clang -march=graniterapids -m64 -E -dM %s -o - 2>&1 \
+// RUN:     --target=x86_64 \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_GNR_M64
+// CHECK_GNR_M64: #define __AES__ 1
+// CHECK_GNR_M64: #define __AMXBF16__ 1
+// CHECK_GNR_M64: #define __AMXFP16__ 1
+// CHECK_GNR_M64: #define __AMXINT8__ 1
+// CHECK_GNR_M64: #define __AMXTILE__ 1
+// CHECK_GNR_M64: #define __AVX2__ 1
+// CHECK_GNR_M64: #define __AVX512BF16__ 1
+// CHECK_GNR_M64: #define __AVX512BITALG__ 1
+// CHECK_GNR_M64: #define __AVX512BW__ 1
+// CHECK_GNR_M64: #define __AVX512CD__ 1
+// CHECK_GNR_M64: #define __AVX512DQ__ 1
+// CHECK_GNR_M64: #define __AVX512FP16__ 1
+// CHECK_GNR_M64: #define __AVX512F__ 1
+// CHECK_GNR_M64: #define __AVX512IFMA__ 1
+// CHECK_GNR_M64: #define __AVX512VBMI2__ 1
+// CHECK_GNR_M64: #define __AVX512VBMI__ 1
+// CHECK_GNR_M64: #define __AVX512VL__ 1
+// CHECK_GNR_M64: #define __AVX512VNNI__ 1
+// CHECK_GNR_M64: #define __AVX512VPOPCNTDQ__ 1
+// CHECK_GNR_M64: #define __AVXVNNI__ 1
+// CHECK_GNR_M64: #define __AVX__ 1
+// CHECK_GNR_M64: #define __BMI2__ 1
+// CHECK_GNR_M64: #define __BMI__ 1
+// CHECK_GNR_M64: #define __CLDEMOTE__ 1
+// CHECK_GNR_M64: #define __CLFLUSHOPT__ 1
+// CHECK_GNR_M64: #define __CLWB__ 1
+// CHECK_GNR_M64: #define __ENQCMD__ 1
+// CHECK_GNR_M64: #define __F16C__ 1
+// CHECK_GNR_M64: #define __FMA__ 1
+// CHECK_GNR_M64: #define __GFNI__ 1
+// CHECK_GNR_M64: #define __INVPCID__ 1
+// CHECK_GNR_M64: #define __LZCNT__ 1
+// CHECK_GNR_M64: #define __MMX__ 1
+// CHECK_GNR_M64: #define __MOVBE__ 1
+// CHECK_GNR_M64: #define __PCLMUL__ 1
+// CHECK_GNR_M64: #define __PCONFIG__ 1
+// CHECK_GNR_M64: #define __PKU__ 1
+// CHECK_GNR_M64: #define __POPCNT__ 1
+// CHECK_GNR_M64: #define __PREFETCHI__ 1
+// CHECK_GNR_M64: #define __PRFCHW__ 1
+// CHECK_GNR_M64: #define __PTWRITE__ 1
+// CHECK_GNR_M64: #define __RDPID__ 1
+// CHECK_GNR_M64: #define __RDRND__ 1
+// CHECK_GNR_M64: #define __RDSEED__ 1
+// CHECK_GNR_M64: #define __SERIALIZE__ 1
+// CHECK_GNR_M64: #define __SGX__ 1
+// CHECK_GNR_M64: #define __SHA__ 1
+// CHECK_GNR_M64: #define __SHSTK__ 1
+// CHECK_GNR_M64: #define __SSE2__ 1
+// CHECK_GNR_M64: #define __SSE3__ 1
+// CHECK_GNR_M64: #define __SSE4_1__ 1
+// CHECK_GNR_M64: #define __SSE4_2__ 1
+// CHECK_GNR_M64: #define __SSE__ 1
+// CHECK_GNR_M64: #define __SSSE3__ 1
+// CHECK_GNR_M64: #define __TSXLDTRK__ 1
+// CHECK_GNR_M64: #define __UINTR__ 1
+// CHECK_GNR_M64: #define __VAES__ 1
+// CHECK_GNR_M64: #define __VPCLMULQDQ__ 1
+// CHECK_GNR_M64: #define __WAITPKG__ 1
+// CHECK_GNR_M64: #define __WBNOINVD__ 1
+// CHECK_GNR_M64: #define __XSAVEC__ 1
+// CHECK_GNR_M64: #define __XSAVEOPT__ 1
+// CHECK_GNR_M64: #define __XSAVES__ 1
+// CHECK_GNR_M64: #define __XSAVE__ 1
+// CHECK_GNR_M64: #define __amd64 1
+// CHECK_GNR_M64: #define __amd64__ 1
+// CHECK_GNR_M64: #define __corei7 1
+// CHECK_GNR_M64: #define __corei7__ 1
+// CHECK_GNR_M64: #define __tune_corei7__ 1
+// CHECK_GNR_M64: #define __x86_64 1
+// CHECK_GNR_M64: #define __x86_64__ 1
+
 // RUN: %clang -march=alderlake -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_ADL_M32
@@ -2242,6 +2391,276 @@
 // RUN:   | FileCheck %s -check-prefix=CHECK_LAKEMONT_M64
 // CHECK_LAKEMONT_M64: error:
 
+// RUN: %clang -march=sierraforest -m32 -E -dM %s -o - 2>&1 \
+// RUN:     --target=i386 \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_SRF_M32
+// CHECK_SRF_M32: #define __ADX__ 1
+// CHECK_SRF_M32: #define __AES__ 1
+// CHECK_SRF_M32: #define __AVX2__ 1
+// CHECK_SRF_M32-NOT: AVX512
+// CHECK_SRF_M32: #define __AVXIFMA__ 1
+// CHECK_SRF_M32: #define __AVXNECONVERT__ 1
+// CHECK_SRF_M32: #define __AVXVNNIINT8__ 1
+// CHECK_SRF_M32: #define __AVXVNNI__ 1
+// CHECK_SRF_M32: #define __AVX__ 1
+// CHECK_SRF_M32: #define __BMI2__ 1
+// CHECK_SRF_M32: #define __BMI__ 1
+// CHECK_SRF_M32: #define __CLDEMOTE__ 1
+// CHECK_SRF_M32: #define __CLFLUSHOPT__ 1
+// CHECK_SRF_M32: #define __CLWB__ 1
+// CHECK_SRF_M32: #define __CMPCCXADD__ 1
+// CHECK_SRF_M32: #define __F16C__ 1
+// CHECK_SRF_M32: #define __FMA__ 1
+// CHECK_SRF_M32: #define __FSGSBASE__ 1
+// CHECK_SRF_M32: #define __FXSR__ 1
+// CHECK_SRF_M32: #define __GFNI__ 1
+// CHECK_SRF_M32: #define __HRESET__ 1
+// CHECK_SRF_M32: #define __INVPCID__ 1
+// CHECK_SRF_M32: #define __KL__ 1
+// CHECK_SRF_M32: #define __LZCNT__ 1
+// CHECK_SRF_M32: #define __MMX__ 1
+// CHECK_SRF_M32: #define __MOVBE__ 1
+// CHECK_SRF_M32: #define __MOVDIR64B__ 1
+// CHECK_SRF_M32: #define __MOVDIRI__ 1
+// CHECK_SRF_M32: #define __PCLMUL__ 1
+// CHECK_SRF_M32: #define __PCONFIG__ 1
+// CHECK_SRF_M32: #define __PKU__ 1
+// CHECK_SRF_M32: #define __POPCNT__ 1
+// CHECK_SRF_M32: #define __PRFCHW__ 1
+// CHECK_SRF_M32: #define __PTWRITE__ 1
+// CHECK_SRF_M32: #define __RDPID__ 1
+// CHECK_SRF_M32: #define __RDRND__ 1
+// CHECK_SRF_M32: #define __RDSEED__ 1
+// CHECK_SRF_M32: #define __SERIALIZE__ 1
+// CHECK_SRF_M32: #define __SGX__ 1
+// CHECK_SRF_M32: #define __SHA__ 1
+// CHECK_SRF_M32: #define __SHSTK__ 1
+// CHECK_SRF_M32: #define __SSE2__ 1
+// CHECK_SRF_M32: #define __SSE3__ 1
+// CHECK_SRF_M32: #define __SSE4_1__ 1
+// CHECK_SRF_M32: #define __SSE4_2__ 1
+// CHECK_SRF_M32: #define __SSE_MATH__ 1
+// CHECK_SRF_M32: #define __SSE__ 1
+// CHECK_SRF_M32: #define __SSSE3__ 1
+// CHECK_SRF_M32: #define __VAES__ 1
+// CHECK_SRF_M32: #define __VPCLMULQDQ__ 1
+// CHECK_SRF_M32: #define __WAITPKG__ 1
+// CHECK_SRF_M32: #define __WIDEKL__ 1
+// CHECK_SRF_M32: #define __XSAVEC__ 1
+// CHECK_SRF_M32: #define __XSAVEOPT__ 1
+// CHECK_SRF_M32: #define __XSAVES__ 1
+// CHECK_SRF_M32: #define __XSAVE__ 1
+// CHECK_SRF_M32: #define __corei7 1
+// CHECK_SRF_M32: #define __corei7__ 1
+// CHECK_SRF_M32: #define __i386 1
+// CHECK_SRF_M32: #define __i386__ 1
+// CHECK_SRF_M32: #define __tune_corei7__ 1
+// CHECK_SRF_M32: #define i386 1
+
+// RUN: %clang -march=sierraforest -m64 -E -dM %s -o - 2>&1 \
+// RUN:     --target=i386 \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_SRF_M64
+// CHECK_SRF_M64: #define __ADX__ 1
+// CHECK_SRF_M64: #define __AES__ 1
+// CHECK_SRF_M64: #define __AVX2__ 1
+// CHECK_SRF_M64-NOT: AVX512
+// CHECK_SRF_M64: #define __AVXIFMA__ 1
+// CHECK_SRF_M64: #define __AVXNECONVERT__ 1
+// CHECK_SRF_M64: #define __AVXVNNIINT8__ 1
+// CHECK_SRF_M64: #define __AVXVNNI__ 1
+// CHECK_SRF_M64: #define __AVX__ 1
+// CHECK_SRF_M64: #define __BMI2__ 1
+// CHECK_SRF_M64: #define __BMI__ 1
+// CHECK_SRF_M64: #define __CLDEMOTE__ 1
+// CHECK_SRF_M64: #define __CLFLUSHOPT__ 1
+// CHECK_SRF_M64: #define __CLWB__ 1
+// CHECK_SRF_M64: #define __CMPCCXADD__ 1
+// CHECK_SRF_M64: #define __F16C__ 1
+// CHECK_SRF_M64: #define __FMA__ 1
+// CHECK_SRF_M64: #define __FSGSBASE__ 1
+// CHECK_SRF_M64: #define __FXSR__ 1
+// CHECK_SRF_M64: #define __GFNI__ 1
+// CHECK_SRF_M64: #define __HRESET__ 1
+// CHECK_SRF_M64: #define __INVPCID__ 1
+// CHECK_SRF_M64: #define __KL__ 1
+// CHECK_SRF_M64: #define __LZCNT__ 1
+// CHECK_SRF_M64: #define __MMX__ 1
+// CHECK_SRF_M64: #define __MOVBE__ 1
+// CHECK_SRF_M64: #define __MOVDIR64B__ 1
+// CHECK_SRF_M64: #define __MOVDIRI__ 1
+// CHECK_SRF_M64: #define __PCLMUL__ 1
+// CHECK_SRF_M64: #define __PCONFIG__ 1
+// CHECK_SRF_M64: #define __PKU__ 1
+// CHECK_SRF_M64: #define __POPCNT__ 1
+// CHECK_SRF_M64: #define __PRFCHW__ 1
+// CHECK_SRF_M64: #define __PTWRITE__ 1
+// CHECK_SRF_M64: #define __RDPID__ 1
+// CHECK_SRF_M64: #define __RDRND__ 1
+// CHECK_SRF_M64: #define __RDSEED__ 1
+// CHECK_SRF_M64: #define __SERIALIZE__ 1
+// CHECK_SRF_M64: #define __SGX__ 1
+// CHECK_SRF_M64: #define __SHA__ 1
+// CHECK_SRF_M64: #define __SHSTK__ 1
+// CHECK_SRF_M64: #define __SSE2_MATH__ 1
+// CHECK_SRF_M64: #define __SSE2__ 1
+// CHECK_SRF_M64: #define __SSE3__ 1
+// CHECK_SRF_M64: #define __SSE4_1__ 1
+// CHECK_SRF_M64: #define __SSE4_2__ 1
+// CHECK_SRF_M64: #define __SSE_MATH__ 1
+// CHECK_SRF_M64: #define __SSE__ 1
+// CHECK_SRF_M64: #define __SSSE3__ 1
+// CHECK_SRF_M64: #define __VAES__ 1
+// CHECK_SRF_M64: #define __VPCLMULQDQ__ 1
+// CHECK_SRF_M64: #define __WAITPKG__ 1
+// CHECK_SRF_M64: #define __WIDEKL__ 1
+// CHECK_SRF_M64: #define __XSAVEC__ 1
+// CHECK_SRF_M64: #define __XSAVEOPT__ 1
+// CHECK_SRF_M64: #define __XSAVES__ 1
+// CHECK_SRF_M64: #define __XSAVE__ 1
+// CHECK_SRF_M64: #define __amd64 1
+// CHECK_SRF_M64: #define __amd64__ 1
+// CHECK_SRF_M64: #define __corei7 1
+// CHECK_SRF_M64: #define __corei7__ 1
+// CHECK_SRF_M64: #define __tune_corei7__ 1
+// CHECK_SRF_M64: #define __x86_64 1
+// CHECK_SRF_M64: #define __x86_64__ 1
+
+// RUN: %clang -march=grandridge -m32 -E -dM %s -o - 2>&1 \
+// RUN:     --target=i386 \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_GRR_M32
+// CHECK_GRR_M32: #define __ADX__ 1
+// CHECK_GRR_M32: #define __AES__ 1
+// CHECK_GRR_M32: #define __AVX2__ 1
+// CHECK_GRR_M32-NOT: AVX512
+// CHECK_GRR_M32: #define __AVXIFMA__ 1
+// CHECK_GRR_M32: #define __AVXNECONVERT__ 1
+// CHECK_GRR_M32: #define __AVXVNNIINT8__ 1
+// CHECK_GRR_M32: #define __AVXVNNI__ 1
+// CHECK_GRR_M32: #define __AVX__ 1
+// CHECK_GRR_M32: #define __BMI2__ 1
+// CHECK_GRR_M32: #define __BMI__ 1
+// CHECK_GRR_M32: #define __CLDEMOTE__ 1
+// CHECK_GRR_M32: #define __CLFLUSHOPT__ 1
+// CHECK_GRR_M32: #define __CLWB__ 1
+// CHECK_GRR_M32: #define __CMPCCXADD__ 1
+// CHECK_GRR_M32: #define __F16C__ 1
+// CHECK_GRR_M32: #define __FMA__ 1
+// CHECK_GRR_M32: #define __FSGSBASE__ 1
+// CHECK_GRR_M32: #define __FXSR__ 1
+// CHECK_GRR_M32: #define __GFNI__ 1
+// CHECK_GRR_M32: #define __HRESET__ 1
+// CHECK_GRR_M32: #define __INVPCID__ 1
+// CHECK_GRR_M32: #define __KL__ 1
+// CHECK_GRR_M32: #define __LZCNT__ 1
+// CHECK_GRR_M32: #define __MMX__ 1
+// CHECK_GRR_M32: #define __MOVBE__ 1
+// CHECK_GRR_M32: #define __MOVDIR64B__ 1
+// CHECK_GRR_M32: #define __MOVDIRI__ 1
+// CHECK_GRR_M32: #define __PCLMUL__ 1
+// CHECK_GRR_M32: #define __PCONFIG__ 1
+// CHECK_GRR_M32: #define __PKU__ 1
+// CHECK_GRR_M32: #define __POPCNT__ 1
+// CHECK_GRR_M32: #define __PRFCHW__ 1
+// CHECK_GRR_M32: #define __PTWRITE__ 1
+// CHECK_GRR_M32: #define __RAOINT__ 1
+// CHECK_GRR_M32: #define __RDPID__ 1
+// CHECK_GRR_M32: #define __RDRND__ 1
+// CHECK_GRR_M32: #define __RDSEED__ 1
+// CHECK_GRR_M32: #define __SERIALIZE__ 1
+// CHECK_GRR_M32: #define __SGX__ 1
+// CHECK_GRR_M32: #define __SHA__ 1
+// CHECK_GRR_M32: #define __SHSTK__ 1
+// CHECK_GRR_M32: #define __SSE2__ 1
+// CHECK_GRR_M32: #define __SSE3__ 1
+// CHECK_GRR_M32: #define __SSE4_1__ 1
+// CHECK_GRR_M32: #define __SSE4_2__ 1
+// CHECK_GRR_M32: #define __SSE_MATH__ 1
+// CHECK_GRR_M32: #define __SSE__ 1
+// CHECK_GRR_M32: #define __SSSE3__ 1
+// CHECK_GRR_M32: #define __VAES__ 1
+// CHECK_GRR_M32: #define __VPCLMULQDQ__ 1
+// CHECK_GRR_M32: #define __WAITPKG__ 1
+// CHECK_GRR_M32: #define __WIDEKL__ 1
+// CHECK_GRR_M32: #define __XSAVEC__ 1
+// CHECK_GRR_M32: #define __XSAVEOPT__ 1
+// CHECK_GRR_M32: #define __XSAVES__ 1
+// CHECK_GRR_M32: #define __XSAVE__ 1
+// CHECK_GRR_M32: #define __corei7 1
+// CHECK_GRR_M32: #define __corei7__ 1
+// CHECK_GRR_M32: #define __i386 1
+// CHECK_GRR_M32: #define __i386__ 1
+// CHECK_GRR_M32: #define __tune_corei7__ 1
+// CHECK_GRR_M32: #define i386 1
+
+// RUN: %clang -march=grandridge -m64 -E -dM %s -o - 2>&1 \
+// RUN:     --target=x86_64 \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_GRR_M64
+// CHECK_GRR_M64: #define __ADX__ 1
+// CHECK_GRR_M64: #define __AES__ 1
+// CHECK_GRR_M64: #define __AVX2__ 1
+// CHECK_GRR_M64-NOT: AVX512
+// CHECK_GRR_M64: #define __AVXIFMA__ 1
+// CHECK_GRR_M64: #define __AVXNECONVERT__ 1
+// CHECK_GRR_M64: #define __AVXVNNIINT8__ 1
+// CHECK_GRR_M64: #define __AVXVNNI__ 1
+// CHECK_GRR_M64: #define __AVX__ 1
+// CHECK_GRR_M64: #define __BMI2__ 1
+// CHECK_GRR_M64: #define __BMI__ 1
+// CHECK_GRR_M64: #define __CLDEMOTE__ 1
+// CHECK_GRR_M64: #define __CLFLUSHOPT__ 1
+// CHECK_GRR_M64: #define __CLWB__ 1
+// CHECK_GRR_M64: #define __CMPCCXADD__ 1
+// CHECK_GRR_M64: #define __F16C__ 1
+// CHECK_GRR_M64: #define __FMA__ 1
+// CHECK_GRR_M64: #define __FSGSBASE__ 1
+// CHECK_GRR_M64: #define __FXSR__ 1
+// CHECK_GRR_M64: #define __GFNI__ 1
+// CHECK_GRR_M64: #define __HRESET__ 1
+// CHECK_GRR_M64: #define __INVPCID__ 1
+// CHECK_GRR_M64: #define __KL__ 1
+// CHECK_GRR_M64: #define __LZCNT__ 1
+// CHECK_GRR_M64: #define __MMX__ 1
+// CHECK_GRR_M64: #define __MOVBE__ 1
+// CHECK_GRR_M64: #define __MOVDIR64B__ 1
+// CHECK_GRR_M64: #define __MOVDIRI__ 1
+// CHECK_GRR_M64: #define __PCLMUL__ 1
+// CHECK_GRR_M64: #define __PCONFIG__ 1
+// CHECK_GRR_M64: #define __PKU__ 1
+// CHECK_GRR_M64: #define __POPCNT__ 1
+// CHECK_GRR_M64: #define __PRFCHW__ 1
+// CHECK_GRR_M64: #define __PTWRITE__ 1
+// CHECK_GRR_M64: #define __RAOINT__ 1
+// CHECK_GRR_M64: #define __RDPID__ 1
+// CHECK_GRR_M64: #define __RDRND__ 1
+// CHECK_GRR_M64: #define __RDSEED__ 1
+// CHECK_GRR_M64: #define __SERIALIZE__ 1
+// CHECK_GRR_M64: #define __SGX__ 1
+// CHECK_GRR_M64: #define __SHA__ 1
+// CHECK_GRR_M64: #define __SHSTK__ 1
+// CHECK_GRR_M64: #define __SSE2_MATH__ 1
+// CHECK_GRR_M64: #define __SSE2__ 1
+// CHECK_GRR_M64: #define __SSE3__ 1
+// CHECK_GRR_M64: #define __SSE4_1__ 1
+// CHECK_GRR_M64: #define __SSE4_2__ 1
+// CHECK_GRR_M64: #define __SSE_MATH__ 1
+// CHECK_GRR_M64: #define __SSE__ 1
+// CHECK_GRR_M64: #define __SSSE3__ 1
+// CHECK_GRR_M64: #define __VAES__ 1
+// CHECK_GRR_M64: #define __VPCLMULQDQ__ 1
+// CHECK_GRR_M64: #define __WAITPKG__ 1
+// CHECK_GRR_M64: #define __WIDEKL__ 1
+// CHECK_GRR_M64: #define __XSAVEC__ 1
+// CHECK_GRR_M64: #define __XSAVEOPT__ 1
+// CHECK_GRR_M64: #define __XSAVES__ 1
+// CHECK_GRR_M64: #define __XSAVE__ 1
+// CHECK_GRR_M64: #define __amd64 1
+// CHECK_GRR_M64: #define __amd64__ 1
+// CHECK_GRR_M64: #define __corei7 1
+// CHECK_GRR_M64: #define __corei7__ 1
+// CHECK_GRR_M64: #define __tune_corei7__ 1
+// CHECK_GRR_M64: #define __x86_64 1
+// CHECK_GRR_M64: #define __x86_64__ 1
+
 // RUN: %clang -march=geode -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_GEODE_M32
diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c
--- a/compiler-rt/lib/builtins/cpu_model.c
+++ b/compiler-rt/lib/builtins/cpu_model.c
@@ -76,6 +76,9 @@
   INTEL_GOLDMONT_PLUS,
   INTEL_TREMONT,
   AMDFAM19H,
+  ZHAOXIN_FAM7H,
+  INTEL_SIERRAFOREST,
+  INTEL_GRANDRIDGE,
   CPU_TYPE_MAX
 };
 
@@ -107,6 +110,9 @@
   INTEL_COREI7_ALDERLAKE,
   AMDFAM19H_ZNVER3,
   INTEL_COREI7_ROCKETLAKE,
+  ZHAOXIN_FAM7H_LUJIAZUI,
+  AMDFAM19H_ZNVER4,
+  INTEL_COREI7_GRANITERAPIDS,
   CPU_SUBTYPE_MAX
 };
 
@@ -440,6 +446,12 @@
     // Alderlake:
     case 0x97:
     case 0x9a:
+    // Raptorlake:
+    case 0xb7:
+    // Meteorlake:
+    case 0xb5:
+    case 0xaa:
+    case 0xac:
       CPU = "alderlake";
       *Type = INTEL_COREI7;
       *Subtype = INTEL_COREI7_ALDERLAKE;
@@ -460,6 +472,14 @@
       *Subtype = INTEL_COREI7_SAPPHIRERAPIDS;
       break;
 
+    // Graniterapids:
+    case 0xae:
+    case 0xad:
+      CPU = "graniterapids";
+      *Type = INTEL_COREI7;
+      *Subtype = INTEL_COREI7_GRANITERAPIDS;
+      break;
+
     case 0x1c: // Most 45 nm Intel Atom processors
     case 0x26: // 45 nm Atom Lincroft
     case 0x27: // 32 nm Atom Medfield
@@ -494,6 +514,18 @@
       *Type = INTEL_TREMONT;
       break;
 
+    // Sierraforest:
+    case 0xaf:
+      CPU = "sierraforest";
+      *Type = INTEL_SIERRAFOREST;
+      break;
+
+    // Grandridge:
+    case 0xb6:
+      CPU = "grandridge";
+      *Type = INTEL_GRANDRIDGE;
+      break;
+
     case 0x57:
       CPU = "knl";
       *Type = INTEL_KNL;
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -170,6 +170,7 @@
 * Support ISA of ``AVX-VNNI-INT8``.
 * Support ISA of ``AVX-NE-CONVERT``.
 * ``-mcpu=raptorlake`` and ``-mcpu=meteorlake`` are now supported.
+* ``-mcpu=sierraforest``, ``-mcpu=graniterapids`` and ``-mcpu=grandridge`` are now supported.
 
 Changes to the OCaml bindings
 -----------------------------
diff --git a/llvm/include/llvm/Support/X86TargetParser.h b/llvm/include/llvm/Support/X86TargetParser.h
--- a/llvm/include/llvm/Support/X86TargetParser.h
+++ b/llvm/include/llvm/Support/X86TargetParser.h
@@ -106,6 +106,9 @@
   CK_Alderlake,
   CK_Raptorlake,
   CK_Meteorlake,
+  CK_Sierraforest,
+  CK_Grandridge,
+  CK_Graniterapids,
   CK_KNL,
   CK_KNM,
   CK_Lakemont,
diff --git a/llvm/include/llvm/Support/X86TargetParser.def b/llvm/include/llvm/Support/X86TargetParser.def
--- a/llvm/include/llvm/Support/X86TargetParser.def
+++ b/llvm/include/llvm/Support/X86TargetParser.def
@@ -45,6 +45,9 @@
 X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus")
 X86_CPU_TYPE(INTEL_TREMONT,       "tremont")
 X86_CPU_TYPE(AMDFAM19H,           "amdfam19h")
+X86_CPU_TYPE(ZHAOXIN_FAM7H,       "zhaoxin_fam7h")
+X86_CPU_TYPE(INTEL_SIERRAFOREST,  "sierraforest")
+X86_CPU_TYPE(INTEL_GRANDRIDGE,    "grandridge")
 
 // Alternate names supported by __builtin_cpu_is and target multiversioning.
 X86_CPU_TYPE_ALIAS(INTEL_BONNELL,    "atom")
@@ -93,6 +96,9 @@
 X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE,      "alderlake")
 X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3,            "znver3")
 X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE,     "rocketlake")
+X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI,      "zhaoxin_fam7h_lujiazui")
+X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4,            "znver4")
+X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS,  "graniterapids")
 
 // Alternate names supported by __builtin_cpu_is and target multiversioning.
 X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake")
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -827,6 +827,14 @@
       *Subtype = X86::INTEL_COREI7_ALDERLAKE;
       break;
 
+    // Graniterapids:
+    case 0xae:
+    case 0xad:
+      CPU = "graniterapids";
+      *Type = X86::INTEL_COREI7;
+      *Subtype = X86::INTEL_COREI7_GRANITERAPIDS;
+      break;
+
     // Icelake Xeon:
     case 0x6a:
     case 0x6c:
@@ -876,6 +884,18 @@
       *Type = X86::INTEL_TREMONT;
       break;
 
+    // Sierraforest:
+    case 0xaf:
+      CPU = "sierraforest";
+      *Type = X86::INTEL_SIERRAFOREST;
+      break;
+
+    // Grandridge:
+    case 0xb6:
+      CPU = "grandridge";
+      *Type = X86::INTEL_GRANDRIDGE;
+      break;
+
     // Xeon Phi (Knights Landing + Knights Mill):
     case 0x57:
       CPU = "knl";
diff --git a/llvm/lib/Support/X86TargetParser.cpp b/llvm/lib/Support/X86TargetParser.cpp
--- a/llvm/lib/Support/X86TargetParser.cpp
+++ b/llvm/lib/Support/X86TargetParser.cpp
@@ -207,6 +207,8 @@
     FeatureENQCMD | FeatureMOVDIR64B | FeatureMOVDIRI | FeaturePTWRITE |
     FeatureSERIALIZE | FeatureSHSTK | FeatureTSXLDTRK | FeatureUINTR |
     FeatureWAITPKG;
+constexpr FeatureBitset FeaturesGraniteRapids =
+    FeaturesSapphireRapids | FeatureAMX_FP16 | FeaturePREFETCHI;
 
 // Intel Atom processors.
 // Bonnell has feature parity with Core2 and adds MOVBE.
@@ -228,6 +230,11 @@
     FeatureSERIALIZE | FeatureSHSTK | FeatureVAES | FeatureVPCLMULQDQ |
     FeatureCLDEMOTE | FeatureMOVDIR64B | FeatureMOVDIRI | FeatureWAITPKG |
     FeatureAVXVNNI | FeatureHRESET | FeatureWIDEKL;
+constexpr FeatureBitset FeaturesSierraforest =
+    FeaturesAlderlake | FeatureCMPCCXADD | FeatureAVXIFMA |
+    FeatureAVXNECONVERT | FeatureAVXVNNIINT8;
+constexpr FeatureBitset FeaturesGrandridge =
+    FeaturesSierraforest | FeatureRAOINT;
 
 // Geode Processor.
 constexpr FeatureBitset FeaturesGeode =
@@ -374,6 +381,12 @@
   { {"raptorlake"}, CK_Raptorlake, FEATURE_AVX2, FeaturesAlderlake },
   // Meteorlake microarchitecture based processors.
   { {"meteorlake"}, CK_Meteorlake, FEATURE_AVX2, FeaturesAlderlake },
+  // Sierraforest microarchitecture based processors.
+  { {"sierraforest"}, CK_Sierraforest, FEATURE_AVX2, FeaturesSierraforest },
+  // Grandridge microarchitecture based processors.
+  { {"grandridge"}, CK_Grandridge, FEATURE_AVX2, FeaturesGrandridge },
+  // Graniterapids microarchitecture based processors.
+  { {"graniterapids"}, CK_Graniterapids, FEATURE_AVX512BF16, FeaturesGraniteRapids },
   // Knights Landing processor.
   { {"knl"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL },
   // Knights Mill processor.
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
--- a/llvm/lib/Target/X86/X86.td
+++ b/llvm/lib/Target/X86/X86.td
@@ -943,6 +943,12 @@
   list<SubtargetFeature> SPRFeatures =
     !listconcat(ICXFeatures, SPRAdditionalFeatures);
 
+  // Graniterapids
+  list<SubtargetFeature> GNRAdditionalFeatures = [FeatureAMXFP16,
+                                                  FeaturePREFETCHI];
+  list<SubtargetFeature> GNRFeatures =
+    !listconcat(SPRFeatures, GNRAdditionalFeatures);
+
   // Atom
   list<SubtargetFeature> AtomFeatures = [FeatureX87,
                                          FeatureCX8,
@@ -1050,6 +1056,19 @@
   list<SubtargetFeature> ADLFeatures =
     !listconcat(TRMFeatures, ADLAdditionalFeatures);
 
+  // Sierraforest
+  list<SubtargetFeature> SRFAdditionalFeatures = [FeatureCMPCCXADD,
+                                                  FeatureAVXIFMA,
+                                                  FeatureAVXNECONVERT,
+                                                  FeatureAVXVNNIINT8];
+  list<SubtargetFeature> SRFFeatures =
+    !listconcat(ADLFeatures, SRFAdditionalFeatures);
+
+  // Grandridge
+  list<SubtargetFeature> GRRAdditionalFeatures = [FeatureRAOINT];
+  list<SubtargetFeature> GRRFeatures =
+    !listconcat(SRFFeatures, GRRAdditionalFeatures);
+
   // Knights Landing
   list<SubtargetFeature> KNLFeatures = [FeatureX87,
                                         FeatureCX8,
@@ -1441,6 +1460,10 @@
                 ProcessorFeatures.GLPTuning>;
 def : ProcModel<"tremont", SLMModel, ProcessorFeatures.TRMFeatures,
                 ProcessorFeatures.TRMTuning>;
+def : ProcModel<"sierraforest", AlderlakePModel, ProcessorFeatures.SRFFeatures,
+                ProcessorFeatures.TRMTuning>;
+def : ProcModel<"grandridge", AlderlakePModel, ProcessorFeatures.GRRFeatures,
+                ProcessorFeatures.TRMTuning>;
 
 // "Arrandale" along with corei3 and corei5
 foreach P = ["nehalem", "corei7"] in {
@@ -1506,6 +1529,8 @@
                 ProcessorFeatures.ADLFeatures, ProcessorFeatures.ADLTuning>;
 def : ProcModel<"meteorlake", AlderlakePModel,
                 ProcessorFeatures.ADLFeatures, ProcessorFeatures.ADLTuning>;
+def : ProcModel<"graniterapids", SkylakeServerModel,
+                ProcessorFeatures.GNRFeatures, ProcessorFeatures.SPRTuning>;
 
 // AMD CPUs.
 
diff --git a/llvm/test/CodeGen/X86/cpus-intel.ll b/llvm/test/CodeGen/X86/cpus-intel.ll
--- a/llvm/test/CodeGen/X86/cpus-intel.ll
+++ b/llvm/test/CodeGen/X86/cpus-intel.ll
@@ -19,6 +19,9 @@
 ; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 ; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=raptorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 ; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=meteorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=sierraforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=grandridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 
 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
@@ -56,6 +59,9 @@
 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=raptorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=meteorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sierraforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=grandridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
 
 define void @foo() {
   ret void