diff --git a/clang/lib/Basic/Targets/LoongArch.cpp b/clang/lib/Basic/Targets/LoongArch.cpp --- a/clang/lib/Basic/Targets/LoongArch.cpp +++ b/clang/lib/Basic/Targets/LoongArch.cpp @@ -88,6 +88,10 @@ // A signed 12-bit constant (for arithmetic instructions). Info.setRequiresImmediate(-2048, 2047); return true; + case 'J': + // Integer zero. + Info.setRequiresImmediate(0); + return true; case 'K': // An unsigned 12-bit constant (for logic instructions). Info.setRequiresImmediate(0, 4095); diff --git a/clang/test/CodeGen/LoongArch/inline-asm-constraints.c b/clang/test/CodeGen/LoongArch/inline-asm-constraints.c --- a/clang/test/CodeGen/LoongArch/inline-asm-constraints.c +++ b/clang/test/CodeGen/LoongArch/inline-asm-constraints.c @@ -43,6 +43,12 @@ asm volatile ("" :: "I"(-2048)); } +void test_J(void) { +// CHECK-LABEL: define{{.*}} void @test_J() +// CHECK: call void asm sideeffect "", "J"(i32 0) + asm volatile ("" :: "J"(0)); +} + void test_K(void) { // CHECK-LABEL: define{{.*}} void @test_K() // CHECK: call void asm sideeffect "", "K"(i32 4095) diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -2184,6 +2184,7 @@ // offset that is suitable for use in instructions with the same // addressing mode as st.w and ld.w. // 'I': A signed 12-bit constant (for arithmetic instructions). + // 'J': Integer zero. // 'K': An unsigned 12-bit constant (for logic instructions). // "ZB": An address that is held in a general-purpose register. The offset is // zero. @@ -2198,6 +2199,7 @@ return C_RegisterClass; case 'l': case 'I': + case 'J': case 'K': return C_Immediate; case 'k': @@ -2301,6 +2303,13 @@ DAG.getTargetConstant(CVal, SDLoc(Op), Subtarget.getGRLenVT())); } return; + case 'J': + // Validate & create an integer zero operand. + if (auto *C = dyn_cast(Op)) + if (C->getZExtValue() == 0) + Ops.push_back( + DAG.getTargetConstant(0, SDLoc(Op), Subtarget.getGRLenVT())); + return; case 'K': // Validate & create a 12-bit unsigned immediate operand. if (auto *C = dyn_cast(Op)) { diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-error.ll b/llvm/test/CodeGen/LoongArch/inline-asm-constraint-error.ll --- a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-error.ll +++ b/llvm/test/CodeGen/LoongArch/inline-asm-constraint-error.ll @@ -17,6 +17,12 @@ ret void } +define void @constraint_J() { +; CHECK: error: value out of range for constraint 'J' + tail call void asm sideeffect "addi.w $$a0, $$a0, $$0", "J"(i32 1) + ret void +} + define void @constraint_K() { ; CHECK: error: value out of range for constraint 'K' tail call void asm sideeffect "andi.w $$a0, $$a0, $0", "K"(i32 4096) diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-constraint.ll b/llvm/test/CodeGen/LoongArch/inline-asm-constraint.ll --- a/llvm/test/CodeGen/LoongArch/inline-asm-constraint.ll +++ b/llvm/test/CodeGen/LoongArch/inline-asm-constraint.ll @@ -58,6 +58,17 @@ ret void } +define void @constraint_J() nounwind { +; CHECK-LABEL: constraint_J: +; CHECK: # %bb.0: +; CHECK-NEXT: #APP +; CHECK-NEXT: addi.w $a0, $a0, 0 +; CHECK-NEXT: #NO_APP +; CHECK-NEXT: ret + tail call void asm sideeffect "addi.w $$a0, $$a0, $0", "J"(i32 0) + ret void +} + define void @constraint_K() nounwind { ; CHECK-LABEL: constraint_K: ; CHECK: # %bb.0: