diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp --- a/llvm/lib/CodeGen/MachineOutliner.cpp +++ b/llvm/lib/CodeGen/MachineOutliner.cpp @@ -116,6 +116,10 @@ cl::desc( "Number of times to rerun the outliner after the initial outline")); +static cl::opt OutlinerBenefitThreshold( + "outliner-benefit-threshold", cl::init(1), cl::Hidden, + cl::desc("The minimum size before an outlining candidate is accpeted")); + namespace { /// Maps \p MachineInstrs to unsigned integers and stores the mappings. @@ -664,7 +668,7 @@ continue; // Is it better to outline this candidate than not? - if (OF.getBenefit() < 1) { + if (OF.getBenefit() < OutlinerBenefitThreshold) { emitNotOutliningCheaperRemark(StringLen, CandidatesForRepeatedSeq, OF); continue; } @@ -840,7 +844,7 @@ }); // If we made it unbeneficial to outline this function, skip it. - if (OF.getBenefit() < 1) + if (OF.getBenefit() < OutlinerBenefitThreshold) continue; // It's beneficial. Create the function and outline its sequence's diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-threshold.ll b/llvm/test/CodeGen/AArch64/machine-outliner-threshold.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/machine-outliner-threshold.ll @@ -0,0 +1,117 @@ +; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin -outliner-benefit-threshold=60 < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin < %s | FileCheck %s -check-prefix=ALL + +define void @cat() #0 { + ; CHECK-LABEL: _cat: + ; CHECK: sub sp, sp, #32 + ; ALL: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]] + %1 = alloca i32, align 4 + %2 = alloca i32, align 4 + %3 = alloca i32, align 4 + %4 = alloca i32, align 4 + %5 = alloca i32, align 4 + %6 = alloca i32, align 4 + store i32 1, ptr %1, align 4 + store i32 2, ptr %2, align 4 + store i32 3, ptr %3, align 4 + store i32 4, ptr %4, align 4 + store i32 5, ptr %5, align 4 + store i32 6, ptr %6, align 4 + ret void +} + +define void @dog() #0 { + ; CHECK-LABEL: _dog: + ; CHECK: sub sp, sp, #32 + ; ALL: [[OUTLINED]] + %1 = alloca i32, align 4 + %2 = alloca i32, align 4 + %3 = alloca i32, align 4 + %4 = alloca i32, align 4 + %5 = alloca i32, align 4 + %6 = alloca i32, align 4 + store i32 1, ptr %1, align 4 + store i32 2, ptr %2, align 4 + store i32 3, ptr %3, align 4 + store i32 4, ptr %4, align 4 + store i32 5, ptr %5, align 4 + store i32 6, ptr %6, align 4 + ret void +} + +define void @other_cat() #0 { + ; CHECK-LABEL: _other_cat: + ; CHECK: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]] + ; ALL: [[OUTLINED2:OUTLINED_FUNCTION_[0-9]+]] + %1 = alloca i32, align 4 + %2 = alloca i32, align 4 + %3 = alloca i32, align 4 + %4 = alloca i32, align 4 + %5 = alloca i32, align 4 + %6 = alloca i32, align 4 + store i32 1, ptr %1, align 4 + store i32 2, ptr %2, align 4 + store i32 3, ptr %3, align 4 + store i32 4, ptr %4, align 4 + store i32 5, ptr %5, align 4 + store i32 6, ptr %6, align 4 + %7 = alloca i32, align 4 + %8 = alloca i32, align 4 + %9 = alloca i32, align 4 + store i32 7, ptr %7, align 4 + store i32 8, ptr %8, align 4 + store i32 9, ptr %9, align 4 + ret void +} + +define void @other_dog() #0 { + ; CHECK-LABEL: _other_dog: + ; CHECK: [[OUTLINED]] + ; ALL: [[OUTLINED2]] + %1 = alloca i32, align 4 + %2 = alloca i32, align 4 + %3 = alloca i32, align 4 + %4 = alloca i32, align 4 + %5 = alloca i32, align 4 + %6 = alloca i32, align 4 + store i32 1, ptr %1, align 4 + store i32 2, ptr %2, align 4 + store i32 3, ptr %3, align 4 + store i32 4, ptr %4, align 4 + store i32 5, ptr %5, align 4 + store i32 6, ptr %6, align 4 + %7 = alloca i32, align 4 + %8 = alloca i32, align 4 + %9 = alloca i32, align 4 + store i32 7, ptr %7, align 4 + store i32 8, ptr %8, align 4 + store i32 9, ptr %9, align 4 + ret void +} + +; CHECK: .p2align 2 +; CHECK-NEXT: [[OUTLINED]]: +; CHECK: mov w9, #1 +; CHECK-DAG: mov w8, #2 +; CHECK-DAG: stp w8, w9, [sp, #40] +; CHECK-DAG: mov w9, #3 +; CHECK-DAG: mov w8, #4 +; CHECK-DAG: stp w8, w9, [sp, #32] +; CHECK-DAG: mov w9, #5 +; CHECK-DAG: mov w8, #6 +; CHECK-DAG: stp w8, w9, [sp, #24] +; CHECK-DAG: mov w9, #7 +; CHECK-DAG: mov w8, #8 +; CHECK-DAG: stp w8, w9, [sp, #16] +; CHECK-DAG: mov w8, #9 +; CHECK-DAG: str w8, [sp, #12] +; CHECK-DAG: add sp, sp, #48 +; CHECK-DAG: ret + +; ALL-DAG: .p2align 2 +; ALL-DAG: [[OUTLINED]]: + +; ALL-DAG: .p2align 2 +; ALL-DAG: [[OUTLINED2]]: + +attributes #0 = { nounwind noredzone "target-cpu"="cyclone" "target-features"="+sse" }