diff --git a/llvm/include/llvm/IR/IntrinsicsARM.td b/llvm/include/llvm/IR/IntrinsicsARM.td
--- a/llvm/include/llvm/IR/IntrinsicsARM.td
+++ b/llvm/include/llvm/IR/IntrinsicsARM.td
@@ -23,204 +23,263 @@
 
 // 16-bit multiplications
 def int_arm_smulbb : ClangBuiltin<"__builtin_arm_smulbb">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smulbt : ClangBuiltin<"__builtin_arm_smulbt">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smultb : ClangBuiltin<"__builtin_arm_smultb">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smultt : ClangBuiltin<"__builtin_arm_smultt">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smulwb : ClangBuiltin<"__builtin_arm_smulwb">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smulwt : ClangBuiltin<"__builtin_arm_smulwt">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 
 //===----------------------------------------------------------------------===//
 // Saturating Arithmetic
 
 def int_arm_qadd : ClangBuiltin<"__builtin_arm_qadd">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [Commutative, IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [Commutative, IntrNoMem]>;
 def int_arm_qsub : ClangBuiltin<"__builtin_arm_qsub">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_ssat : ClangBuiltin<"__builtin_arm_ssat">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_usat : ClangBuiltin<"__builtin_arm_usat">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 
 // Accumulating multiplications
 def int_arm_smlabb : ClangBuiltin<"__builtin_arm_smlabb">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlabt : ClangBuiltin<"__builtin_arm_smlabt">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlatb : ClangBuiltin<"__builtin_arm_smlatb">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlatt : ClangBuiltin<"__builtin_arm_smlatt">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlawb : ClangBuiltin<"__builtin_arm_smlawb">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlawt : ClangBuiltin<"__builtin_arm_smlawt">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 
 // Parallel 16-bit saturation
 def int_arm_ssat16 : ClangBuiltin<"__builtin_arm_ssat16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_usat16 : ClangBuiltin<"__builtin_arm_usat16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 
 // Packing and unpacking
 def int_arm_sxtab16 : ClangBuiltin<"__builtin_arm_sxtab16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_sxtb16 : ClangBuiltin<"__builtin_arm_sxtb16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
 def int_arm_uxtab16 : ClangBuiltin<"__builtin_arm_uxtab16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uxtb16 : ClangBuiltin<"__builtin_arm_uxtb16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
 
 // Parallel selection, reads the GE flags.
 def int_arm_sel : ClangBuiltin<"__builtin_arm_sel">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrReadMem]>;
 
 // Parallel 8-bit addition and subtraction
 def int_arm_qadd8  : ClangBuiltin<"__builtin_arm_qadd8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_qsub8  : ClangBuiltin<"__builtin_arm_qsub8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 // Writes to the GE bits.
 def int_arm_sadd8  : ClangBuiltin<"__builtin_arm_sadd8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 def int_arm_shadd8  : ClangBuiltin<"__builtin_arm_shadd8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_shsub8  : ClangBuiltin<"__builtin_arm_shsub8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 // Writes to the GE bits.
 def int_arm_ssub8  : ClangBuiltin<"__builtin_arm_ssub8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 // Writes to the GE bits.
 def int_arm_uadd8  : ClangBuiltin<"__builtin_arm_uadd8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 def int_arm_uhadd8  : ClangBuiltin<"__builtin_arm_uhadd8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uhsub8  : ClangBuiltin<"__builtin_arm_uhsub8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uqadd8  : ClangBuiltin<"__builtin_arm_uqadd8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uqsub8  : ClangBuiltin<"__builtin_arm_uqsub8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 // Writes to the GE bits.
 def int_arm_usub8  : ClangBuiltin<"__builtin_arm_usub8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 
 // Sum of 8-bit absolute differences
 def int_arm_usad8  : ClangBuiltin<"__builtin_arm_usad8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_usada8  : ClangBuiltin<"__builtin_arm_usada8">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 
 // Parallel 16-bit addition and subtraction
 def int_arm_qadd16  : ClangBuiltin<"__builtin_arm_qadd16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_qasx  : ClangBuiltin<"__builtin_arm_qasx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_qsax  : ClangBuiltin<"__builtin_arm_qsax">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_qsub16  : ClangBuiltin<"__builtin_arm_qsub16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 // Writes to the GE bits.
 def int_arm_sadd16  : ClangBuiltin<"__builtin_arm_sadd16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 // Writes to the GE bits.
 def int_arm_sasx  : ClangBuiltin<"__builtin_arm_sasx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 def int_arm_shadd16  : ClangBuiltin<"__builtin_arm_shadd16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_shasx  : ClangBuiltin<"__builtin_arm_shasx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_shsax  : ClangBuiltin<"__builtin_arm_shsax">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_shsub16  : ClangBuiltin<"__builtin_arm_shsub16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 // Writes to the GE bits.
 def int_arm_ssax  : ClangBuiltin<"__builtin_arm_ssax">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 // Writes to the GE bits.
 def int_arm_ssub16  : ClangBuiltin<"__builtin_arm_ssub16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 // Writes to the GE bits.
 def int_arm_uadd16  : ClangBuiltin<"__builtin_arm_uadd16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 // Writes to the GE bits.
 def int_arm_uasx  : ClangBuiltin<"__builtin_arm_uasx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 def int_arm_uhadd16  : ClangBuiltin<"__builtin_arm_uhadd16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uhasx  : ClangBuiltin<"__builtin_arm_uhasx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uhsax  : ClangBuiltin<"__builtin_arm_uhsax">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uhsub16  : ClangBuiltin<"__builtin_arm_uhsub16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uqadd16  : ClangBuiltin<"__builtin_arm_uqadd16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uqasx  : ClangBuiltin<"__builtin_arm_uqasx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uqsax  : ClangBuiltin<"__builtin_arm_uqsax">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_uqsub16  : ClangBuiltin<"__builtin_arm_uqsub16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 // Writes to the GE bits.
 def int_arm_usax  : ClangBuiltin<"__builtin_arm_usax">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 // Writes to the GE bits.
 def int_arm_usub16  : ClangBuiltin<"__builtin_arm_usub16">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 
 // Parallel 16-bit multiplication
 def int_arm_smlad : ClangBuiltin<"__builtin_arm_smlad">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smladx : ClangBuiltin<"__builtin_arm_smladx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlald : ClangBuiltin<"__builtin_arm_smlald">,
-    Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i64_ty],
+                          [IntrNoMem]>;
 def int_arm_smlaldx : ClangBuiltin<"__builtin_arm_smlaldx">,
-    Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i64_ty],
+                          [IntrNoMem]>;
 def int_arm_smlsd : ClangBuiltin<"__builtin_arm_smlsd">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlsdx : ClangBuiltin<"__builtin_arm_smlsdx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smlsld : ClangBuiltin<"__builtin_arm_smlsld">,
-    Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i64_ty],
+                          [IntrNoMem]>;
 def int_arm_smlsldx : ClangBuiltin<"__builtin_arm_smlsldx">,
-    Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
-              [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty,
+                           llvm_i64_ty],
+                          [IntrNoMem]>;
 def int_arm_smuad : ClangBuiltin<"__builtin_arm_smuad">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smuadx : ClangBuiltin<"__builtin_arm_smuadx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smusd : ClangBuiltin<"__builtin_arm_smusd">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 def int_arm_smusdx : ClangBuiltin<"__builtin_arm_smusdx">,
-    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+    DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 
 
 //===----------------------------------------------------------------------===//
 // Load, Store and Clear exclusive
 
+// TODO: Add applicable default attributes.
 def int_arm_ldrex : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>;
 def int_arm_strex : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_anyptr_ty]>;
 
@@ -239,6 +298,8 @@
 
 //===----------------------------------------------------------------------===//
 // Data barrier instructions
+
+// TODO: Add applicable default attributes.
 def int_arm_dmb : ClangBuiltin<"__builtin_arm_dmb">, MSBuiltin<"__dmb">,
                   Intrinsic<[], [llvm_i32_ty]>;
 def int_arm_dsb : ClangBuiltin<"__builtin_arm_dsb">, MSBuiltin<"__dsb">,
@@ -250,17 +311,18 @@
 // VFP
 
 def int_arm_get_fpscr : ClangBuiltin<"__builtin_arm_get_fpscr">,
-                       Intrinsic<[llvm_i32_ty], [], []>;
+                       DefaultAttrsIntrinsic<[llvm_i32_ty], [], []>;
 def int_arm_set_fpscr : ClangBuiltin<"__builtin_arm_set_fpscr">,
-                       Intrinsic<[], [llvm_i32_ty], []>;
-def int_arm_vcvtr     : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
-                                  [IntrNoMem]>;
-def int_arm_vcvtru    : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
-                                  [IntrNoMem]>;
+                       DefaultAttrsIntrinsic<[], [llvm_i32_ty], []>;
+def int_arm_vcvtr : DefaultAttrsIntrinsic<[llvm_float_ty],
+                                          [llvm_anyfloat_ty], [IntrNoMem]>;
+def int_arm_vcvtru : DefaultAttrsIntrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
+                                           [IntrNoMem]>;
 
 //===----------------------------------------------------------------------===//
 // Coprocessor
 
+// TODO: Add applicable default attributes.
 def int_arm_ldc : ClangBuiltin<"__builtin_arm_ldc">,
    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
 def int_arm_ldcl : ClangBuiltin<"__builtin_arm_ldcl">,
@@ -319,22 +381,23 @@
 //===----------------------------------------------------------------------===//
 // CRC32
 
-def int_arm_crc32b  : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
-def int_arm_crc32cb : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
-def int_arm_crc32h  : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
-def int_arm_crc32ch : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
-def int_arm_crc32w  : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
-def int_arm_crc32cw : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
-    [IntrNoMem]>;
+def int_arm_crc32b : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_arm_crc32cb : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_arm_crc32h  : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_arm_crc32ch : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_arm_crc32w  : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_arm_crc32cw : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 
 //===----------------------------------------------------------------------===//
 // CMSE
 
+// TODO: Add applicable default attributes.
 def int_arm_cmse_tt : ClangBuiltin<"__builtin_arm_cmse_TT">,
     Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
 def int_arm_cmse_ttt : ClangBuiltin<"__builtin_arm_cmse_TTT">,
@@ -347,12 +410,14 @@
 //===----------------------------------------------------------------------===//
 // HINT
 
+// TODO: Add applicable default attributes.
 def int_arm_hint : Intrinsic<[], [llvm_i32_ty]>;
 def int_arm_dbg : Intrinsic<[], [llvm_i32_ty]>;
 
 //===----------------------------------------------------------------------===//
 // UND (reserved undefined sequence)
 
+// TODO: Add applicable default attributes.
 def int_arm_undefined : Intrinsic<[], [llvm_i32_ty]>;
 
 //===----------------------------------------------------------------------===//
@@ -360,62 +425,74 @@
 
 // The following classes do not correspond directly to GCC builtins.
 class Neon_1Arg_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
 class Neon_1Arg_Narrow_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>],
+                          [IntrNoMem]>;
 class Neon_2Arg_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
 class Neon_2Arg_Narrow_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>, LLVMExtendedType<0>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMExtendedType<0>, LLVMExtendedType<0>],
+                          [IntrNoMem]>;
 class Neon_2Arg_Long_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [LLVMTruncatedType<0>, LLVMTruncatedType<0>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMTruncatedType<0>, LLVMTruncatedType<0>],
+                          [IntrNoMem]>;
 class Neon_3Arg_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty],
-              [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMMatchType<0>, LLVMMatchType<0>,
+                           LLVMMatchType<0>],
+                          [IntrNoMem]>;
 class Neon_3Arg_Long_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty],
-              [LLVMMatchType<0>, LLVMTruncatedType<0>, LLVMTruncatedType<0>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMMatchType<0>, LLVMTruncatedType<0>,
+                           LLVMTruncatedType<0>],
+                          [IntrNoMem]>;
 
 class Neon_1FloatArg_Intrinsic
-  : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
 
 class Neon_CvtFxToFP_Intrinsic
-  : Intrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 class Neon_CvtFPToFx_Intrinsic
-  : Intrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty, llvm_i32_ty],
+                          [IntrNoMem]>;
 class Neon_CvtFPtoInt_1Arg_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty],
+                          [IntrNoMem]>;
 
 class Neon_Compare_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, LLVMMatchType<1>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [llvm_anyvector_ty, LLVMMatchType<1>], [IntrNoMem]>;
 
 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
 // Overall, the classes range from 2 to 6 v8i8 arguments.
 class Neon_Tbl2Arg_Intrinsic
-  : Intrinsic<[llvm_v8i8_ty],
-              [llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_v8i8_ty],
+                          [llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 class Neon_Tbl3Arg_Intrinsic
-  : Intrinsic<[llvm_v8i8_ty],
-              [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_v8i8_ty],
+                          [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty],
+                          [IntrNoMem]>;
 class Neon_Tbl4Arg_Intrinsic
-  : Intrinsic<[llvm_v8i8_ty],
-              [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_v8i8_ty],
+                          [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
+                           llvm_v8i8_ty],
+                          [IntrNoMem]>;
 class Neon_Tbl5Arg_Intrinsic
-  : Intrinsic<[llvm_v8i8_ty],
-              [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
-               llvm_v8i8_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_v8i8_ty],
+                          [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
+                           llvm_v8i8_ty, llvm_v8i8_ty],
+                          [IntrNoMem]>;
 class Neon_Tbl6Arg_Intrinsic
-  : Intrinsic<[llvm_v8i8_ty],
-              [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
-               llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_v8i8_ty],
+                          [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
+                           llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty],
+                          [IntrNoMem]>;
 
 // Arithmetic ops
 
@@ -474,20 +551,18 @@
 // Note: This is different than the other "long" NEON intrinsics because
 // the result vector has half as many elements as the source vector.
 // The source and destination vector types must be specified separately.
-def int_arm_neon_vpaddls : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty],
-                                     [IntrNoMem]>;
-def int_arm_neon_vpaddlu : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty],
-                                     [IntrNoMem]>;
+def int_arm_neon_vpaddls : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
+def int_arm_neon_vpaddlu : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
 
 // Vector Pairwise Add and Accumulate Long.
 // Note: This is similar to vpaddl but the destination vector also appears
 // as the first argument.
-def int_arm_neon_vpadals : Intrinsic<[llvm_anyvector_ty],
-                                     [LLVMMatchType<0>, llvm_anyvector_ty],
-                                     [IntrNoMem]>;
-def int_arm_neon_vpadalu : Intrinsic<[llvm_anyvector_ty],
-                                     [LLVMMatchType<0>, llvm_anyvector_ty],
-                                     [IntrNoMem]>;
+def int_arm_neon_vpadals : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty], [LLVMMatchType<0>, llvm_anyvector_ty], [IntrNoMem]>;
+def int_arm_neon_vpadalu : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty], [LLVMMatchType<0>, llvm_anyvector_ty], [IntrNoMem]>;
 
 // Vector Pairwise Maximum and Minimum.
 def int_arm_neon_vpmaxs : Neon_2Arg_Intrinsic;
@@ -577,9 +652,9 @@
 
 // Vector Conversions Between Half-Precision and Single-Precision.
 def int_arm_neon_vcvtfp2hf
-    : Intrinsic<[llvm_v4i16_ty], [llvm_v4f32_ty], [IntrNoMem]>;
+    : DefaultAttrsIntrinsic<[llvm_v4i16_ty], [llvm_v4f32_ty], [IntrNoMem]>;
 def int_arm_neon_vcvthf2fp
-    : Intrinsic<[llvm_v4f32_ty], [llvm_v4i16_ty], [IntrNoMem]>;
+    : DefaultAttrsIntrinsic<[llvm_v4f32_ty], [llvm_v4i16_ty], [IntrNoMem]>;
 
 // Narrowing Saturating Vector Moves.
 def int_arm_neon_vqmovns : Neon_1Arg_Narrow_Intrinsic;
@@ -612,142 +687,129 @@
 
 // De-interleaving vector loads from N-element structures.
 // Source operands are the address and alignment.
-def int_arm_neon_vld1 : Intrinsic<[llvm_anyvector_ty],
-                                  [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
-                                  [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                   LLVMMatchType<0>],
-                                  [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                   LLVMMatchType<0>, LLVMMatchType<0>],
-                                  [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadMem, IntrArgMemOnly]>;
-
-def int_arm_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
-                                    [LLVMAnyPointerType<LLVMMatchType<0>>],
-                                    [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                     LLVMMatchType<0>],
-                                    [LLVMAnyPointerType<LLVMMatchType<0>>],
-                                    [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                     LLVMMatchType<0>, LLVMMatchType<0>],
-                                    [LLVMAnyPointerType<LLVMMatchType<0>>],
-                                    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld1 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty], [llvm_anyptr_ty, llvm_i32_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld2 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>], [llvm_anyptr_ty, llvm_i32_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld3 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld4 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
+
+def int_arm_neon_vld1x2 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>],
+    [LLVMAnyPointerType<LLVMMatchType<0>>], [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld1x3 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
+    [LLVMAnyPointerType<LLVMMatchType<0>>], [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld1x4 : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+    [LLVMAnyPointerType<LLVMMatchType<0>>], [IntrReadMem, IntrArgMemOnly]>;
 
 // Vector load N-element structure to one lane.
 // Source operands are: the address, the N input vectors (since only one
 // lane is assigned), the lane number, and the alignment.
-def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
-                                      [llvm_anyptr_ty, LLVMMatchType<0>,
-                                       LLVMMatchType<0>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                       LLVMMatchType<0>],
-                                      [llvm_anyptr_ty, LLVMMatchType<0>,
-                                       LLVMMatchType<0>, LLVMMatchType<0>,
-                                       llvm_i32_ty, llvm_i32_ty],
-                                      [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                       LLVMMatchType<0>, LLVMMatchType<0>],
-                                      [llvm_anyptr_ty, LLVMMatchType<0>,
-                                       LLVMMatchType<0>, LLVMMatchType<0>,
-                                       LLVMMatchType<0>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld2lane : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>],
+    [llvm_anyptr_ty, LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty,
+     llvm_i32_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld3lane : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
+     llvm_i32_ty, llvm_i32_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld4lane : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
+     LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
 
 // Vector load N-element structure to all lanes.
 // Source operands are the address and alignment.
-def int_arm_neon_vld2dup : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
-                                     [llvm_anyptr_ty, llvm_i32_ty],
-                                     [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld3dup : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                      LLVMMatchType<0>],
-                                     [llvm_anyptr_ty, llvm_i32_ty],
-                                     [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_neon_vld4dup : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
-                                      LLVMMatchType<0>, LLVMMatchType<0>],
-                                     [llvm_anyptr_ty, llvm_i32_ty],
-                                     [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld2dup : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>], [llvm_anyptr_ty, llvm_i32_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld3dup : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_neon_vld4dup : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 
 // Interleaving vector stores from N-element structures.
 // Source operands are: the address, the N vectors, and the alignment.
-def int_arm_neon_vst1 : Intrinsic<[],
-                                  [llvm_anyptr_ty, llvm_anyvector_ty,
-                                   llvm_i32_ty], [IntrArgMemOnly]>;
-def int_arm_neon_vst2 : Intrinsic<[],
-                                  [llvm_anyptr_ty, llvm_anyvector_ty,
-                                   LLVMMatchType<1>, llvm_i32_ty],
-                                  [IntrArgMemOnly]>;
-def int_arm_neon_vst3 : Intrinsic<[],
-                                  [llvm_anyptr_ty, llvm_anyvector_ty,
-                                   LLVMMatchType<1>, LLVMMatchType<1>,
-                                   llvm_i32_ty], [IntrArgMemOnly]>;
-def int_arm_neon_vst4 : Intrinsic<[],
-                                  [llvm_anyptr_ty, llvm_anyvector_ty,
-                                   LLVMMatchType<1>, LLVMMatchType<1>,
-                                   LLVMMatchType<1>, llvm_i32_ty],
-                                  [IntrArgMemOnly]>;
-
-def int_arm_neon_vst1x2 : Intrinsic<[],
-                                    [llvm_anyptr_ty, llvm_anyvector_ty,
-                                     LLVMMatchType<1>],
-                                    [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
-def int_arm_neon_vst1x3 : Intrinsic<[],
-                                    [llvm_anyptr_ty, llvm_anyvector_ty,
-                                     LLVMMatchType<1>, LLVMMatchType<1>],
-                                    [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
-def int_arm_neon_vst1x4 : Intrinsic<[],
-                                    [llvm_anyptr_ty, llvm_anyvector_ty,
-                                     LLVMMatchType<1>, LLVMMatchType<1>,
-                                     LLVMMatchType<1>],
-                                    [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
+def int_arm_neon_vst1 : DefaultAttrsIntrinsic<
+    [], [llvm_anyptr_ty, llvm_anyvector_ty, llvm_i32_ty], [IntrArgMemOnly]>;
+def int_arm_neon_vst2 : DefaultAttrsIntrinsic<
+    [], [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty],
+    [IntrArgMemOnly]>;
+def int_arm_neon_vst3 : DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
+     llvm_i32_ty],
+    [IntrArgMemOnly]>;
+def int_arm_neon_vst4 : DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
+     LLVMMatchType<1>, llvm_i32_ty],
+    [IntrArgMemOnly]>;
+
+def int_arm_neon_vst1x2 : DefaultAttrsIntrinsic<
+    [], [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>],
+    [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
+def int_arm_neon_vst1x3 : DefaultAttrsIntrinsic<
+    [], [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>],
+    [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
+def int_arm_neon_vst1x4 : DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
+     LLVMMatchType<1>],
+    [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
 
 // Vector store N-element structure from one lane.
 // Source operands are: the address, the N vectors, the lane number, and
 // the alignment.
-def int_arm_neon_vst2lane : Intrinsic<[],
-                                      [llvm_anyptr_ty, llvm_anyvector_ty,
-                                       LLVMMatchType<1>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrArgMemOnly]>;
-def int_arm_neon_vst3lane : Intrinsic<[],
-                                      [llvm_anyptr_ty, llvm_anyvector_ty,
-                                       LLVMMatchType<1>, LLVMMatchType<1>,
-                                       llvm_i32_ty, llvm_i32_ty],
-                                      [IntrArgMemOnly]>;
-def int_arm_neon_vst4lane : Intrinsic<[],
-                                      [llvm_anyptr_ty, llvm_anyvector_ty,
-                                       LLVMMatchType<1>, LLVMMatchType<1>,
-                                       LLVMMatchType<1>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrArgMemOnly]>;
+def int_arm_neon_vst2lane : DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty,
+     llvm_i32_ty],
+    [IntrArgMemOnly]>;
+def int_arm_neon_vst3lane : DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
+     llvm_i32_ty, llvm_i32_ty],
+    [IntrArgMemOnly]>;
+def int_arm_neon_vst4lane : DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
+     LLVMMatchType<1>, llvm_i32_ty, llvm_i32_ty],
+    [IntrArgMemOnly]>;
 
 // Vector bitwise select.
-def int_arm_neon_vbsl : Intrinsic<[llvm_anyvector_ty],
-                        [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
-                        [IntrNoMem]>;
+def int_arm_neon_vbsl : DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+    [IntrNoMem]>;
 
 
 // Crypto instructions
-class AES_1Arg_Intrinsic : Intrinsic<[llvm_v16i8_ty],
-                                     [llvm_v16i8_ty], [IntrNoMem]>;
-class AES_2Arg_Intrinsic : Intrinsic<[llvm_v16i8_ty],
-                                     [llvm_v16i8_ty, llvm_v16i8_ty],
-                                     [IntrNoMem]>;
-
-class SHA_1Arg_Intrinsic : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-                                     [IntrNoMem]>;
-class SHA_2Arg_Intrinsic : Intrinsic<[llvm_v4i32_ty],
-                                     [llvm_v4i32_ty, llvm_v4i32_ty],
-                                     [IntrNoMem]>;
-class SHA_3Arg_i32_Intrinsic : Intrinsic<[llvm_v4i32_ty],
-                                   [llvm_v4i32_ty, llvm_i32_ty, llvm_v4i32_ty],
-                                   [IntrNoMem]>;
-class SHA_3Arg_v4i32_Intrinsic : Intrinsic<[llvm_v4i32_ty],
-                                   [llvm_v4i32_ty, llvm_v4i32_ty,llvm_v4i32_ty],
-                                   [IntrNoMem]>;
+class AES_1Arg_Intrinsic : DefaultAttrsIntrinsic<
+    [llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+class AES_2Arg_Intrinsic : DefaultAttrsIntrinsic<
+    [llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
+
+class SHA_1Arg_Intrinsic : DefaultAttrsIntrinsic<
+    [llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
+class SHA_2Arg_Intrinsic : DefaultAttrsIntrinsic<
+    [llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
+class SHA_3Arg_i32_Intrinsic : DefaultAttrsIntrinsic<
+    [llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
+class SHA_3Arg_v4i32_Intrinsic : DefaultAttrsIntrinsic<
+    [llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty,llvm_v4i32_ty], [IntrNoMem]>;
 
 def int_arm_neon_aesd : AES_2Arg_Intrinsic;
 def int_arm_neon_aese : AES_2Arg_Intrinsic;
@@ -769,19 +831,19 @@
 
 // Armv8.2-A dot product instructions
 class Neon_Dot_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty],
-              [LLVMMatchType<0>, llvm_anyvector_ty,
-               LLVMMatchType<1>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMMatchType<0>, llvm_anyvector_ty,
+                           LLVMMatchType<1>],
+                          [IntrNoMem]>;
 def int_arm_neon_udot : Neon_Dot_Intrinsic;
 def int_arm_neon_sdot : Neon_Dot_Intrinsic;
 
 // v8.6-A Matrix Multiply Intrinsics
 class Neon_MatMul_Intrinsic
-  : Intrinsic<[llvm_anyvector_ty],
-              [LLVMMatchType<0>, llvm_anyvector_ty,
-               LLVMMatchType<1>],
-              [IntrNoMem]>;
+  : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+                          [LLVMMatchType<0>, llvm_anyvector_ty,
+                           LLVMMatchType<1>],
+                          [IntrNoMem]>;
 def int_arm_neon_ummla  : Neon_MatMul_Intrinsic;
 def int_arm_neon_smmla  : Neon_MatMul_Intrinsic;
 def int_arm_neon_usmmla : Neon_MatMul_Intrinsic;
@@ -789,127 +851,134 @@
 
 // v8.6-A Bfloat Intrinsics
 def int_arm_neon_vcvtfp2bf
-    : Intrinsic<[llvm_anyvector_ty], [llvm_v4f32_ty], [IntrNoMem]>;
+    : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [llvm_v4f32_ty], [IntrNoMem]>;
 def int_arm_neon_vcvtbfp2bf
-    : Intrinsic<[llvm_bfloat_ty], [llvm_float_ty], [IntrNoMem]>;
+    : DefaultAttrsIntrinsic<[llvm_bfloat_ty], [llvm_float_ty], [IntrNoMem]>;
 
 def int_arm_neon_bfdot : Neon_Dot_Intrinsic;
 def int_arm_neon_bfmmla
-    : Intrinsic<[llvm_v4f32_ty],
-                [llvm_v4f32_ty, llvm_v8bf16_ty, llvm_v8bf16_ty],
-                [IntrNoMem]>;
+    : DefaultAttrsIntrinsic<[llvm_v4f32_ty],
+                            [llvm_v4f32_ty, llvm_v8bf16_ty, llvm_v8bf16_ty],
+                            [IntrNoMem]>;
 
 class Neon_BF16FML_Intrinsic
-    : Intrinsic<[llvm_v4f32_ty],
-                [llvm_v4f32_ty, llvm_v8bf16_ty, llvm_v8bf16_ty],
-                [IntrNoMem]>;
+    : DefaultAttrsIntrinsic<[llvm_v4f32_ty],
+                            [llvm_v4f32_ty, llvm_v8bf16_ty, llvm_v8bf16_ty],
+                            [IntrNoMem]>;
 def int_arm_neon_bfmlalb : Neon_BF16FML_Intrinsic;
 def int_arm_neon_bfmlalt : Neon_BF16FML_Intrinsic;
 
-def int_arm_cls: Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
-def int_arm_cls64: Intrinsic<[llvm_i32_ty], [llvm_i64_ty], [IntrNoMem]>;
+def int_arm_cls: DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty],
+                                       [IntrNoMem]>;
+def int_arm_cls64: DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i64_ty],
+                                         [IntrNoMem]>;
 
-def int_arm_mve_vctp8  : Intrinsic<[llvm_v16i1_ty], [llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_vctp16 : Intrinsic<[llvm_v8i1_ty], [llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_vctp32 : Intrinsic<[llvm_v4i1_ty], [llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_vctp64 : Intrinsic<[llvm_v2i1_ty], [llvm_i32_ty], [IntrNoMem]>;
+def int_arm_mve_vctp8  : DefaultAttrsIntrinsic<[llvm_v16i1_ty], [llvm_i32_ty],
+                                               [IntrNoMem]>;
+def int_arm_mve_vctp16 : DefaultAttrsIntrinsic<[llvm_v8i1_ty], [llvm_i32_ty],
+                                               [IntrNoMem]>;
+def int_arm_mve_vctp32 : DefaultAttrsIntrinsic<[llvm_v4i1_ty], [llvm_i32_ty],
+                                               [IntrNoMem]>;
+def int_arm_mve_vctp64 : DefaultAttrsIntrinsic<[llvm_v2i1_ty], [llvm_i32_ty],
+                                               [IntrNoMem]>;
 
 // v8.3-A Floating-point complex add
 def int_arm_neon_vcadd_rot90  : Neon_2Arg_Intrinsic;
 def int_arm_neon_vcadd_rot270 : Neon_2Arg_Intrinsic;
 
 // GNU eabi mcount
+// TODO: Add applicable default attributes.
 def int_arm_gnu_eabi_mcount : Intrinsic<[], [], []>;
 
-def int_arm_mve_pred_i2v : Intrinsic<
+def int_arm_mve_pred_i2v : DefaultAttrsIntrinsic<
   [llvm_anyvector_ty], [llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_pred_v2i : Intrinsic<
+def int_arm_mve_pred_v2i : DefaultAttrsIntrinsic<
   [llvm_i32_ty], [llvm_anyvector_ty], [IntrNoMem]>;
-def int_arm_mve_vreinterpretq : Intrinsic<
+def int_arm_mve_vreinterpretq : DefaultAttrsIntrinsic<
   [llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
 
-def int_arm_mve_min_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_min_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_max_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_max_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_abd_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_abd_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_add_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_add_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_and_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_and_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_bic_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_bic_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_eor_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_eor_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_orn_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_orn_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_orr_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_orr_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_sub_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_sub_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_mul_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_mul_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_mulh_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_mulh_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_qdmulh_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_qdmulh_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_rmulh_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_rmulh_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_qrdmulh_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_qrdmulh_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_mull_int_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_mull_int_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty /* unsigned */,
     llvm_i32_ty /* top */, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_mull_poly_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_mull_poly_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty, llvm_anyvector_ty,
     LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_qadd_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_qadd_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_hadd_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_hadd_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_rhadd_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_rhadd_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_qsub_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_qsub_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_hsub_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_hsub_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_vmina_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmina_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty],
     [IntrNoMem]>;
-def int_arm_mve_vmaxa_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmaxa_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty],
     [IntrNoMem]>;
-def int_arm_mve_vminnma_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vminnma_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty],
     [IntrNoMem]>;
-def int_arm_mve_vmaxnma_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmaxnma_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty],
     [IntrNoMem]>;
 
@@ -917,14 +986,15 @@
                          LLVMType pred = llvm_anyvector_ty,
                          list<IntrinsicProperty> props = [IntrNoMem],
                          list<SDNodeProperty> sdprops = []> {
-  def "": Intrinsic<rets, params, props, "", sdprops>;
-  def _predicated: Intrinsic<rets, params # [pred], props, "", sdprops>;
+  def "": DefaultAttrsIntrinsic<rets, params, props, "", sdprops>;
+  def _predicated: DefaultAttrsIntrinsic<rets, params # [pred], props, "",
+                                         sdprops>;
 }
 multiclass MVEPredicatedM<list<LLVMType> rets, list<LLVMType> params,
                           LLVMType pred = llvm_anyvector_ty,
                           list<IntrinsicProperty> props = [IntrNoMem]> {
-  def "": Intrinsic<rets, params, props>;
-  def _predicated: Intrinsic<rets, params # [pred,
+  def "": DefaultAttrsIntrinsic<rets, params, props>;
+  def _predicated: DefaultAttrsIntrinsic<rets, params # [pred,
       !if(!eq(rets[0], llvm_anyvector_ty),
           LLVMMatchType<0>, rets[0])], props>;
 }
@@ -954,9 +1024,9 @@
                            list<LLVMType> params, LLVMType inactive,
                            LLVMType predicate,
                            list<IntrinsicProperty> props = [IntrNoMem]> {
-  def "":          Intrinsic<rets, flags # params, props>;
-  def _predicated: Intrinsic<rets, flags # [inactive] # params # [predicate],
-                             props>;
+  def "":          DefaultAttrsIntrinsic<rets, flags # params, props>;
+  def _predicated: DefaultAttrsIntrinsic<
+      rets, flags # [inactive] # params # [predicate], props>;
 }
 
 defm int_arm_mve_vcvt_narrow: MVEPredicated<[llvm_v8f16_ty],
@@ -996,10 +1066,10 @@
    llvm_i32_ty, llvm_i32_ty], llvm_anyvector_ty, [IntrWriteMem],
    [SDNPMemOperand]>;
 
-def int_arm_mve_shl_imm_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_shl_imm_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_i32_ty, llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
-def int_arm_mve_shr_imm_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_shr_imm_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty, // extra i32 is unsigned flag
     llvm_anyvector_ty, LLVMMatchType<0>],
    [IntrNoMem]>;
@@ -1035,7 +1105,7 @@
 // MVE scalar shifts.
 class ARM_MVE_qrshift_single<list<LLVMType> value,
                              list<LLVMType> saturate = []> :
-  Intrinsic<value, value # [llvm_i32_ty] # saturate, [IntrNoMem]>;
+  DefaultAttrsIntrinsic<value, value # [llvm_i32_ty] # saturate, [IntrNoMem]>;
 multiclass ARM_MVE_qrshift<list<LLVMType> saturate = []> {
   // Most of these shifts come in 32- and 64-bit versions. But only
   // the 64-bit ones have the extra saturation argument (if any).
@@ -1052,63 +1122,63 @@
 def int_arm_mve_lsll: ARM_MVE_qrshift_single<[llvm_i32_ty, llvm_i32_ty]>;
 def int_arm_mve_asrl: ARM_MVE_qrshift_single<[llvm_i32_ty, llvm_i32_ty]>;
 
-def int_arm_mve_vabd: Intrinsic<
+def int_arm_mve_vabd: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */],
    [IntrNoMem]>;
-def int_arm_mve_vadc: Intrinsic<
+def int_arm_mve_vadc: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty, llvm_i32_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_vsbc: Intrinsic<
+def int_arm_mve_vsbc: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty, llvm_i32_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_vadc_predicated: Intrinsic<
+def int_arm_mve_vadc_predicated: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty, llvm_i32_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
     llvm_i32_ty, llvm_anyvector_ty], [IntrNoMem]>;
-def int_arm_mve_vsbc_predicated: Intrinsic<
+def int_arm_mve_vsbc_predicated: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty, llvm_i32_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
     llvm_i32_ty, llvm_anyvector_ty], [IntrNoMem]>;
-def int_arm_mve_vshlc: Intrinsic<
+def int_arm_mve_vshlc: DefaultAttrsIntrinsic<
    [llvm_i32_ty /* bits shifted out */, llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_i32_ty /* bits shifted in */,
     llvm_i32_ty /* shift count */], [IntrNoMem]>;
-def int_arm_mve_vshlc_predicated: Intrinsic<
+def int_arm_mve_vshlc_predicated: DefaultAttrsIntrinsic<
    [llvm_i32_ty /* bits shifted out */, llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_i32_ty /* bits shifted in */,
     llvm_i32_ty /* shift count */, llvm_anyvector_ty], [IntrNoMem]>;
-def int_arm_mve_vmulh: Intrinsic<
+def int_arm_mve_vmulh: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */],
    [IntrNoMem]>;
-def int_arm_mve_vqdmulh: Intrinsic<
+def int_arm_mve_vqdmulh: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_vhadd: Intrinsic<
+def int_arm_mve_vhadd: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */],
    [IntrNoMem]>;
-def int_arm_mve_vrhadd: Intrinsic<
+def int_arm_mve_vrhadd: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */],
    [IntrNoMem]>;
-def int_arm_mve_vhsub: Intrinsic<
+def int_arm_mve_vhsub: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */],
    [IntrNoMem]>;
-def int_arm_mve_vrmulh: Intrinsic<
+def int_arm_mve_vrmulh: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty /* unsigned */],
    [IntrNoMem]>;
-def int_arm_mve_vqrdmulh: Intrinsic<
+def int_arm_mve_vqrdmulh: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_vmull: Intrinsic<
+def int_arm_mve_vmull: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty /* unsigned */,
     llvm_i32_ty /* top */], [IntrNoMem]>;
-def int_arm_mve_vmull_poly: Intrinsic<
+def int_arm_mve_vmull_poly: DefaultAttrsIntrinsic<
    [llvm_anyvector_ty],
    [llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty], [IntrNoMem]>;
 
@@ -1138,15 +1208,21 @@
   [llvm_i32_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
    llvm_anyvector_ty>;
 
-def int_arm_mve_vld2q: Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], [llvm_anyptr_ty],
-                                 [IntrReadMem, IntrArgMemOnly]>;
-def int_arm_mve_vld4q: Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [llvm_anyptr_ty],
-                                 [IntrReadMem, IntrArgMemOnly]>;
-
-def int_arm_mve_vst2q: Intrinsic<[], [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty],
-                                 [IntrWriteMem, IntrArgMemOnly], "", [SDNPMemOperand]>;
-def int_arm_mve_vst4q: Intrinsic<[], [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>, LLVMMatchType<1>, llvm_i32_ty],
-                                 [IntrWriteMem, IntrArgMemOnly], "", [SDNPMemOperand]>;
+def int_arm_mve_vld2q: DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>], [llvm_anyptr_ty],
+    [IntrReadMem, IntrArgMemOnly]>;
+def int_arm_mve_vld4q: DefaultAttrsIntrinsic<
+    [llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+    [llvm_anyptr_ty], [IntrReadMem, IntrArgMemOnly]>;
+
+def int_arm_mve_vst2q: DefaultAttrsIntrinsic<
+    [], [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty],
+    [IntrWriteMem, IntrArgMemOnly], "", [SDNPMemOperand]>;
+def int_arm_mve_vst4q: DefaultAttrsIntrinsic<
+    [],
+    [llvm_anyptr_ty, llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
+     LLVMMatchType<1>, llvm_i32_ty],
+    [IntrWriteMem, IntrArgMemOnly], "", [SDNPMemOperand]>;
 
 // MVE vector absolute difference and accumulate across vector
 // The first operand is an 'unsigned' flag. The remaining operands are:
@@ -1219,7 +1295,7 @@
   [llvm_anyvector_ty /* input vector */, llvm_i32_ty /* scale */],
   LLVMMatchType<0>, llvm_anyvector_ty>;
 
-def int_arm_mve_vcvt_fp_int_predicated: Intrinsic<
+def int_arm_mve_vcvt_fp_int_predicated: DefaultAttrsIntrinsic<
   [llvm_anyvector_ty], [llvm_anyvector_ty, llvm_i32_ty /* unsigned */,
    llvm_anyvector_ty /* predicate */, LLVMMatchType<0> /* inactive */],
   [IntrNoMem]>;
@@ -1230,26 +1306,26 @@
     [llvm_anyvector_ty /* input */], LLVMMatchType<0>, llvm_anyvector_ty>;
 }
 
-def int_arm_mve_vrintn: Intrinsic<
+def int_arm_mve_vrintn: DefaultAttrsIntrinsic<
   [llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_vcls: Intrinsic<
+def int_arm_mve_vcls: DefaultAttrsIntrinsic<
   [llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
 
 defm int_arm_mve_vbrsr: MVEMXPredicated<
   [llvm_anyvector_ty], [],
   [LLVMMatchType<0>, llvm_i32_ty], LLVMMatchType<0>, llvm_anyvector_ty>;
 
-def int_arm_mve_vqdmull: Intrinsic<
+def int_arm_mve_vqdmull: DefaultAttrsIntrinsic<
   [llvm_anyvector_ty],
   [llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty],
   [IntrNoMem]>;
-def int_arm_mve_vqdmull_predicated: Intrinsic<
+def int_arm_mve_vqdmull_predicated: DefaultAttrsIntrinsic<
   [llvm_anyvector_ty],
   [llvm_anyvector_ty, LLVMMatchType<1>, llvm_i32_ty, llvm_anyvector_ty,
    LLVMMatchType<0>],
   [IntrNoMem]>;
 
-class MVESimpleUnaryPredicated: Intrinsic<[llvm_anyvector_ty],
+class MVESimpleUnaryPredicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
 
 def int_arm_mve_mvn_predicated: MVESimpleUnaryPredicated;
@@ -1266,34 +1342,34 @@
 def int_arm_mve_vrintx_predicated: MVESimpleUnaryPredicated;
 def int_arm_mve_vrintn_predicated: MVESimpleUnaryPredicated;
 
-def int_arm_mve_vrev_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vrev_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_i32_ty /* size to reverse */,
     llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
 
-def int_arm_mve_vmovl_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmovl_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [llvm_anyvector_ty, llvm_i32_ty /* unsigned */, llvm_i32_ty /* top half */,
     llvm_anyvector_ty /* predicate */, LLVMMatchType<0>], [IntrNoMem]>;
-def int_arm_mve_vmovn_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmovn_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_anyvector_ty, llvm_i32_ty /* top half */,
     llvm_anyvector_ty /* predicate */], [IntrNoMem]>;
 
-def int_arm_mve_vqmovn: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vqmovn: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_anyvector_ty,
     llvm_i32_ty /* unsigned output */, llvm_i32_ty /* unsigned input */,
     llvm_i32_ty /* top half */], [IntrNoMem]>;
-def int_arm_mve_vqmovn_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vqmovn_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0>, llvm_anyvector_ty,
     llvm_i32_ty /* unsigned output */, llvm_i32_ty /* unsigned input */,
     llvm_i32_ty /* top half */, llvm_anyvector_ty /* pred */], [IntrNoMem]>;
 
-def int_arm_mve_fma_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_fma_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0> /* mult op #1 */, LLVMMatchType<0> /* mult op #2 */,
     LLVMMatchType<0> /* addend */, llvm_anyvector_ty /* pred */], [IntrNoMem]>;
-def int_arm_mve_vmla_n_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmla_n_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0> /* mult op #1 */, LLVMMatchType<0> /* addend */,
     llvm_i32_ty /* mult op #2 (scalar) */, llvm_anyvector_ty /* pred */],
    [IntrNoMem]>;
-def int_arm_mve_vmlas_n_predicated: Intrinsic<[llvm_anyvector_ty],
+def int_arm_mve_vmlas_n_predicated: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
    [LLVMMatchType<0> /* mult op #1 */, LLVMMatchType<0> /* mult op #2 */,
     llvm_i32_ty /* addend (scalar) */, llvm_anyvector_ty /* pred */],
    [IntrNoMem]>;
@@ -1319,21 +1395,21 @@
 // CDE (Custom Datapath Extension)
 
 multiclass CDEGPRIntrinsics<list<LLVMType> args> {
-  def "" : Intrinsic<
+  def "" : DefaultAttrsIntrinsic<
     [llvm_i32_ty],
     !listconcat([llvm_i32_ty /* coproc */], args, [llvm_i32_ty /* imm */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 1)>>]>;
-  def a : Intrinsic<
+  def a : DefaultAttrsIntrinsic<
     [llvm_i32_ty],
     !listconcat([llvm_i32_ty /* coproc */, llvm_i32_ty /* acc */], args,
                 [llvm_i32_ty /* imm */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 2)>>]>;
 
-  def d: Intrinsic<
+  def d: DefaultAttrsIntrinsic<
     [llvm_i32_ty /* lo */, llvm_i32_ty /* hi */],
     !listconcat([llvm_i32_ty /* coproc */], args, [llvm_i32_ty /* imm */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 1)>>]>;
-  def da: Intrinsic<
+  def da: DefaultAttrsIntrinsic<
     [llvm_i32_ty /* lo */, llvm_i32_ty /* hi */],
     !listconcat([llvm_i32_ty /* coproc */, llvm_i32_ty /* acc_lo */,
                  llvm_i32_ty /* acc_hi */], args, [llvm_i32_ty /* imm */]),
@@ -1345,11 +1421,11 @@
 defm int_arm_cde_cx3: CDEGPRIntrinsics<[llvm_i32_ty, llvm_i32_ty]>;
 
 multiclass CDEVCXIntrinsics<list<LLVMType> args> {
-  def "" : Intrinsic<
+  def "" : DefaultAttrsIntrinsic<
     [llvm_anyfloat_ty],
     !listconcat([llvm_i32_ty /* coproc */], args, [llvm_i32_ty /* imm */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 1)>>]>;
-  def a : Intrinsic<
+  def a : DefaultAttrsIntrinsic<
     [llvm_anyfloat_ty],
     !listconcat([llvm_i32_ty /* coproc */,  LLVMMatchType<0> /* acc */],
                 args, [llvm_i32_ty /* imm */]),
@@ -1361,22 +1437,22 @@
 defm int_arm_cde_vcx3 : CDEVCXIntrinsics<[LLVMMatchType<0>, LLVMMatchType<0>]>;
 
 multiclass CDEVCXVecIntrinsics<list<LLVMType> args> {
-  def "" : Intrinsic<
+  def "" : DefaultAttrsIntrinsic<
     [llvm_v16i8_ty],
     !listconcat([llvm_i32_ty /* coproc */], args, [llvm_i32_ty /* imm */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 1)>>]>;
-  def a : Intrinsic<
+  def a : DefaultAttrsIntrinsic<
     [llvm_v16i8_ty],
     !listconcat([llvm_i32_ty /* coproc */, llvm_v16i8_ty /* acc */],
                 args, [llvm_i32_ty /* imm */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 2)>>]>;
 
-  def _predicated : Intrinsic<
+  def _predicated : DefaultAttrsIntrinsic<
     [llvm_anyvector_ty],
     !listconcat([llvm_i32_ty /* coproc */, LLVMMatchType<0> /* inactive */],
                 args, [llvm_i32_ty /* imm */, llvm_anyvector_ty /* mask */]),
     [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<!add(!size(args), 2)>>]>;
-  def a_predicated : Intrinsic<
+  def a_predicated : DefaultAttrsIntrinsic<
     [llvm_anyvector_ty],
     !listconcat([llvm_i32_ty /* coproc */, LLVMMatchType<0> /* acc */],
                 args, [llvm_i32_ty /* imm */, llvm_anyvector_ty /* mask */]),
diff --git a/llvm/test/CodeGen/ARM/vector-DAGCombine.ll b/llvm/test/CodeGen/ARM/vector-DAGCombine.ll
--- a/llvm/test/CodeGen/ARM/vector-DAGCombine.ll
+++ b/llvm/test/CodeGen/ARM/vector-DAGCombine.ll
@@ -104,6 +104,7 @@
 ; CHECK:       @ %bb.0: @ %entry
 ; CHECK-NEXT:    vmov.i8 d16, #0x1
 ; CHECK-NEXT:    vst1.8 {d16}, [r0]
+; CHECK-NEXT:    bx lr
 entry:
   %0 = sext <4 x i1> zeroinitializer to <4 x i16>
   %1 = add <4 x i16> %0, zeroinitializer
@@ -111,7 +112,7 @@
   %3 = add <8 x i16> %2, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
   %4 = trunc <8 x i16> %3 to <8 x i8>
   tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* undef, <8 x i8> %4, i32 1)
-  unreachable
+  ret void
 }
 
 declare void @llvm.arm.neon.vst1.p0i8.v8i8(i8*, <8 x i8>, i32) nounwind