diff --git a/llvm/lib/Target/AArch64/SMEABIPass.cpp b/llvm/lib/Target/AArch64/SMEABIPass.cpp
--- a/llvm/lib/Target/AArch64/SMEABIPass.cpp
+++ b/llvm/lib/Target/AArch64/SMEABIPass.cpp
@@ -63,12 +63,15 @@
 void emitTPIDR2Save(Module *M, IRBuilder<> &Builder) {
   auto *TPIDR2SaveTy =
       FunctionType::get(Builder.getVoidTy(), {}, /*IsVarArgs=*/false);
-
   auto Attrs =
-      AttributeList::get(M->getContext(), 0, {"aarch64_pstate_sm_compatible"});
+      AttributeList()
+          .addFnAttribute(M->getContext(), "aarch64_pstate_sm_compatible")
+          .addFnAttribute(M->getContext(), "aarch64_pstate_za_preserved");
   FunctionCallee Callee =
       M->getOrInsertFunction("__arm_tpidr2_save", TPIDR2SaveTy, Attrs);
-  Builder.CreateCall(Callee);
+  CallInst *Call = Builder.CreateCall(Callee);
+  Call->setCallingConv(
+      CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0);
 
   // A save to TPIDR2 should be followed by clearing TPIDR2_EL0.
   Function *WriteIntr =
diff --git a/llvm/test/CodeGen/AArch64/sme-new-za-function.ll b/llvm/test/CodeGen/AArch64/sme-new-za-function.ll
--- a/llvm/test/CodeGen/AArch64/sme-new-za-function.ll
+++ b/llvm/test/CodeGen/AArch64/sme-new-za-function.ll
@@ -10,7 +10,7 @@
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0
 ; CHECK-NEXT:    br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[TMP0:%.*]]
 ; CHECK:       save.za:
-; CHECK-NEXT:    call void @__arm_tpidr2_save()
+; CHECK-NEXT:    call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
 ; CHECK-NEXT:    call void @llvm.aarch64.sme.set.tpidr2(i64 0)
 ; CHECK-NEXT:    br label [[TMP0]]
 ; CHECK:       0:
@@ -30,7 +30,7 @@
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0
 ; CHECK-NEXT:    br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[ENTRY:%.*]]
 ; CHECK:       save.za:
-; CHECK-NEXT:    call void @__arm_tpidr2_save()
+; CHECK-NEXT:    call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
 ; CHECK-NEXT:    call void @llvm.aarch64.sme.set.tpidr2(i64 0)
 ; CHECK-NEXT:    br label [[ENTRY]]
 ; CHECK:       entry:
@@ -59,4 +59,5 @@
   ret i32 %sub
 }
 
-; CHECK: declare "aarch64_pstate_sm_compatible" void @__arm_tpidr2_save()
+; CHECK: declare void @__arm_tpidr2_save() #[[ATTR:[0-9]+]]
+; CHECK: attributes #[[ATTR]] = { "aarch64_pstate_sm_compatible" "aarch64_pstate_za_preserved" }