Index: mlir/lib/IR/AsmPrinter.cpp
===================================================================
--- mlir/lib/IR/AsmPrinter.cpp
+++ mlir/lib/IR/AsmPrinter.cpp
@@ -3111,8 +3111,21 @@
     os << ')';
   }
 
+  // Do not print attributes that have their default values.
+  SmallVector<StringRef, 2> elidedAttrs;
+  NamedAttrList defaultAttrs;
+  if (Optional<RegisteredOperationName> info = op->getRegisteredInfo())
+    info->populateDefaultAttrs(defaultAttrs);
+
   auto attrs = op->getAttrs();
-  printOptionalAttrDict(attrs);
+  for (const NamedAttribute &opAttr : attrs) {
+    StringAttr opAttrName = opAttr.getName();
+    if (Optional<NamedAttribute> attr = defaultAttrs.getNamed(opAttrName))
+      if (attr.value() == opAttr)
+        elidedAttrs.push_back(opAttrName);
+  }
+
+  printOptionalAttrDict(attrs, elidedAttrs);
 
   // Print the type signature of the operation.
   os << " : ";
Index: mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
===================================================================
--- mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
+++ mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
@@ -6,7 +6,7 @@
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<16xf32>) -> f32
+// CHECK-SAME: : (f32, vector<16xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 //
 // REASSOC-LABEL: @reduce_add_f32(
@@ -26,7 +26,7 @@
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fmul"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<16xf32>) -> f32
+// CHECK-SAME: : (f32, vector<16xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 //
 // REASSOC-LABEL: @reduce_mul_f32(
Index: mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
===================================================================
--- mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+++ mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
@@ -1143,7 +1143,7 @@
 //      CHECK: %[[CA:.*]] = builtin.unrealized_conversion_cast %[[A]] : vector<f32> to vector<1xf32>
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[CA]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<1xf32>) -> f32
+// CHECK-SAME: : (f32, vector<1xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 
 // -----
@@ -1156,7 +1156,7 @@
 // CHECK-SAME: %[[A:.*]]: vector<16xf16>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f16) : f16
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f16, vector<16xf16>) -> f16
+// CHECK-SAME: : (f16, vector<16xf16>) -> f16
 //      CHECK: return %[[V]] : f16
 
 // -----
@@ -1169,7 +1169,7 @@
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<16xf32>) -> f32
+// CHECK-SAME: : (f32, vector<16xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 
 // -----
@@ -1182,7 +1182,7 @@
 // CHECK-SAME: %[[A:.*]]: vector<16xf64>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f64) : f64
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f64, vector<16xf64>) -> f64
+// CHECK-SAME: : (f64, vector<16xf64>) -> f64
 //      CHECK: return %[[V]] : f64
 
 // -----
Index: mlir/test/Dialect/LLVMIR/func.mlir
===================================================================
--- mlir/test/Dialect/LLVMIR/func.mlir
+++ mlir/test/Dialect/LLVMIR/func.mlir
@@ -125,10 +125,11 @@
   }
 
   // Omit the `external` linkage, which is the default, in the custom format.
-  // Check that it is present in the generic format using its numeric value.
+  // Check that it is not present in the generic format as well, because
+  // it is the default.
   //
   // CHECK: llvm.func @external_func
-  // GENERIC: linkage = #llvm.linkage<external>
+  // GENERIC: {function_type = !llvm.func<void ()>, sym_name = "external_func"}
   llvm.func external @external_func()
 
   // CHECK-LABEL: llvm.func @arg_struct_attr(
Index: mlir/test/Target/LLVMIR/Import/intrinsic.ll
===================================================================
--- mlir/test/Target/LLVMIR/Import/intrinsic.ll
+++ mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -253,9 +253,9 @@
   %12 = call i32 @llvm.vector.reduce.umax.v8i32(<8 x i32> %2)
   ; CHECK: "llvm.intr.vector.reduce.umin"(%{{.*}}) : (vector<8xi32>) -> i32
   %13 = call i32 @llvm.vector.reduce.umin.v8i32(<8 x i32> %2)
-  ; CHECK: "llvm.intr.vector.reduce.fadd"(%{{.*}}, %{{.*}}) {reassoc = false} : (f32, vector<8xf32>) -> f32
+  ; CHECK: "llvm.intr.vector.reduce.fadd"(%{{.*}}, %{{.*}}) : (f32, vector<8xf32>) -> f32
   %14 = call float @llvm.vector.reduce.fadd.v8f32(float %0, <8 x float> %1)
-  ; CHECK: "llvm.intr.vector.reduce.fmul"(%{{.*}}, %{{.*}}) {reassoc = false} : (f32, vector<8xf32>) -> f32
+  ; CHECK: "llvm.intr.vector.reduce.fmul"(%{{.*}}, %{{.*}}) : (f32, vector<8xf32>) -> f32
   %15 = call float @llvm.vector.reduce.fmul.v8f32(float %0, <8 x float> %1)
   ; CHECK: "llvm.intr.vector.reduce.fadd"(%{{.*}}, %{{.*}}) {reassoc = true} : (f32, vector<8xf32>) -> f32
   %16 = call reassoc float @llvm.vector.reduce.fadd.v8f32(float %0, <8 x float> %1)
Index: mlir/test/mlir-tblgen/pattern.mlir
===================================================================
--- mlir/test/mlir-tblgen/pattern.mlir
+++ mlir/test/mlir-tblgen/pattern.mlir
@@ -253,7 +253,8 @@
 
 // CHECK-LABEL: succeedMatchMissingDefaultValuedAttr
 func.func @succeedMatchMissingDefaultValuedAttr() -> i32 {
-  // CHECK: "test.match_op_attribute2"() {default_valued_attr = 42 : i32, more_attr = 4 : i32, optional_attr = 2 : i32, required_attr = 1 : i32}
+  // default_valued_attr must not be printed out, if it has default value:
+  // CHECK: "test.match_op_attribute2"() {more_attr = 4 : i32, optional_attr = 2 : i32, required_attr = 1 : i32}
   %0 = "test.match_op_attribute1"() {required_attr = 1: i32, optional_attr = 2: i32, more_attr = 4: i32} : () -> (i32)
   return %0: i32
 }