diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36832,6 +36832,18 @@
     MI.eraseFromParent(); // The pseudo is gone now.
     return BB;
   }
+  case X86::PREFETCHIT0:
+  case X86::PREFETCHIT1: {
+    unsigned Opc =
+        MI.getOpcode() == X86::PREFETCHIT0 ? X86::PREFETCHT0 : X86::PREFETCHT1;
+    if (MI.getOperand(0).getReg() != X86::RIP) {
+      MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(Opc));
+      for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx)
+        MIB.add(MI.getOperand(Idx));
+      MI.eraseFromParent();
+    }
+    return BB;
+  }
   }
 }
 
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -3002,7 +3002,8 @@
 //===----------------------------------------------------------------------===//
 // PREFETCHIT0 and PREFETCHIT1 Instructions
 // prefetch ADDR, RW, Locality, Data
-let Predicates = [HasPREFETCHI, In64BitMode], SchedRW = [WriteLoad] in {
+let Predicates = [HasPREFETCHI, In64BitMode], SchedRW = [WriteLoad],
+    usesCustomInserter = 1 in {
   def PREFETCHIT0 : I<0x18, MRM7m, (outs), (ins i8mem:$src),
     "prefetchit0\t$src", [(prefetch addr:$src, (i32 0), (i32 3), (i32 0))]>, TB;
   def PREFETCHIT1 : I<0x18, MRM6m, (outs), (ins i8mem:$src),
diff --git a/llvm/test/CodeGen/X86/prefetch.ll b/llvm/test/CodeGen/X86/prefetch.ll
--- a/llvm/test/CodeGen/X86/prefetch.ll
+++ b/llvm/test/CodeGen/X86/prefetch.ll
@@ -102,8 +102,8 @@
 ; PREFETCHI-NEXT:    prefetcht1 (%rdi)
 ; PREFETCHI-NEXT:    prefetcht0 (%rdi)
 ; PREFETCHI-NEXT:    prefetchnta (%rdi)
-; PREFETCHI-NEXT:    prefetchit1 (%rdi)
-; PREFETCHI-NEXT:    prefetchit0 (%rdi)
+; PREFETCHI-NEXT:    prefetcht1 (%rdi)
+; PREFETCHI-NEXT:    prefetcht0 (%rdi)
 ; PREFETCHI-NEXT:    prefetchit1 t(%rip)
 ; PREFETCHI-NEXT:    prefetchit0 ext(%rip)
 ; PREFETCHI-NEXT:    retq