diff --git a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
--- a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
@@ -620,6 +620,15 @@
 defm SQRSHRN_VG4_Z4ZI : sme2_sat_shift_vector_vg4<"sqrshrn", 0b100>;
 defm UQRSHRN_VG4_Z4ZI : sme2_sat_shift_vector_vg4<"uqrshrn", 0b101>;
 defm SQRSHRUN_VG4_Z4ZI : sme2_sat_shift_vector_vg4<"sqrshrun", 0b110>;
+
+defm FRINTA_2Z2Z: sme2_frint_vector_vg2_multi<"frinta", 0b100>;
+defm FRINTA_4Z4Z: sme2_frint_vector_vg4_multi<"frinta", 0b100>;
+defm FRINTM_2Z2Z: sme2_frint_vector_vg2_multi<"frintm", 0b010>;
+defm FRINTM_4Z4Z: sme2_frint_vector_vg4_multi<"frintm", 0b010>;
+defm FRINTN_2Z2Z: sme2_frint_vector_vg2_multi<"frintn", 0b000>;
+defm FRINTN_4Z4Z: sme2_frint_vector_vg4_multi<"frintn", 0b000>;
+defm FRINTP_2Z2Z: sme2_frint_vector_vg2_multi<"frintp", 0b001>;
+defm FRINTP_4Z4Z: sme2_frint_vector_vg4_multi<"frintp", 0b001>;
 }
 
 let Predicates = [HasSME2, HasSMEI16I64] in {
diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td
--- a/llvm/lib/Target/AArch64/SMEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td
@@ -3619,3 +3619,40 @@
     let Inst{20-16} = imm{4-0};
   }
 }
+
+//===----------------------------------------------------------------------===//
+// SME2 Multi-vector - FRINT
+
+class sme2_frint_vector_vg24_multi<string mnemonic, bit vg4,
+                                   bits<3> opc,
+                                   RegisterOperand vector_ty>
+    : I<(outs vector_ty:$Zd), (ins vector_ty:$Zn),
+        mnemonic, "\t$Zd, $Zn", "", []>, Sched<[]> {
+  let Inst{31-21} = 0b11000001101;
+  let Inst{20}    = vg4;
+  let Inst{19}    = 0b1;
+  let Inst{18-16} = opc;
+  let Inst{15-10} = 0b111000;
+  let Inst{0}     = 0b0;
+}
+
+multiclass sme2_frint_vector_vg2_multi<string mnemonic, bits<3> opc> {
+  def _S : sme2_frint_vector_vg24_multi<mnemonic, 0b0, opc, ZZ_s_mul_r> {
+    bits<4> Zn;
+    bits<4> Zd;
+    let Inst{9-6} = Zn;
+    let Inst{5}   = 0b0;
+    let Inst{4-1} = Zd;
+  }
+}
+
+multiclass sme2_frint_vector_vg4_multi<string mnemonic, bits<3> opc> {
+  def _S : sme2_frint_vector_vg24_multi<mnemonic, 0b1, opc, ZZZZ_s_mul_r> {
+    bits<3> Zn;
+    bits<3> Zd;
+    let Inst{9-7} = Zn;
+    let Inst{6-5} = 0b00;
+    let Inst{4-2} = Zd;
+    let Inst{1}   = 0b0;
+  }
+}
diff --git a/llvm/test/MC/AArch64/SME2/frinta-diagnostics.s b/llvm/test/MC/AArch64/SME2/frinta-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frinta-diagnostics.s
@@ -0,0 +1,22 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid vector list
+
+frinta {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frinta {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+frinta {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: frinta {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid Register Suffix
+
+frinta {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frinta {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/frinta.s b/llvm/test/MC/AArch64/SME2/frinta.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frinta.s
@@ -0,0 +1,63 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+frinta  {z0.s - z1.s}, {z0.s - z1.s}  // 11000001-10101100-11100000-00000000
+// CHECK-INST: frinta  { z0.s, z1.s }, { z0.s, z1.s }
+// CHECK-ENCODING: [0x00,0xe0,0xac,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1ace000 <unknown>
+
+frinta  {z20.s - z21.s}, {z10.s - z11.s}  // 11000001-10101100-11100001-01010100
+// CHECK-INST: frinta  { z20.s, z21.s }, { z10.s, z11.s }
+// CHECK-ENCODING: [0x54,0xe1,0xac,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1ace154 <unknown>
+
+frinta  {z22.s - z23.s}, {z12.s - z13.s}  // 11000001-10101100-11100001-10010110
+// CHECK-INST: frinta  { z22.s, z23.s }, { z12.s, z13.s }
+// CHECK-ENCODING: [0x96,0xe1,0xac,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1ace196 <unknown>
+
+frinta  {z30.s - z31.s}, {z30.s - z31.s}  // 11000001-10101100-11100011-11011110
+// CHECK-INST: frinta  { z30.s, z31.s }, { z30.s, z31.s }
+// CHECK-ENCODING: [0xde,0xe3,0xac,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1ace3de <unknown>
+
+
+frinta  {z0.s - z3.s}, {z0.s - z3.s}  // 11000001-10111100-11100000-00000000
+// CHECK-INST: frinta  { z0.s - z3.s }, { z0.s - z3.s }
+// CHECK-ENCODING: [0x00,0xe0,0xbc,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bce000 <unknown>
+
+frinta  {z20.s - z23.s}, {z8.s - z11.s}  // 11000001-10111100-11100001-00010100
+// CHECK-INST: frinta  { z20.s - z23.s }, { z8.s - z11.s }
+// CHECK-ENCODING: [0x14,0xe1,0xbc,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bce114 <unknown>
+
+frinta  {z20.s - z23.s}, {z12.s - z15.s}  // 11000001-10111100-11100001-10010100
+// CHECK-INST: frinta  { z20.s - z23.s }, { z12.s - z15.s }
+// CHECK-ENCODING: [0x94,0xe1,0xbc,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bce194 <unknown>
+
+frinta  {z28.s - z31.s}, {z28.s - z31.s}  // 11000001-10111100-11100011-10011100
+// CHECK-INST: frinta  { z28.s - z31.s }, { z28.s - z31.s }
+// CHECK-ENCODING: [0x9c,0xe3,0xbc,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bce39c <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/frintm-diagnostics.s b/llvm/test/MC/AArch64/SME2/frintm-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frintm-diagnostics.s
@@ -0,0 +1,22 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid vector list
+
+frintm {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frintm {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+frintm {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: frintm {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid Register Suffix
+
+frintm {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frintm {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/frintm.s b/llvm/test/MC/AArch64/SME2/frintm.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frintm.s
@@ -0,0 +1,63 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+frintm  {z0.s - z1.s}, {z0.s - z1.s}  // 11000001-10101010-11100000-00000000
+// CHECK-INST: frintm  { z0.s, z1.s }, { z0.s, z1.s }
+// CHECK-ENCODING: [0x00,0xe0,0xaa,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1aae000 <unknown>
+
+frintm  {z20.s - z21.s}, {z10.s - z11.s}  // 11000001-10101010-11100001-01010100
+// CHECK-INST: frintm  { z20.s, z21.s }, { z10.s, z11.s }
+// CHECK-ENCODING: [0x54,0xe1,0xaa,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1aae154 <unknown>
+
+frintm  {z22.s - z23.s}, {z12.s - z13.s}  // 11000001-10101010-11100001-10010110
+// CHECK-INST: frintm  { z22.s, z23.s }, { z12.s, z13.s }
+// CHECK-ENCODING: [0x96,0xe1,0xaa,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1aae196 <unknown>
+
+frintm  {z30.s - z31.s}, {z30.s - z31.s}  // 11000001-10101010-11100011-11011110
+// CHECK-INST: frintm  { z30.s, z31.s }, { z30.s, z31.s }
+// CHECK-ENCODING: [0xde,0xe3,0xaa,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1aae3de <unknown>
+
+
+frintm  {z0.s - z3.s}, {z0.s - z3.s}  // 11000001-10111010-11100000-00000000
+// CHECK-INST: frintm  { z0.s - z3.s }, { z0.s - z3.s }
+// CHECK-ENCODING: [0x00,0xe0,0xba,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bae000 <unknown>
+
+frintm  {z20.s - z23.s}, {z8.s - z11.s}  // 11000001-10111010-11100001-00010100
+// CHECK-INST: frintm  { z20.s - z23.s }, { z8.s - z11.s }
+// CHECK-ENCODING: [0x14,0xe1,0xba,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bae114 <unknown>
+
+frintm  {z20.s - z23.s}, {z12.s - z15.s}  // 11000001-10111010-11100001-10010100
+// CHECK-INST: frintm  { z20.s - z23.s }, { z12.s - z15.s }
+// CHECK-ENCODING: [0x94,0xe1,0xba,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bae194 <unknown>
+
+frintm  {z28.s - z31.s}, {z28.s - z31.s}  // 11000001-10111010-11100011-10011100
+// CHECK-INST: frintm  { z28.s - z31.s }, { z28.s - z31.s }
+// CHECK-ENCODING: [0x9c,0xe3,0xba,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1bae39c <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/frintn-diagnostics.s b/llvm/test/MC/AArch64/SME2/frintn-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frintn-diagnostics.s
@@ -0,0 +1,22 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid vector list
+
+frintn {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frintn {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+frintn {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: frintn {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid Register Suffix
+
+frintn {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frintn {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/frintn.s b/llvm/test/MC/AArch64/SME2/frintn.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frintn.s
@@ -0,0 +1,63 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+frintn  {z0.s - z1.s}, {z0.s - z1.s}  // 11000001-10101000-11100000-00000000
+// CHECK-INST: frintn  { z0.s, z1.s }, { z0.s, z1.s }
+// CHECK-ENCODING: [0x00,0xe0,0xa8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a8e000 <unknown>
+
+frintn  {z20.s - z21.s}, {z10.s - z11.s}  // 11000001-10101000-11100001-01010100
+// CHECK-INST: frintn  { z20.s, z21.s }, { z10.s, z11.s }
+// CHECK-ENCODING: [0x54,0xe1,0xa8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a8e154 <unknown>
+
+frintn  {z22.s - z23.s}, {z12.s - z13.s}  // 11000001-10101000-11100001-10010110
+// CHECK-INST: frintn  { z22.s, z23.s }, { z12.s, z13.s }
+// CHECK-ENCODING: [0x96,0xe1,0xa8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a8e196 <unknown>
+
+frintn  {z30.s - z31.s}, {z30.s - z31.s}  // 11000001-10101000-11100011-11011110
+// CHECK-INST: frintn  { z30.s, z31.s }, { z30.s, z31.s }
+// CHECK-ENCODING: [0xde,0xe3,0xa8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a8e3de <unknown>
+
+
+frintn  {z0.s - z3.s}, {z0.s - z3.s}  // 11000001-10111000-11100000-00000000
+// CHECK-INST: frintn  { z0.s - z3.s }, { z0.s - z3.s }
+// CHECK-ENCODING: [0x00,0xe0,0xb8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b8e000 <unknown>
+
+frintn  {z20.s - z23.s}, {z8.s - z11.s}  // 11000001-10111000-11100001-00010100
+// CHECK-INST: frintn  { z20.s - z23.s }, { z8.s - z11.s }
+// CHECK-ENCODING: [0x14,0xe1,0xb8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b8e114 <unknown>
+
+frintn  {z20.s - z23.s}, {z12.s - z15.s}  // 11000001-10111000-11100001-10010100
+// CHECK-INST: frintn  { z20.s - z23.s }, { z12.s - z15.s }
+// CHECK-ENCODING: [0x94,0xe1,0xb8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b8e194 <unknown>
+
+frintn  {z28.s - z31.s}, {z28.s - z31.s}  // 11000001-10111000-11100011-10011100
+// CHECK-INST: frintn  { z28.s - z31.s }, { z28.s - z31.s }
+// CHECK-ENCODING: [0x9c,0xe3,0xb8,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b8e39c <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/frintp-diagnostics.s b/llvm/test/MC/AArch64/SME2/frintp-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frintp-diagnostics.s
@@ -0,0 +1,22 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid vector list
+
+frintp {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frintp {z0.s-z1.s}, {z0.s-z2.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+frintp {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: frintp {z1.s-z2.s}, {z0.s-z1.s}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid Register Suffix
+
+frintp {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: frintp {z0.s-z1.s}, {z2.d-z3.d}
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/frintp.s b/llvm/test/MC/AArch64/SME2/frintp.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/frintp.s
@@ -0,0 +1,63 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+frintp  {z0.s - z1.s}, {z0.s - z1.s}  // 11000001-10101001-11100000-00000000
+// CHECK-INST: frintp  { z0.s, z1.s }, { z0.s, z1.s }
+// CHECK-ENCODING: [0x00,0xe0,0xa9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a9e000 <unknown>
+
+frintp  {z20.s - z21.s}, {z10.s - z11.s}  // 11000001-10101001-11100001-01010100
+// CHECK-INST: frintp  { z20.s, z21.s }, { z10.s, z11.s }
+// CHECK-ENCODING: [0x54,0xe1,0xa9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a9e154 <unknown>
+
+frintp  {z22.s - z23.s}, {z12.s - z13.s}  // 11000001-10101001-11100001-10010110
+// CHECK-INST: frintp  { z22.s, z23.s }, { z12.s, z13.s }
+// CHECK-ENCODING: [0x96,0xe1,0xa9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a9e196 <unknown>
+
+frintp  {z30.s - z31.s}, {z30.s - z31.s}  // 11000001-10101001-11100011-11011110
+// CHECK-INST: frintp  { z30.s, z31.s }, { z30.s, z31.s }
+// CHECK-ENCODING: [0xde,0xe3,0xa9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a9e3de <unknown>
+
+
+frintp  {z0.s - z3.s}, {z0.s - z3.s}  // 11000001-10111001-11100000-00000000
+// CHECK-INST: frintp  { z0.s - z3.s }, { z0.s - z3.s }
+// CHECK-ENCODING: [0x00,0xe0,0xb9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b9e000 <unknown>
+
+frintp  {z20.s - z23.s}, {z8.s - z11.s}  // 11000001-10111001-11100001-00010100
+// CHECK-INST: frintp  { z20.s - z23.s }, { z8.s - z11.s }
+// CHECK-ENCODING: [0x14,0xe1,0xb9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b9e114 <unknown>
+
+frintp  {z20.s - z23.s}, {z12.s - z15.s}  // 11000001-10111001-11100001-10010100
+// CHECK-INST: frintp  { z20.s - z23.s }, { z12.s - z15.s }
+// CHECK-ENCODING: [0x94,0xe1,0xb9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b9e194 <unknown>
+
+frintp  {z28.s - z31.s}, {z28.s - z31.s}  // 11000001-10111001-11100011-10011100
+// CHECK-INST: frintp  { z28.s - z31.s }, { z28.s - z31.s }
+// CHECK-ENCODING: [0x9c,0xe3,0xb9,0xc1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1b9e39c <unknown>
+