diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1373,6 +1373,18 @@
   let PrintMethod = "printMatrixIndex";
 }
 
+// SME2 vector select offset operands
+
+// uimm3s8 predicate
+// True if the immediate is a multiple of 8 in the range [0,56].
+def UImm3s8Operand : UImmScaledMemoryIndexed<3, 8>;
+
+def uimm3s8 : Operand<i64>, ImmLeaf<i64,
+[{ return Imm >= 0 && Imm <= 56 && ((Imm % 8) == 0); }], UImmS8XForm> {
+  let PrintMethod = "printVectorIndex<8>";
+  let ParserMatchClass = UImm3s8Operand;
+}
+
 class UImmScaledMemoryIndexedRange<int Width, int Scale, int OffsetVal> : AsmOperandClass {
   let Name = "UImm" # Width # "s" # Scale # "Range";
   let DiagnosticType = "InvalidMemoryIndexedRange" # Scale # "UImm" # Width;
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.td b/llvm/lib/Target/AArch64/AArch64RegisterInfo.td
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.td
@@ -1269,6 +1269,8 @@
   def ZA : AArch64Reg<0, "za", [ZAB0]>;
 }
 
+def ZT : AArch64Reg<0, "zt0">;
+
 // SME Register Classes
 
 let isAllocatable = 0 in {
@@ -1295,6 +1297,10 @@
   }
 }
 
+def ZTR : RegisterClass<"AArch64", [untyped], 512, (add ZT)> {
+  let Size = 512;
+  let DiagnosticType = "InvalidLookupTable";
+}
 // SME Register Operands
 // There are three types of SME matrix register operands:
 // * Tiles:
diff --git a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
--- a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
@@ -550,8 +550,32 @@
 defm UMLSLL_VG4_M4ZZ_BtoS  : sme2_mla_ll_array_vg24_single<"umlsll", 0b01110, MatrixOp32, ZZZZ_b, ZPR4b8>;
 defm UMLSLL_VG2_M2Z2Z_BtoS : sme2_mla_ll_array_vg2_multi<"umlsll", 0b0110, MatrixOp32, ZZ_b_mul_r>;
 defm UMLSLL_VG4_M4Z4Z_BtoS : sme2_mla_ll_array_vg4_multi<"umlsll", 0b0110, MatrixOp32, ZZZZ_b_mul_r>;
-}
 
+defm BMOPA_TPPZZ : sme2_bfp_mopx_tile<"bmopa", 0b0>;
+defm BMOPS_TPPZZ : sme2_bfp_mopx_tile<"bmops", 0b1>;
+
+defm SMOPA_TPPZZ : sme2_int_mopx_tile<"smopa", 0b00>;
+defm SMOPS_TPPZZ : sme2_int_mopx_tile<"smops", 0b01>;
+
+defm UMOPA_TPPZZ : sme2_int_mopx_tile<"umopa", 0b10>;
+defm UMOPS_TPPZZ : sme2_int_mopx_tile<"umops", 0b11>;
+
+def ZERO_T : sme2_zero_zt<"zero">;
+
+def LDR_TX : sme2_spill_fill_vector<"ldr", 0b0>;
+def STR_TX : sme2_spill_fill_vector<"str", 0b1>;
+
+def MOVT_XTI : sme2_movt_zt_to_scalar<"movt">;
+def MOVT_TIX : sme2_movt_scalar_to_zt<"movt">;
+
+defm LUTI2_ZTZI  : sme2_luti2_vector_index<"luti2">;
+defm LUTI2_2ZTZI : sme2_luti2_vector_vg2_index<"luti2">;
+defm LUTI2_4ZTZI : sme2_luti2_vector_vg4_index<"luti2">;
+
+defm LUTI4_ZTZI  : sme2_luti4_vector_index<"luti4">;
+defm LUTI4_2ZTZI : sme2_luti4_vector_vg2_index<"luti4">;
+defm LUTI4_4ZTZI : sme2_luti4_vector_vg4_index<"luti4">;
+}
 
 let Predicates = [HasSME2, HasSMEI16I64] in {
 defm ADD_VG2_M2ZZ_D  : sme2_dot_mla_add_sub_array_vg24_single<"add", 0b1011010, MatrixOp64, ZZ_d, ZPR4b64>;
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -263,6 +263,7 @@
   template <bool ParseShiftExtend,
             RegConstraintEqualityTy EqTy = RegConstraintEqualityTy::EqualsReg>
   OperandMatchResultTy tryParseGPROperand(OperandVector &Operands);
+  OperandMatchResultTy tryParseZTOperand(OperandVector &Operands);
   template <bool ParseShiftExtend, bool ParseSuffix>
   OperandMatchResultTy tryParseSVEDataVector(OperandVector &Operands);
   OperandMatchResultTy tryParseSVEPredicateVector(OperandVector &Operands);
@@ -3866,6 +3867,9 @@
   if (!tryParseNeonVectorRegister(Operands))
     return false;
 
+  if (tryParseZTOperand(Operands) == MatchOperand_Success)
+    return false;
+
   // Otherwise try for a scalar register.
   if (tryParseGPROperand<false>(Operands) == MatchOperand_Success)
     return false;
@@ -4079,6 +4083,10 @@
       llvm_unreachable("Expected a valid vector kind");
     }
 
+    if (RegTok.is(AsmToken::Identifier) && ParseRes == MatchOperand_NoMatch &&
+        RegTok.getString().equals_insensitive("zt0"))
+      return MatchOperand_NoMatch;
+
     if (RegTok.isNot(AsmToken::Identifier) ||
         ParseRes == MatchOperand_ParseFail ||
         (ParseRes == MatchOperand_NoMatch && NoMatchIsError &&
@@ -4225,6 +4233,40 @@
   return MatchOperand_Success;
 }
 
+OperandMatchResultTy
+AArch64AsmParser::tryParseZTOperand(OperandVector &Operands) {
+  SMLoc StartLoc = getLoc();
+  const AsmToken &Tok = getTok();
+  StringRef Name = Tok.getString();
+  if (!Name.equals_insensitive("zt0"))
+    return MatchOperand_NoMatch;
+
+  unsigned RegNum;
+  OperandMatchResultTy Res = tryParseScalarRegister(RegNum);
+  if (Res != MatchOperand_Success)
+    return MatchOperand_NoMatch;
+
+  Operands.push_back(AArch64Operand::CreateReg(
+      RegNum, RegKind::Scalar, StartLoc, getLoc(), getContext()));
+
+  if (getTok().is(AsmToken::LBrac)) {
+    Lex(); // eat [
+           // Parse immediate operand.
+    const MCExpr *ImmVal;
+    if (!getParser().parseExpression(ImmVal))
+      if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal)) {
+        Operands.push_back(AArch64Operand::CreateImm(
+            MCConstantExpr::create(MCE->getValue(), getContext()), StartLoc,
+            getLoc(), getContext()));
+        Lex(); // eat ]
+        return MatchOperand_Success;
+      } else
+        return MatchOperand_NoMatch;
+  }
+
+  return MatchOperand_Success;
+}
+
 template <bool ParseShiftExtend, RegConstraintEqualityTy EqTy>
 OperandMatchResultTy
 AArch64AsmParser::tryParseGPROperand(OperandVector &Operands) {
@@ -5413,6 +5455,9 @@
     return Error(Loc, "immediate must be an integer in range [1, 32].");
   case Match_InvalidImm1_64:
     return Error(Loc, "immediate must be an integer in range [1, 64].");
+    // For SME2
+  case Match_InvalidMemoryIndexed8UImm3:
+    return Error(Loc, "index must be a multiple of 8 in range [0, 56].");
   case Match_InvalidMemoryIndexedRange2UImm2:
   case Match_InvalidMemoryIndexedRange2UImm3:
     return Error(
@@ -5639,6 +5684,8 @@
     return Error(Loc, "Invalid vector list, expected list with 4 consecutive "
                       "SVE vectors, where the first vector is a multiple of 4 "
                       "and with matching element types");
+  case Match_InvalidLookupTable:
+    return Error(Loc, "Invalid lookup table, expected zt0");
   default:
     llvm_unreachable("unexpected error code!");
   }
@@ -6080,6 +6127,7 @@
   case Match_InvalidImm1_16:
   case Match_InvalidImm1_32:
   case Match_InvalidImm1_64:
+  case Match_InvalidMemoryIndexed8UImm3:
   case Match_InvalidMemoryIndexedRange2UImm2:
   case Match_InvalidMemoryIndexedRange2UImm3:
   case Match_InvalidMemoryIndexedRange4UImm1:
@@ -6181,6 +6229,7 @@
   case Match_InvalidSVCR:
   case Match_InvalidMatrixIndexGPR32_12_15:
   case Match_InvalidMatrixIndexGPR32_8_11:
+  case Match_InvalidLookupTable:
   case Match_InvalidSVEVectorListMul2x8:
   case Match_InvalidSVEVectorListMul2x16:
   case Match_InvalidSVEVectorListMul2x32:
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
--- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -335,6 +335,9 @@
         case AArch64::MPR8RegClassID:
           MI.insert(MI.begin() + i, MCOperand::createReg(AArch64::ZAB0));
           break;
+        case AArch64::ZTRRegClassID:
+          MI.insert(MI.begin() + i, MCOperand::createReg(AArch64::ZT));
+          break;
         }
       } else if (Desc.OpInfo[i].OperandType ==
                  AArch64::OPERAND_IMPLICIT_IMM_0) {
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
@@ -164,6 +164,7 @@
   void printTypedVectorList(const MCInst *MI, unsigned OpNum,
                             const MCSubtargetInfo &STI, raw_ostream &O);
 
+  template <unsigned Scale = 1>
   void printVectorIndex(const MCInst *MI, unsigned OpNum,
                         const MCSubtargetInfo &STI, raw_ostream &O);
   void printMatrixIndex(const MCInst *MI, unsigned OpNum,
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -1215,7 +1215,7 @@
   O << ']';
 }
 
-template<int Scale>
+template <int Scale>
 void AArch64InstPrinter::printImmScale(const MCInst *MI, unsigned OpNum,
                                        const MCSubtargetInfo &STI,
                                        raw_ostream &O) {
@@ -1524,10 +1524,11 @@
   printVectorList(MI, OpNum, STI, O, Suffix);
 }
 
+template <unsigned Scale>
 void AArch64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,
                                           const MCSubtargetInfo &STI,
                                           raw_ostream &O) {
-  O << "[" << MI->getOperand(OpNum).getImm() << "]";
+  O << "[" << Scale * MI->getOperand(OpNum).getImm() << "]";
 }
 
 void AArch64InstPrinter::printMatrixIndex(const MCInst *MI, unsigned OpNum,
diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td
--- a/llvm/lib/Target/AArch64/SMEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td
@@ -87,7 +87,7 @@
             (!cast<Instruction>(NAME # _PSEUDO) imm0_7:$tile, $pn, $pm, $zn, $zm)>;
 }
 
-class sme_int_outer_product_inst<bit u0, bit u1, bit S, bit sz,
+class sme_int_outer_product_inst<bit u0, bit u1, bit S, bit sz, bit sme2,
                                  MatrixTileOperand za_ty, ZPRRegOp zpr_ty,
                                  string mnemonic>
     : I<(outs za_ty:$ZAda),
@@ -109,14 +109,14 @@
   let Inst{12-10} = Pn;
   let Inst{9-5}   = Zn;
   let Inst{4}     = S;
-  let Inst{3}     = 0b0;
+  let Inst{3}     = sme2;
 
   let Constraints = "$ZAda = $_ZAda";
 }
 
 multiclass sme_int_outer_product_i32<bits<3> opc, string mnemonic,
                                      SDPatternOperator op> {
-  def NAME : sme_int_outer_product_inst<opc{2}, opc{1}, opc{0}, 0b0, TileOp32,
+  def NAME : sme_int_outer_product_inst<opc{2}, opc{1}, opc{0}, 0b0, 0b0,  TileOp32,
                                         ZPR8, mnemonic> {
     bits<2> ZAda;
     let Inst{1-0} = ZAda;
@@ -132,7 +132,7 @@
 
 multiclass sme_int_outer_product_i64<bits<3> opc, string mnemonic,
                                      SDPatternOperator op> {
-  def NAME : sme_int_outer_product_inst<opc{2}, opc{1}, opc{0}, 0b1, TileOp64,
+  def NAME : sme_int_outer_product_inst<opc{2}, opc{1}, opc{0}, 0b1, 0b0, TileOp64,
                                         ZPR16, mnemonic> {
     bits<3> ZAda;
     let Inst{2-0} = ZAda;
@@ -145,9 +145,9 @@
             (!cast<Instruction>(NAME # _PSEUDO) imm0_7:$tile, $pn, $pm, $zn, $zm)>;
 }
 
-class sme_outer_product_widening_inst<bit op, bit S, string mnemonic>
+class sme_outer_product_widening_inst<bit op, bit S, bit sme2, ZPRRegOp zpr_ty, string mnemonic>
     : I<(outs TileOp32:$ZAda),
-        (ins  TileOp32:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, ZPR16:$Zn, ZPR16:$Zm),
+        (ins  TileOp32:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm),
         mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm",
         "", []>,
       Sched<[]> {
@@ -156,21 +156,24 @@
   bits<3> Pn;
   bits<5> Zn;
   bits<2> ZAda;
-  let Inst{31-22} = 0b1000000110;
+  let Inst{31-25} = 0b1000000;
+  let Inst{24}    = !if(sme2, 0, 1);
+  let Inst{23-22} = 0b10;
   let Inst{21}    = op;
   let Inst{20-16} = Zm;
   let Inst{15-13} = Pm;
   let Inst{12-10} = Pn;
   let Inst{9-5}   = Zn;
   let Inst{4}     = S;
-  let Inst{3-2}   = 0b00;
+  let Inst{3}     = sme2;
+  let Inst{2}     = 0b0;
   let Inst{1-0}   = ZAda;
 
   let Constraints = "$ZAda = $_ZAda";
 }
 
 multiclass sme_bf16_outer_product<bit S, string mnemonic, SDPatternOperator op> {
-  def NAME : sme_outer_product_widening_inst<0b0, S, mnemonic>;
+  def NAME : sme_outer_product_widening_inst<0b0, S, 0b0, ZPR16, mnemonic>;
 
   def NAME # _PSEUDO : sme_outer_product_pseudo<ZPR16>;
 
@@ -180,7 +183,7 @@
 }
 
 multiclass sme_f16_outer_product<bit S, string mnemonic, SDPatternOperator op> {
-  def NAME : sme_outer_product_widening_inst<0b1, S, mnemonic>;
+  def NAME : sme_outer_product_widening_inst<0b1, S, 0b0, ZPR16, mnemonic>;
 
   def NAME # _PSEUDO : sme_outer_product_pseudo<ZPR16>;
 
@@ -2357,3 +2360,206 @@
   def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm], $Zn, $Zm",
                  (!cast<Instruction>(NAME) matrix_ty:$ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm1s4range:$imm, vector_ty:$Zn, vector_ty:$Zm), 0>;
 }
+
+//===----------------------------------------------------------------------===//
+// SME2 Outer Product and Accumulate
+
+multiclass sme2_int_mopx_tile<string mnemonic, bits<2> op> {
+  def NAME : sme_int_outer_product_inst<op{1}, 0b0, op{0}, 0b0, 0b1, TileOp32,
+                                        ZPR16, mnemonic>{
+    bits<2> ZAda;
+    let Inst{1-0} = ZAda;
+    let Inst{2}   = 0b0;
+  }
+}
+
+multiclass  sme2_bfp_mopx_tile<string mnemonic, bit S> {
+  def NAME : sme_outer_product_widening_inst<0b0, S, 0b1, ZPR32, mnemonic>;
+}
+
+
+//===----------------------------------------------------------------------===///
+// ZERO instructions.
+class sme2_zero_zt<string mnemonic>
+    : I<(outs ZTR:$ZT), (ins ),
+         mnemonic, "\t\\{ $ZT \\}",
+         "", []>, Sched<[]> {
+  let Inst{31-0} = 0b11000000010010000000000000000001;
+}
+
+//===----------------------------------------------------------------------===//
+// SME2 lookup table load/store
+class sme2_spill_fill_vector<string mnemonic, bit isStore>
+    : I<!if(isStore, (outs ), (outs ZTR:$ZTt)),
+        !if(isStore, (ins ZTR:$ZTt, GPR64sp:$Rn), (ins GPR64sp:$Rn)),
+        mnemonic, "\t$ZTt, [$Rn]",
+        "", []>, Sched<[]> {
+  bits<5> Rn;
+  let Inst{31-22} = 0b1110000100;
+  let Inst{21}    = isStore;
+  let Inst{20-10} = 0b11111100000;
+  let Inst{9-5}   = Rn;
+  let Inst{4-0}   = 0b00000;
+
+  let mayLoad     = !not(isStore);
+  let mayStore    = isStore;
+}
+
+//===----------------------------------------------------------------------===///
+// SME2 move to/from lookup table
+class sme2_movt_zt_to_scalar<string mnemonic>
+    : I<(outs GPR64:$Rt), (ins ZTR:$ZTt, uimm3s8:$imm3),
+         mnemonic, "\t$Rt, $ZTt$imm3",
+         "", []>, Sched<[]> {
+  bits<3> imm3;
+  bits<5> Rt;
+  let Inst{31-15} = 0b11000000010011000;
+  let Inst{14-12} = imm3;
+  let Inst{11-5}  = 0b0011111;
+  let Inst{4-0}   = Rt;
+}
+
+class sme2_movt_scalar_to_zt<string mnemonic>
+    : I<(outs ZTR:$ZTt), (ins uimm3s8:$imm3, GPR64:$Rt),
+         mnemonic, "\t$ZTt$imm3, $Rt",
+         "", []>, Sched<[]> {
+  bits<3> imm3;
+  bits<5> Rt;
+  let Inst{31-15} = 0b11000000010011100;
+  let Inst{14-12} = imm3;
+  let Inst{11-5}  = 0b0011111;
+  let Inst{4-0}   = Rt;
+}
+
+//===----------------------------------------------------------------------===//
+// SME2 Lookup Table Expand
+class sme2_luti_vector_index<bits<2> sz, RegisterOperand vector_ty,
+                             AsmVectorIndexOpnd index_ty, string mnemonic>
+    : I<(outs vector_ty:$Zd),
+        (ins ZTR:$ZTt, ZPRAny:$Zn, index_ty:$i),
+        mnemonic, "\t$Zd, $ZTt, $Zn$i",
+        "", []>, Sched<[]> {
+  bits<5> Zn;
+  bits<5> Zd;
+  let Inst{31-19} = 0b1100000011001;
+  let Inst{13-12} = sz;
+  let Inst{11-10} = 0b00;
+  let Inst{9-5}   = Zn;
+  let Inst{4-0}   = Zd;
+}
+
+class sme2_luti2_vector_index<bits<2> sz, RegisterOperand vector_ty,
+                              string mnemonic>
+    : sme2_luti_vector_index<sz, vector_ty, VectorIndexB, mnemonic> {
+  bits<4> i;
+  let Inst{18}    = 0b1;
+  let Inst{17-14} = i;
+}
+
+multiclass sme2_luti2_vector_index<string mnemonic> {
+  def _B : sme2_luti2_vector_index<0b00, ZPR8, mnemonic>;
+  def _H : sme2_luti2_vector_index<0b01, ZPR16, mnemonic>;
+  def _S : sme2_luti2_vector_index<0b10, ZPR32, mnemonic>;
+}
+
+class sme2_luti4_vector_index<bits<2> sz, RegisterOperand vector_ty,
+                              string mnemonic>
+    : sme2_luti_vector_index<sz, vector_ty, VectorIndexH, mnemonic> {
+  bits<3> i;
+  let Inst{18-17} = 0b01;
+  let Inst{16-14} = i;
+}
+
+multiclass sme2_luti4_vector_index<string mnemonic> {
+  def _B : sme2_luti4_vector_index<0b00, ZPR8, mnemonic>;
+  def _H : sme2_luti4_vector_index<0b01, ZPR16, mnemonic>;
+  def _S : sme2_luti4_vector_index<0b10, ZPR32, mnemonic>;
+}
+class sme2_luti_vector_vg2_index<bits<2> sz, RegisterOperand vector_ty,
+                                 AsmVectorIndexOpnd index_ty, string mnemonic>
+    : I<(outs vector_ty:$Zd),
+        (ins ZTR:$ZTt, ZPRAny:$Zn, index_ty:$i),
+        mnemonic, "\t$Zd, $ZTt, $Zn$i",
+        "", []>, Sched<[]> {
+  bits<5> Zn;
+  bits<4> Zd;
+  let Inst{31-19} = 0b1100000010001;
+  let Inst{14}    = 0b1;
+  let Inst{13-12} = sz;
+  let Inst{11-10} = 0b00;
+  let Inst{9-5}   = Zn;
+  let Inst{4-1}   = Zd;
+  let Inst{0}     = 0b0;
+}
+
+class sme2_luti2_vector_vg2_index<bits<2> sz, RegisterOperand vector_ty,
+                                  string mnemonic>
+    : sme2_luti_vector_vg2_index<sz, vector_ty, VectorIndexH, mnemonic> {
+  bits<3> i;
+  let Inst{18}    = 0b1;
+  let Inst{17-15} = i;
+}
+
+multiclass sme2_luti2_vector_vg2_index<string mnemonic> {
+  def _B : sme2_luti2_vector_vg2_index<0b00, ZZ_b_mul_r, mnemonic>;
+  def _H : sme2_luti2_vector_vg2_index<0b01, ZZ_h_mul_r, mnemonic>;
+  def _S : sme2_luti2_vector_vg2_index<0b10, ZZ_s_mul_r, mnemonic>;
+}
+
+class sme2_luti4_vector_vg2_index<bits<2> sz, RegisterOperand vector_ty,
+                                 string mnemonic>
+    : sme2_luti_vector_vg2_index<sz, vector_ty, VectorIndexS, mnemonic> {
+  bits<2> i;
+  let Inst{18-17} = 0b01;
+  let Inst{16-15} = i;
+}
+
+multiclass sme2_luti4_vector_vg2_index<string mnemonic> {
+  def _B : sme2_luti4_vector_vg2_index<0b00, ZZ_b_mul_r, mnemonic>;
+  def _H : sme2_luti4_vector_vg2_index<0b01, ZZ_h_mul_r, mnemonic>;
+  def _S : sme2_luti4_vector_vg2_index<0b10, ZZ_s_mul_r, mnemonic>;
+}
+
+class sme2_luti_vector_vg4_index<bits<2> sz, RegisterOperand vector_ty,
+                                 AsmVectorIndexOpnd index_ty, string mnemonic>
+    : I<(outs vector_ty:$Zd),
+        (ins ZTR:$ZTt, ZPRAny:$Zn, index_ty:$i),
+        mnemonic, "\t$Zd, $ZTt, $Zn$i",
+        "", []>, Sched<[]> {
+  bits<5> Zn;
+  bits<3> Zd;
+  let Inst{31-19} = 0b1100000010001;
+  let Inst{15-14} = 0b10;
+  let Inst{13-12} = sz;
+  let Inst{11-10} = 0b00;
+  let Inst{9-5}   = Zn;
+  let Inst{4-2}   = Zd;
+  let Inst{1-0}   = 0b00;
+}
+
+class sme2_luti2_vector_vg4_index<bits<2> sz, RegisterOperand vector_ty,
+                                  string mnemonic>
+    : sme2_luti_vector_vg4_index<sz, vector_ty, VectorIndexS, mnemonic> {
+  bits<2> i;
+  let Inst{18}    = 0b1;
+  let Inst{17-16} = i;
+}
+
+multiclass sme2_luti2_vector_vg4_index<string mnemonic> {
+  def _B : sme2_luti2_vector_vg4_index<0b00, ZZZZ_b_mul_r, mnemonic>;
+  def _H : sme2_luti2_vector_vg4_index<0b01, ZZZZ_h_mul_r, mnemonic>;
+  def _S : sme2_luti2_vector_vg4_index<0b10, ZZZZ_s_mul_r, mnemonic>;
+}
+
+class sme2_luti4_vector_vg4_index<bits<2> sz, RegisterOperand vector_ty,
+                                  string mnemonic>
+    : sme2_luti_vector_vg4_index<sz, vector_ty, VectorIndexD, mnemonic> {
+  bits<1> i;
+  let Inst{18-17} = 0b01;
+  let Inst{16}    = i;
+}
+
+multiclass sme2_luti4_vector_vg4_index<string mnemonic> {
+  def _H : sme2_luti4_vector_vg4_index<0b01, ZZZZ_h_mul_r, mnemonic>;
+  def _S : sme2_luti4_vector_vg4_index<0b10, ZZZZ_s_mul_r, mnemonic>;
+}
diff --git a/llvm/test/MC/AArch64/SME/smopa-diagnostics.s b/llvm/test/MC/AArch64/SME/smopa-diagnostics.s
--- a/llvm/test/MC/AArch64/SME/smopa-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME/smopa-diagnostics.s
@@ -67,7 +67,7 @@
 // expected: .s => .b, .d => .h
 
 smopa za0.s, p0/m, p0/m, z0.h, z0.b
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: smopa za0.s, p0/m, p0/m, z0.h, z0.b
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
diff --git a/llvm/test/MC/AArch64/SME/smops-diagnostics.s b/llvm/test/MC/AArch64/SME/smops-diagnostics.s
--- a/llvm/test/MC/AArch64/SME/smops-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME/smops-diagnostics.s
@@ -67,7 +67,7 @@
 // expected: .s => .b, .d => .h
 
 smops za0.s, p0/m, p0/m, z0.h, z0.b
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: smops za0.s, p0/m, p0/m, z0.h, z0.b
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
diff --git a/llvm/test/MC/AArch64/SME/umopa-diagnostics.s b/llvm/test/MC/AArch64/SME/umopa-diagnostics.s
--- a/llvm/test/MC/AArch64/SME/umopa-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME/umopa-diagnostics.s
@@ -67,7 +67,7 @@
 // expected: .s => .b, .d => .h
 
 umopa za0.s, p0/m, p0/m, z0.h, z0.b
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: umopa za0.s, p0/m, p0/m, z0.h, z0.b
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
diff --git a/llvm/test/MC/AArch64/SME/umops-diagnostics.s b/llvm/test/MC/AArch64/SME/umops-diagnostics.s
--- a/llvm/test/MC/AArch64/SME/umops-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME/umops-diagnostics.s
@@ -67,7 +67,7 @@
 // expected: .s => .b, .d => .h
 
 umops za0.s, p0/m, p0/m, z0.h, z0.b
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: umops za0.s, p0/m, p0/m, z0.h, z0.b
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
diff --git a/llvm/test/MC/AArch64/SME2/bmopa-diagnostics.s b/llvm/test/MC/AArch64/SME2/bmopa-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/bmopa-diagnostics.s
@@ -0,0 +1,35 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid tile
+
+bmopa za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: bmopa za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+bmopa za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: bmopa za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+bmopa za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
+// CHECK-NEXT: bmopa za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid suffixes
+
+bmopa za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
+// CHECK-NEXT: bmopa za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+bmopa za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/bmopa.s b/llvm/test/MC/AArch64/SME2/bmopa.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/bmopa.s
@@ -0,0 +1,86 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+bmopa   za0.s, p0/m, p0/m, z0.s, z0.s  // 10000000-10000000-00000000-00001000
+// CHECK-INST: bmopa   za0.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-ENCODING: [0x08,0x00,0x80,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80800008 <unknown>
+
+bmopa   za1.s, p5/m, p2/m, z10.s, z21.s  // 10000000-10010101-01010101-01001001
+// CHECK-INST: bmopa   za1.s, p5/m, p2/m, z10.s, z21.s
+// CHECK-ENCODING: [0x49,0x55,0x95,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80955549 <unknown>
+
+bmopa   za3.s, p3/m, p7/m, z13.s, z8.s  // 10000000-10001000-11101101-10101011
+// CHECK-INST: bmopa   za3.s, p3/m, p7/m, z13.s, z8.s
+// CHECK-ENCODING: [0xab,0xed,0x88,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 8088edab <unknown>
+
+bmopa   za3.s, p7/m, p7/m, z31.s, z31.s  // 10000000-10011111-11111111-11101011
+// CHECK-INST: bmopa   za3.s, p7/m, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xeb,0xff,0x9f,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809fffeb <unknown>
+
+bmopa   za1.s, p3/m, p0/m, z17.s, z16.s  // 10000000-10010000-00001110-00101001
+// CHECK-INST: bmopa   za1.s, p3/m, p0/m, z17.s, z16.s
+// CHECK-ENCODING: [0x29,0x0e,0x90,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80900e29 <unknown>
+
+bmopa   za1.s, p1/m, p4/m, z1.s, z30.s  // 10000000-10011110-10000100-00101001
+// CHECK-INST: bmopa   za1.s, p1/m, p4/m, z1.s, z30.s
+// CHECK-ENCODING: [0x29,0x84,0x9e,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809e8429 <unknown>
+
+bmopa   za0.s, p5/m, p2/m, z19.s, z20.s  // 10000000-10010100-01010110-01101000
+// CHECK-INST: bmopa   za0.s, p5/m, p2/m, z19.s, z20.s
+// CHECK-ENCODING: [0x68,0x56,0x94,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80945668 <unknown>
+
+bmopa   za0.s, p6/m, p0/m, z12.s, z2.s  // 10000000-10000010-00011001-10001000
+// CHECK-INST: bmopa   za0.s, p6/m, p0/m, z12.s, z2.s
+// CHECK-ENCODING: [0x88,0x19,0x82,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80821988 <unknown>
+
+bmopa   za1.s, p2/m, p6/m, z1.s, z26.s  // 10000000-10011010-11001000-00101001
+// CHECK-INST: bmopa   za1.s, p2/m, p6/m, z1.s, z26.s
+// CHECK-ENCODING: [0x29,0xc8,0x9a,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809ac829 <unknown>
+
+bmopa   za1.s, p2/m, p0/m, z22.s, z30.s  // 10000000-10011110-00001010-11001001
+// CHECK-INST: bmopa   za1.s, p2/m, p0/m, z22.s, z30.s
+// CHECK-ENCODING: [0xc9,0x0a,0x9e,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809e0ac9 <unknown>
+
+bmopa   za2.s, p5/m, p7/m, z9.s, z1.s  // 10000000-10000001-11110101-00101010
+// CHECK-INST: bmopa   za2.s, p5/m, p7/m, z9.s, z1.s
+// CHECK-ENCODING: [0x2a,0xf5,0x81,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 8081f52a <unknown>
+
+bmopa   za3.s, p2/m, p5/m, z12.s, z11.s  // 10000000-10001011-10101001-10001011
+// CHECK-INST: bmopa   za3.s, p2/m, p5/m, z12.s, z11.s
+// CHECK-ENCODING: [0x8b,0xa9,0x8b,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 808ba98b <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/bmops-diagnostics.s b/llvm/test/MC/AArch64/SME2/bmops-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/bmops-diagnostics.s
@@ -0,0 +1,35 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid tile
+
+bmops za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: bmops za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+bmops za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: bmops za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+bmops za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
+// CHECK-NEXT: bmops za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid suffixes
+
+bmops za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
+// CHECK-NEXT: bmops za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+bmops za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/bmops.s b/llvm/test/MC/AArch64/SME2/bmops.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/bmops.s
@@ -0,0 +1,86 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+bmops   za0.s, p0/m, p0/m, z0.s, z0.s  // 10000000-10000000-00000000-00011000
+// CHECK-INST: bmops   za0.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-ENCODING: [0x18,0x00,0x80,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80800018 <unknown>
+
+bmops   za1.s, p5/m, p2/m, z10.s, z21.s  // 10000000-10010101-01010101-01011001
+// CHECK-INST: bmops   za1.s, p5/m, p2/m, z10.s, z21.s
+// CHECK-ENCODING: [0x59,0x55,0x95,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80955559 <unknown>
+
+bmops   za3.s, p3/m, p7/m, z13.s, z8.s  // 10000000-10001000-11101101-10111011
+// CHECK-INST: bmops   za3.s, p3/m, p7/m, z13.s, z8.s
+// CHECK-ENCODING: [0xbb,0xed,0x88,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 8088edbb <unknown>
+
+bmops   za3.s, p7/m, p7/m, z31.s, z31.s  // 10000000-10011111-11111111-11111011
+// CHECK-INST: bmops   za3.s, p7/m, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xfb,0xff,0x9f,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809ffffb <unknown>
+
+bmops   za1.s, p3/m, p0/m, z17.s, z16.s  // 10000000-10010000-00001110-00111001
+// CHECK-INST: bmops   za1.s, p3/m, p0/m, z17.s, z16.s
+// CHECK-ENCODING: [0x39,0x0e,0x90,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80900e39 <unknown>
+
+bmops   za1.s, p1/m, p4/m, z1.s, z30.s  // 10000000-10011110-10000100-00111001
+// CHECK-INST: bmops   za1.s, p1/m, p4/m, z1.s, z30.s
+// CHECK-ENCODING: [0x39,0x84,0x9e,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809e8439 <unknown>
+
+bmops   za0.s, p5/m, p2/m, z19.s, z20.s  // 10000000-10010100-01010110-01111000
+// CHECK-INST: bmops   za0.s, p5/m, p2/m, z19.s, z20.s
+// CHECK-ENCODING: [0x78,0x56,0x94,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80945678 <unknown>
+
+bmops   za0.s, p6/m, p0/m, z12.s, z2.s  // 10000000-10000010-00011001-10011000
+// CHECK-INST: bmops   za0.s, p6/m, p0/m, z12.s, z2.s
+// CHECK-ENCODING: [0x98,0x19,0x82,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 80821998 <unknown>
+
+bmops   za1.s, p2/m, p6/m, z1.s, z26.s  // 10000000-10011010-11001000-00111001
+// CHECK-INST: bmops   za1.s, p2/m, p6/m, z1.s, z26.s
+// CHECK-ENCODING: [0x39,0xc8,0x9a,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809ac839 <unknown>
+
+bmops   za1.s, p2/m, p0/m, z22.s, z30.s  // 10000000-10011110-00001010-11011001
+// CHECK-INST: bmops   za1.s, p2/m, p0/m, z22.s, z30.s
+// CHECK-ENCODING: [0xd9,0x0a,0x9e,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 809e0ad9 <unknown>
+
+bmops   za2.s, p5/m, p7/m, z9.s, z1.s  // 10000000-10000001-11110101-00111010
+// CHECK-INST: bmops   za2.s, p5/m, p7/m, z9.s, z1.s
+// CHECK-ENCODING: [0x3a,0xf5,0x81,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 8081f53a <unknown>
+
+bmops   za3.s, p2/m, p5/m, z12.s, z11.s  // 10000000-10001011-10101001-10011011
+// CHECK-INST: bmops   za3.s, p2/m, p5/m, z12.s, z11.s
+// CHECK-ENCODING: [0x9b,0xa9,0x8b,0x80]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: 808ba99b <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/ldr-diagnostics.s b/llvm/test/MC/AArch64/SME2/ldr-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/ldr-diagnostics.s
@@ -0,0 +1,6 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2  2>&1 < %s| FileCheck %s
+
+ldr zt1, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid lookup table, expected zt0
+// CHECK-NEXT: ldr zt1, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/ldr.s b/llvm/test/MC/AArch64/SME2/ldr.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/ldr.s
@@ -0,0 +1,38 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+ldr     zt0, [x0]  // 11100001-00011111-10000000-00000000
+// CHECK-INST: ldr     zt0, [x0]
+// CHECK-ENCODING: [0x00,0x80,0x1f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e11f8000 <unknown>
+
+ldr     zt0, [x10]  // 11100001-00011111-10000001-01000000
+// CHECK-INST: ldr     zt0, [x10]
+// CHECK-ENCODING: [0x40,0x81,0x1f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e11f8140 <unknown>
+
+ldr     zt0, [x13]  // 11100001-00011111-10000001-10100000
+// CHECK-INST: ldr     zt0, [x13]
+// CHECK-ENCODING: [0xa0,0x81,0x1f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e11f81a0 <unknown>
+
+ldr     zt0, [sp]  // 11100001-00011111-10000011-11100000
+// CHECK-INST: ldr     zt0, [sp]
+// CHECK-ENCODING: [0xe0,0x83,0x1f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e11f83e0 <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/luti2-diagnostics.s b/llvm/test/MC/AArch64/SME2/luti2-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/luti2-diagnostics.s
@@ -0,0 +1,60 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid lane indices
+
+luti2 z0.h, zt0, z0[16]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
+// CHECK-NEXT: luti2 z0.h, zt0, z0[16]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 z0.s, zt0, z0[-1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
+// CHECK-NEXT: luti2 z0.s, zt0, z0[-1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 {z0.b-z1.b}, zt0, z0[8]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
+// CHECK-NEXT: luti2 {z0.b-z1.b}, zt0, z0[8]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 {z0.h-z1.h}, zt0, z0[-1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
+// CHECK-NEXT: luti2 {z0.h-z1.h}, zt0, z0[-1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 {z0.s-z3.s}, zt0, z0[4]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
+// CHECK-NEXT: luti2 {z0.s-z3.s}, zt0, z0[4]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 {z0.b-z3.b}, zt0, z0[-1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
+// CHECK-NEXT: luti2 {z0.b-z3.b}, zt0, z0[-1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid vector lists
+
+luti2 {z0.h-z2.h}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: luti2 {z0.h-z2.h}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 {z1.s-z2.s}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: luti2 {z1.s-z2.s}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti2 {z1.s-z4.s}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
+// CHECK-NEXT: luti2 {z1.s-z4.s}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid vector suffix
+
+luti2 {z0.d-z1.d}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: luti2 {z0.d-z1.d}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/luti2.s b/llvm/test/MC/AArch64/SME2/luti2.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/luti2.s
@@ -0,0 +1,238 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+luti2   z0.h, zt0, z0[0]  // 11000000-11001100-00010000-00000000
+// CHECK-INST: luti2   z0.h, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x10,0xcc,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cc1000 <unknown>
+
+luti2   z21.h, zt0, z10[5]  // 11000000-11001101-01010001-01010101
+// CHECK-INST: luti2   z21.h, zt0, z10[5]
+// CHECK-ENCODING: [0x55,0x51,0xcd,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cd5155 <unknown>
+
+luti2   z23.h, zt0, z13[3]  // 11000000-11001100-11010001-10110111
+// CHECK-INST: luti2   z23.h, zt0, z13[3]
+// CHECK-ENCODING: [0xb7,0xd1,0xcc,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0ccd1b7 <unknown>
+
+luti2   z31.h, zt0, z31[15]  // 11000000-11001111-11010011-11111111
+// CHECK-INST: luti2   z31.h, zt0, z31[15]
+// CHECK-ENCODING: [0xff,0xd3,0xcf,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cfd3ff <unknown>
+
+
+luti2   z0.s, zt0, z0[0]  // 11000000-11001100-00100000-00000000
+// CHECK-INST: luti2   z0.s, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x20,0xcc,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cc2000 <unknown>
+
+luti2   z21.s, zt0, z10[5]  // 11000000-11001101-01100001-01010101
+// CHECK-INST: luti2   z21.s, zt0, z10[5]
+// CHECK-ENCODING: [0x55,0x61,0xcd,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cd6155 <unknown>
+
+luti2   z23.s, zt0, z13[3]  // 11000000-11001100-11100001-10110111
+// CHECK-INST: luti2   z23.s, zt0, z13[3]
+// CHECK-ENCODING: [0xb7,0xe1,0xcc,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cce1b7 <unknown>
+
+luti2   z31.s, zt0, z31[15]  // 11000000-11001111-11100011-11111111
+// CHECK-INST: luti2   z31.s, zt0, z31[15]
+// CHECK-ENCODING: [0xff,0xe3,0xcf,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cfe3ff <unknown>
+
+
+luti2   z0.b, zt0, z0[0]  // 11000000-11001100-00000000-00000000
+// CHECK-INST: luti2   z0.b, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x00,0xcc,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cc0000 <unknown>
+
+luti2   z21.b, zt0, z10[5]  // 11000000-11001101-01000001-01010101
+// CHECK-INST: luti2   z21.b, zt0, z10[5]
+// CHECK-ENCODING: [0x55,0x41,0xcd,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cd4155 <unknown>
+
+luti2   z23.b, zt0, z13[3]  // 11000000-11001100-11000001-10110111
+// CHECK-INST: luti2   z23.b, zt0, z13[3]
+// CHECK-ENCODING: [0xb7,0xc1,0xcc,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0ccc1b7 <unknown>
+
+luti2   z31.b, zt0, z31[15]  // 11000000-11001111-11000011-11111111
+// CHECK-INST: luti2   z31.b, zt0, z31[15]
+// CHECK-ENCODING: [0xff,0xc3,0xcf,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cfc3ff <unknown>
+
+
+luti2   {z0.h - z1.h}, zt0, z0[0]  // 11000000-10001100-01010000-00000000
+// CHECK-INST: luti2   { z0.h, z1.h }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x50,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c5000 <unknown>
+
+luti2   {z20.h - z21.h}, zt0, z10[2]  // 11000000-10001101-01010001-01010100
+// CHECK-INST: luti2   { z20.h, z21.h }, zt0, z10[2]
+// CHECK-ENCODING: [0x54,0x51,0x8d,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08d5154 <unknown>
+
+luti2   {z22.h - z23.h}, zt0, z13[1]  // 11000000-10001100-11010001-10110110
+// CHECK-INST: luti2   { z22.h, z23.h }, zt0, z13[1]
+// CHECK-ENCODING: [0xb6,0xd1,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08cd1b6 <unknown>
+
+luti2   {z30.h - z31.h}, zt0, z31[7]  // 11000000-10001111-11010011-11111110
+// CHECK-INST: luti2   { z30.h, z31.h }, zt0, z31[7]
+// CHECK-ENCODING: [0xfe,0xd3,0x8f,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08fd3fe <unknown>
+
+
+luti2   {z0.s - z1.s}, zt0, z0[0]  // 11000000-10001100-01100000-00000000
+// CHECK-INST: luti2   { z0.s, z1.s }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x60,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c6000 <unknown>
+
+luti2   {z20.s - z21.s}, zt0, z10[2]  // 11000000-10001101-01100001-01010100
+// CHECK-INST: luti2   { z20.s, z21.s }, zt0, z10[2]
+// CHECK-ENCODING: [0x54,0x61,0x8d,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08d6154 <unknown>
+
+luti2   {z22.s - z23.s}, zt0, z13[1]  // 11000000-10001100-11100001-10110110
+// CHECK-INST: luti2   { z22.s, z23.s }, zt0, z13[1]
+// CHECK-ENCODING: [0xb6,0xe1,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ce1b6 <unknown>
+
+luti2   {z30.s - z31.s}, zt0, z31[7]  // 11000000-10001111-11100011-11111110
+// CHECK-INST: luti2   { z30.s, z31.s }, zt0, z31[7]
+// CHECK-ENCODING: [0xfe,0xe3,0x8f,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08fe3fe <unknown>
+
+
+luti2   {z0.b - z1.b}, zt0, z0[0]  // 11000000-10001100-01000000-00000000
+// CHECK-INST: luti2   { z0.b, z1.b }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x40,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c4000 <unknown>
+
+luti2   {z20.b - z21.b}, zt0, z10[2]  // 11000000-10001101-01000001-01010100
+// CHECK-INST: luti2   { z20.b, z21.b }, zt0, z10[2]
+// CHECK-ENCODING: [0x54,0x41,0x8d,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08d4154 <unknown>
+
+luti2   {z22.b - z23.b}, zt0, z13[1]  // 11000000-10001100-11000001-10110110
+// CHECK-INST: luti2   { z22.b, z23.b }, zt0, z13[1]
+// CHECK-ENCODING: [0xb6,0xc1,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08cc1b6 <unknown>
+
+luti2   {z30.b - z31.b}, zt0, z31[7]  // 11000000-10001111-11000011-11111110
+// CHECK-INST: luti2   { z30.b, z31.b }, zt0, z31[7]
+// CHECK-ENCODING: [0xfe,0xc3,0x8f,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08fc3fe <unknown>
+
+
+luti2   {z0.h - z3.h}, zt0, z0[0]  // 11000000-10001100-10010000-00000000
+// CHECK-INST: luti2   { z0.h - z3.h }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x90,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c9000 <unknown>
+
+luti2   {z20.h - z23.h}, zt0, z10[1]  // 11000000-10001101-10010001-01010100
+// CHECK-INST: luti2   { z20.h - z23.h }, zt0, z10[1]
+// CHECK-ENCODING: [0x54,0x91,0x8d,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08d9154 <unknown>
+
+luti2   {z20.h - z23.h}, zt0, z13[0]  // 11000000-10001100-10010001-10110100
+// CHECK-INST: luti2   { z20.h - z23.h }, zt0, z13[0]
+// CHECK-ENCODING: [0xb4,0x91,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c91b4 <unknown>
+
+luti2   {z28.h - z31.h}, zt0, z31[3]  // 11000000-10001111-10010011-11111100
+// CHECK-INST: luti2   { z28.h - z31.h }, zt0, z31[3]
+// CHECK-ENCODING: [0xfc,0x93,0x8f,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08f93fc <unknown>
+
+
+luti2   {z0.s - z3.s}, zt0, z0[0]  // 11000000-10001100-10100000-00000000
+// CHECK-INST: luti2   { z0.s - z3.s }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0xa0,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ca000 <unknown>
+
+luti2   {z20.s - z23.s}, zt0, z10[1]  // 11000000-10001101-10100001-01010100
+// CHECK-INST: luti2   { z20.s - z23.s }, zt0, z10[1]
+// CHECK-ENCODING: [0x54,0xa1,0x8d,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08da154 <unknown>
+
+luti2   {z20.s - z23.s}, zt0, z13[0]  // 11000000-10001100-10100001-10110100
+// CHECK-INST: luti2   { z20.s - z23.s }, zt0, z13[0]
+// CHECK-ENCODING: [0xb4,0xa1,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ca1b4 <unknown>
+
+luti2   {z28.s - z31.s}, zt0, z31[3]  // 11000000-10001111-10100011-11111100
+// CHECK-INST: luti2   { z28.s - z31.s }, zt0, z31[3]
+// CHECK-ENCODING: [0xfc,0xa3,0x8f,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08fa3fc <unknown>
+
+
+luti2   {z0.b - z3.b}, zt0, z0[0]  // 11000000-10001100-10000000-00000000
+// CHECK-INST: luti2   { z0.b - z3.b }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x80,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c8000 <unknown>
+
+luti2   {z20.b - z23.b}, zt0, z10[1]  // 11000000-10001101-10000001-01010100
+// CHECK-INST: luti2   { z20.b - z23.b }, zt0, z10[1]
+// CHECK-ENCODING: [0x54,0x81,0x8d,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08d8154 <unknown>
+
+luti2   {z20.b - z23.b}, zt0, z13[0]  // 11000000-10001100-10000001-10110100
+// CHECK-INST: luti2   { z20.b - z23.b }, zt0, z13[0]
+// CHECK-ENCODING: [0xb4,0x81,0x8c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08c81b4 <unknown>
+
+luti2   {z28.b - z31.b}, zt0, z31[3]  // 11000000-10001111-10000011-11111100
+// CHECK-INST: luti2   { z28.b - z31.b }, zt0, z31[3]
+// CHECK-ENCODING: [0xfc,0x83,0x8f,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08f83fc <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/luti4-diagnostics.s b/llvm/test/MC/AArch64/SME2/luti4-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/luti4-diagnostics.s
@@ -0,0 +1,60 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid lane indices
+
+luti4 z0.h, zt0, z0[8]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
+// CHECK-NEXT: luti4 z0.h, zt0, z0[8]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 z0.s, zt0, z0[-1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
+// CHECK-NEXT: luti4 z0.s, zt0, z0[-1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 {z0.b-z1.b}, zt0, z0[4]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
+// CHECK-NEXT: luti4 {z0.b-z1.b}, zt0, z0[4]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 {z0.h-z1.h}, zt0, z0[-1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
+// CHECK-NEXT: luti4 {z0.h-z1.h}, zt0, z0[-1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 {z0.s-z3.s}, zt0, z0[2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
+// CHECK-NEXT: luti4 {z0.s-z3.s}, zt0, z0[2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 {z0.h-z3.h}, zt0, z0[-1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
+// CHECK-NEXT: luti4 {z0.h-z3.h}, zt0, z0[-1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid vector lists
+
+luti4 {z0.h-z2.h}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: luti4 {z0.h-z2.h}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 {z1.s-z2.s}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: luti4 {z1.s-z2.s}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+luti4 {z1.s-z4.s}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
+// CHECK-NEXT: luti4 {z1.s-z4.s}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid vector suffix
+
+luti4 {z0.d-z1.d}, zt0, z0[3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: luti4 {z0.d-z1.d}, zt0, z0[3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/luti4.s b/llvm/test/MC/AArch64/SME2/luti4.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/luti4.s
@@ -0,0 +1,213 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+luti4   z0.h, zt0, z0[0]  // 11000000-11001010-00010000-00000000
+// CHECK-INST: luti4   z0.h, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x10,0xca,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0ca1000 <unknown>
+
+luti4   z21.h, zt0, z10[5]  // 11000000-11001011-01010001-01010101
+// CHECK-INST: luti4   z21.h, zt0, z10[5]
+// CHECK-ENCODING: [0x55,0x51,0xcb,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cb5155 <unknown>
+
+luti4   z23.h, zt0, z13[3]  // 11000000-11001010-11010001-10110111
+// CHECK-INST: luti4   z23.h, zt0, z13[3]
+// CHECK-ENCODING: [0xb7,0xd1,0xca,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cad1b7 <unknown>
+
+luti4   z31.h, zt0, z31[7]  // 11000000-11001011-11010011-11111111
+// CHECK-INST: luti4   z31.h, zt0, z31[7]
+// CHECK-ENCODING: [0xff,0xd3,0xcb,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cbd3ff <unknown>
+
+
+luti4   z0.s, zt0, z0[0]  // 11000000-11001010-00100000-00000000
+// CHECK-INST: luti4   z0.s, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x20,0xca,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0ca2000 <unknown>
+
+luti4   z21.s, zt0, z10[5]  // 11000000-11001011-01100001-01010101
+// CHECK-INST: luti4   z21.s, zt0, z10[5]
+// CHECK-ENCODING: [0x55,0x61,0xcb,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cb6155 <unknown>
+
+luti4   z23.s, zt0, z13[3]  // 11000000-11001010-11100001-10110111
+// CHECK-INST: luti4   z23.s, zt0, z13[3]
+// CHECK-ENCODING: [0xb7,0xe1,0xca,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cae1b7 <unknown>
+
+luti4   z31.s, zt0, z31[7]  // 11000000-11001011-11100011-11111111
+// CHECK-INST: luti4   z31.s, zt0, z31[7]
+// CHECK-ENCODING: [0xff,0xe3,0xcb,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cbe3ff <unknown>
+
+
+luti4   z0.b, zt0, z0[0]  // 11000000-11001010-00000000-00000000
+// CHECK-INST: luti4   z0.b, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x00,0xca,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0ca0000 <unknown>
+
+luti4   z21.b, zt0, z10[5]  // 11000000-11001011-01000001-01010101
+// CHECK-INST: luti4   z21.b, zt0, z10[5]
+// CHECK-ENCODING: [0x55,0x41,0xcb,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cb4155 <unknown>
+
+luti4   z23.b, zt0, z13[3]  // 11000000-11001010-11000001-10110111
+// CHECK-INST: luti4   z23.b, zt0, z13[3]
+// CHECK-ENCODING: [0xb7,0xc1,0xca,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cac1b7 <unknown>
+
+luti4   z31.b, zt0, z31[7]  // 11000000-11001011-11000011-11111111
+// CHECK-INST: luti4   z31.b, zt0, z31[7]
+// CHECK-ENCODING: [0xff,0xc3,0xcb,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0cbc3ff <unknown>
+
+
+luti4   {z0.h - z1.h}, zt0, z0[0]  // 11000000-10001010-01010000-00000000
+// CHECK-INST: luti4   { z0.h, z1.h }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x50,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08a5000 <unknown>
+
+luti4   {z20.h - z21.h}, zt0, z10[2]  // 11000000-10001011-01010001-01010100
+// CHECK-INST: luti4   { z20.h, z21.h }, zt0, z10[2]
+// CHECK-ENCODING: [0x54,0x51,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08b5154 <unknown>
+
+luti4   {z22.h - z23.h}, zt0, z13[1]  // 11000000-10001010-11010001-10110110
+// CHECK-INST: luti4   { z22.h, z23.h }, zt0, z13[1]
+// CHECK-ENCODING: [0xb6,0xd1,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ad1b6 <unknown>
+
+luti4   {z30.h - z31.h}, zt0, z31[3]  // 11000000-10001011-11010011-11111110
+// CHECK-INST: luti4   { z30.h, z31.h }, zt0, z31[3]
+// CHECK-ENCODING: [0xfe,0xd3,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08bd3fe <unknown>
+
+
+luti4   {z0.s - z1.s}, zt0, z0[0]  // 11000000-10001010-01100000-00000000
+// CHECK-INST: luti4   { z0.s, z1.s }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x60,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08a6000 <unknown>
+
+luti4   {z20.s - z21.s}, zt0, z10[2]  // 11000000-10001011-01100001-01010100
+// CHECK-INST: luti4   { z20.s, z21.s }, zt0, z10[2]
+// CHECK-ENCODING: [0x54,0x61,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08b6154 <unknown>
+
+luti4   {z22.s - z23.s}, zt0, z13[1]  // 11000000-10001010-11100001-10110110
+// CHECK-INST: luti4   { z22.s, z23.s }, zt0, z13[1]
+// CHECK-ENCODING: [0xb6,0xe1,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ae1b6 <unknown>
+
+luti4   {z30.s - z31.s}, zt0, z31[3]  // 11000000-10001011-11100011-11111110
+// CHECK-INST: luti4   { z30.s, z31.s }, zt0, z31[3]
+// CHECK-ENCODING: [0xfe,0xe3,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08be3fe <unknown>
+
+
+luti4   {z0.b - z1.b}, zt0, z0[0]  // 11000000-10001010-01000000-00000000
+// CHECK-INST: luti4   { z0.b, z1.b }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x40,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08a4000 <unknown>
+
+luti4   {z20.b - z21.b}, zt0, z10[2]  // 11000000-10001011-01000001-01010100
+// CHECK-INST: luti4   { z20.b, z21.b }, zt0, z10[2]
+// CHECK-ENCODING: [0x54,0x41,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08b4154 <unknown>
+
+luti4   {z22.b - z23.b}, zt0, z13[1]  // 11000000-10001010-11000001-10110110
+// CHECK-INST: luti4   { z22.b, z23.b }, zt0, z13[1]
+// CHECK-ENCODING: [0xb6,0xc1,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ac1b6 <unknown>
+
+luti4   {z30.b - z31.b}, zt0, z31[3]  // 11000000-10001011-11000011-11111110
+// CHECK-INST: luti4   { z30.b, z31.b }, zt0, z31[3]
+// CHECK-ENCODING: [0xfe,0xc3,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08bc3fe <unknown>
+
+
+luti4   {z0.h - z3.h}, zt0, z0[0]  // 11000000-10001010-10010000-00000000
+// CHECK-INST: luti4   { z0.h - z3.h }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0x90,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08a9000 <unknown>
+
+luti4   {z20.h - z23.h}, zt0, z10[1]  // 11000000-10001011-10010001-01010100
+// CHECK-INST: luti4   { z20.h - z23.h }, zt0, z10[1]
+// CHECK-ENCODING: [0x54,0x91,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08b9154 <unknown>
+
+luti4   {z20.h - z23.h}, zt0, z13[0]  // 11000000-10001010-10010001-10110100
+// CHECK-INST: luti4   { z20.h - z23.h }, zt0, z13[0]
+// CHECK-ENCODING: [0xb4,0x91,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08a91b4 <unknown>
+
+luti4   {z28.h - z31.h}, zt0, z31[1]  // 11000000-10001011-10010011-11111100
+// CHECK-INST: luti4   { z28.h - z31.h }, zt0, z31[1]
+// CHECK-ENCODING: [0xfc,0x93,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08b93fc <unknown>
+
+
+luti4   {z0.s - z3.s}, zt0, z0[0]  // 11000000-10001010-10100000-00000000
+// CHECK-INST: luti4   { z0.s - z3.s }, zt0, z0[0]
+// CHECK-ENCODING: [0x00,0xa0,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08aa000 <unknown>
+
+luti4   {z20.s - z23.s}, zt0, z10[1]  // 11000000-10001011-10100001-01010100
+// CHECK-INST: luti4   { z20.s - z23.s }, zt0, z10[1]
+// CHECK-ENCODING: [0x54,0xa1,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ba154 <unknown>
+
+luti4   {z20.s - z23.s}, zt0, z13[0]  // 11000000-10001010-10100001-10110100
+// CHECK-INST: luti4   { z20.s - z23.s }, zt0, z13[0]
+// CHECK-ENCODING: [0xb4,0xa1,0x8a,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08aa1b4 <unknown>
+
+luti4   {z28.s - z31.s}, zt0, z31[1]  // 11000000-10001011-10100011-11111100
+// CHECK-INST: luti4   { z28.s - z31.s }, zt0, z31[1]
+// CHECK-ENCODING: [0xfc,0xa3,0x8b,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c08ba3fc <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/movt-diagnostics.s b/llvm/test/MC/AArch64/SME2/movt-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/movt-diagnostics.s
@@ -0,0 +1,32 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s| FileCheck %s
+
+// index must be a multiple of 8 in range [0, 56].
+// --------------------------------------------------------------------------//
+
+movt x0, zt0[57]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 56].
+// CHECK-NEXT: movt x0, zt0[57]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movt x0, zt0[58]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 56].
+// CHECK-NEXT: movt x0, zt0[58]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movt x0, zt0[64]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 56].
+// CHECK-NEXT: movt x0, zt0[64]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movt x0, zt0[72]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 56].
+// CHECK-NEXT: movt x0, zt0[72]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid zt0 register
+
+movt x0, zt1[0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected token in argument list
+// CHECK-NEXT: movt x0, zt1[0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/movt.s b/llvm/test/MC/AArch64/SME2/movt.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/movt.s
@@ -0,0 +1,63 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+movt    x0, zt0[0]  // 11000000-01001100-00000011-11100000
+// CHECK-INST: movt    x0, zt0[0]
+// CHECK-ENCODING: [0xe0,0x03,0x4c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04c03e0 <unknown>
+
+movt    x21, zt0[40]  // 11000000-01001100-01010011-11110101
+// CHECK-INST: movt    x21, zt0[40]
+// CHECK-ENCODING: [0xf5,0x53,0x4c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04c53f5 <unknown>
+
+movt    x23, zt0[48]  // 11000000-01001100-01100011-11110111
+// CHECK-INST: movt    x23, zt0[48]
+// CHECK-ENCODING: [0xf7,0x63,0x4c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04c63f7 <unknown>
+
+movt    xzr, zt0[56]  // 11000000-01001100-01110011-11111111
+// CHECK-INST: movt    xzr, zt0[56]
+// CHECK-ENCODING: [0xff,0x73,0x4c,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04c73ff <unknown>
+
+
+movt    zt0[0], x0  // 11000000-01001110-00000011-11100000
+// CHECK-INST: movt    zt0[0], x0
+// CHECK-ENCODING: [0xe0,0x03,0x4e,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04e03e0 <unknown>
+
+movt    zt0[40], x21  // 11000000-01001110-01010011-11110101
+// CHECK-INST: movt    zt0[40], x21
+// CHECK-ENCODING: [0xf5,0x53,0x4e,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04e53f5 <unknown>
+
+movt    zt0[48], x23  // 11000000-01001110-01100011-11110111
+// CHECK-INST: movt    zt0[48], x23
+// CHECK-ENCODING: [0xf7,0x63,0x4e,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04e63f7 <unknown>
+
+movt    zt0[56], xzr  // 11000000-01001110-01110011-11111111
+// CHECK-INST: movt    zt0[56], xzr
+// CHECK-ENCODING: [0xff,0x73,0x4e,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c04e73ff <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/smopa-diagnostics.s b/llvm/test/MC/AArch64/SME2/smopa-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/smopa-diagnostics.s
@@ -0,0 +1,35 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid tile
+
+smopa za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: smopa za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+smopa za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: smopa za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smopa za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
+// CHECK-NEXT: smopa za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid suffixes
+
+smopa za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
+// CHECK-NEXT: smopa za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smopa za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/smopa.s b/llvm/test/MC/AArch64/SME2/smopa.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/smopa.s
@@ -0,0 +1,86 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+smopa   za0.s, p0/m, p0/m, z0.h, z0.h  // 10100000-10000000-00000000-00001000
+// CHECK-INST: smopa   za0.s, p0/m, p0/m, z0.h, z0.h
+// CHECK-ENCODING: [0x08,0x00,0x80,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0800008 <unknown>
+
+smopa   za1.s, p5/m, p2/m, z10.h, z21.h  // 10100000-10010101-01010101-01001001
+// CHECK-INST: smopa   za1.s, p5/m, p2/m, z10.h, z21.h
+// CHECK-ENCODING: [0x49,0x55,0x95,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0955549 <unknown>
+
+smopa   za3.s, p3/m, p7/m, z13.h, z8.h  // 10100000-10001000-11101101-10101011
+// CHECK-INST: smopa   za3.s, p3/m, p7/m, z13.h, z8.h
+// CHECK-ENCODING: [0xab,0xed,0x88,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a088edab <unknown>
+
+smopa   za3.s, p7/m, p7/m, z31.h, z31.h  // 10100000-10011111-11111111-11101011
+// CHECK-INST: smopa   za3.s, p7/m, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xeb,0xff,0x9f,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09fffeb <unknown>
+
+smopa   za1.s, p3/m, p0/m, z17.h, z16.h  // 10100000-10010000-00001110-00101001
+// CHECK-INST: smopa   za1.s, p3/m, p0/m, z17.h, z16.h
+// CHECK-ENCODING: [0x29,0x0e,0x90,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0900e29 <unknown>
+
+smopa   za1.s, p1/m, p4/m, z1.h, z30.h  // 10100000-10011110-10000100-00101001
+// CHECK-INST: smopa   za1.s, p1/m, p4/m, z1.h, z30.h
+// CHECK-ENCODING: [0x29,0x84,0x9e,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09e8429 <unknown>
+
+smopa   za0.s, p5/m, p2/m, z19.h, z20.h  // 10100000-10010100-01010110-01101000
+// CHECK-INST: smopa   za0.s, p5/m, p2/m, z19.h, z20.h
+// CHECK-ENCODING: [0x68,0x56,0x94,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0945668 <unknown>
+
+smopa   za0.s, p6/m, p0/m, z12.h, z2.h  // 10100000-10000010-00011001-10001000
+// CHECK-INST: smopa   za0.s, p6/m, p0/m, z12.h, z2.h
+// CHECK-ENCODING: [0x88,0x19,0x82,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0821988 <unknown>
+
+smopa   za1.s, p2/m, p6/m, z1.h, z26.h  // 10100000-10011010-11001000-00101001
+// CHECK-INST: smopa   za1.s, p2/m, p6/m, z1.h, z26.h
+// CHECK-ENCODING: [0x29,0xc8,0x9a,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09ac829 <unknown>
+
+smopa   za1.s, p2/m, p0/m, z22.h, z30.h  // 10100000-10011110-00001010-11001001
+// CHECK-INST: smopa   za1.s, p2/m, p0/m, z22.h, z30.h
+// CHECK-ENCODING: [0xc9,0x0a,0x9e,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09e0ac9 <unknown>
+
+smopa   za2.s, p5/m, p7/m, z9.h, z1.h  // 10100000-10000001-11110101-00101010
+// CHECK-INST: smopa   za2.s, p5/m, p7/m, z9.h, z1.h
+// CHECK-ENCODING: [0x2a,0xf5,0x81,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a081f52a <unknown>
+
+smopa   za3.s, p2/m, p5/m, z12.h, z11.h  // 10100000-10001011-10101001-10001011
+// CHECK-INST: smopa   za3.s, p2/m, p5/m, z12.h, z11.h
+// CHECK-ENCODING: [0x8b,0xa9,0x8b,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a08ba98b <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/smops-diagnostics.s b/llvm/test/MC/AArch64/SME2/smops-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/smops-diagnostics.s
@@ -0,0 +1,35 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid tile
+
+smops za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: smops za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+smops za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: smops za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smops za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
+// CHECK-NEXT: smops za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid suffixes
+
+smops za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
+// CHECK-NEXT: smops za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smops za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/smops.s b/llvm/test/MC/AArch64/SME2/smops.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/smops.s
@@ -0,0 +1,86 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+smops   za0.s, p0/m, p0/m, z0.h, z0.h  // 10100000-10000000-00000000-00011000
+// CHECK-INST: smops   za0.s, p0/m, p0/m, z0.h, z0.h
+// CHECK-ENCODING: [0x18,0x00,0x80,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0800018 <unknown>
+
+smops   za1.s, p5/m, p2/m, z10.h, z21.h  // 10100000-10010101-01010101-01011001
+// CHECK-INST: smops   za1.s, p5/m, p2/m, z10.h, z21.h
+// CHECK-ENCODING: [0x59,0x55,0x95,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0955559 <unknown>
+
+smops   za3.s, p3/m, p7/m, z13.h, z8.h  // 10100000-10001000-11101101-10111011
+// CHECK-INST: smops   za3.s, p3/m, p7/m, z13.h, z8.h
+// CHECK-ENCODING: [0xbb,0xed,0x88,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a088edbb <unknown>
+
+smops   za3.s, p7/m, p7/m, z31.h, z31.h  // 10100000-10011111-11111111-11111011
+// CHECK-INST: smops   za3.s, p7/m, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xfb,0xff,0x9f,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09ffffb <unknown>
+
+smops   za1.s, p3/m, p0/m, z17.h, z16.h  // 10100000-10010000-00001110-00111001
+// CHECK-INST: smops   za1.s, p3/m, p0/m, z17.h, z16.h
+// CHECK-ENCODING: [0x39,0x0e,0x90,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0900e39 <unknown>
+
+smops   za1.s, p1/m, p4/m, z1.h, z30.h  // 10100000-10011110-10000100-00111001
+// CHECK-INST: smops   za1.s, p1/m, p4/m, z1.h, z30.h
+// CHECK-ENCODING: [0x39,0x84,0x9e,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09e8439 <unknown>
+
+smops   za0.s, p5/m, p2/m, z19.h, z20.h  // 10100000-10010100-01010110-01111000
+// CHECK-INST: smops   za0.s, p5/m, p2/m, z19.h, z20.h
+// CHECK-ENCODING: [0x78,0x56,0x94,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0945678 <unknown>
+
+smops   za0.s, p6/m, p0/m, z12.h, z2.h  // 10100000-10000010-00011001-10011000
+// CHECK-INST: smops   za0.s, p6/m, p0/m, z12.h, z2.h
+// CHECK-ENCODING: [0x98,0x19,0x82,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a0821998 <unknown>
+
+smops   za1.s, p2/m, p6/m, z1.h, z26.h  // 10100000-10011010-11001000-00111001
+// CHECK-INST: smops   za1.s, p2/m, p6/m, z1.h, z26.h
+// CHECK-ENCODING: [0x39,0xc8,0x9a,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09ac839 <unknown>
+
+smops   za1.s, p2/m, p0/m, z22.h, z30.h  // 10100000-10011110-00001010-11011001
+// CHECK-INST: smops   za1.s, p2/m, p0/m, z22.h, z30.h
+// CHECK-ENCODING: [0xd9,0x0a,0x9e,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a09e0ad9 <unknown>
+
+smops   za2.s, p5/m, p7/m, z9.h, z1.h  // 10100000-10000001-11110101-00111010
+// CHECK-INST: smops   za2.s, p5/m, p7/m, z9.h, z1.h
+// CHECK-ENCODING: [0x3a,0xf5,0x81,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a081f53a <unknown>
+
+smops   za3.s, p2/m, p5/m, z12.h, z11.h  // 10100000-10001011-10101001-10011011
+// CHECK-INST: smops   za3.s, p2/m, p5/m, z12.h, z11.h
+// CHECK-ENCODING: [0x9b,0xa9,0x8b,0xa0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a08ba99b <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/str-diagnostics.s b/llvm/test/MC/AArch64/SME2/str-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/str-diagnostics.s
@@ -0,0 +1,6 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2  2>&1 < %s| FileCheck %s
+
+str zt, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid lookup table, expected zt0
+// CHECK-NEXT: str zt, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/str.s b/llvm/test/MC/AArch64/SME2/str.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/str.s
@@ -0,0 +1,38 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+str     zt0, [x0]  // 11100001-00111111-10000000-00000000
+// CHECK-INST: str     zt0, [x0]
+// CHECK-ENCODING: [0x00,0x80,0x3f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e13f8000 <unknown>
+
+str     zt0, [x10]  // 11100001-00111111-10000001-01000000
+// CHECK-INST: str     zt0, [x10]
+// CHECK-ENCODING: [0x40,0x81,0x3f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e13f8140 <unknown>
+
+str     zt0, [x13]  // 11100001-00111111-10000001-10100000
+// CHECK-INST: str     zt0, [x13]
+// CHECK-ENCODING: [0xa0,0x81,0x3f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e13f81a0 <unknown>
+
+str     zt0, [sp]  // 11100001-00111111-10000011-11100000
+// CHECK-INST: str     zt0, [sp]
+// CHECK-ENCODING: [0xe0,0x83,0x3f,0xe1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: e13f83e0 <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/umopa-diagnostics.s b/llvm/test/MC/AArch64/SME2/umopa-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/umopa-diagnostics.s
@@ -0,0 +1,35 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid tile
+
+umopa za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: umopa za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+umopa za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: umopa za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umopa za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
+// CHECK-NEXT: umopa za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid suffixes
+
+umopa za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
+// CHECK-NEXT: umopa za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umopa za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/umopa.s b/llvm/test/MC/AArch64/SME2/umopa.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/umopa.s
@@ -0,0 +1,86 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+umopa   za0.s, p0/m, p0/m, z0.h, z0.h  // 10100001-10000000-00000000-00001000
+// CHECK-INST: umopa   za0.s, p0/m, p0/m, z0.h, z0.h
+// CHECK-ENCODING: [0x08,0x00,0x80,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1800008 <unknown>
+
+umopa   za1.s, p5/m, p2/m, z10.h, z21.h  // 10100001-10010101-01010101-01001001
+// CHECK-INST: umopa   za1.s, p5/m, p2/m, z10.h, z21.h
+// CHECK-ENCODING: [0x49,0x55,0x95,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1955549 <unknown>
+
+umopa   za3.s, p3/m, p7/m, z13.h, z8.h  // 10100001-10001000-11101101-10101011
+// CHECK-INST: umopa   za3.s, p3/m, p7/m, z13.h, z8.h
+// CHECK-ENCODING: [0xab,0xed,0x88,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a188edab <unknown>
+
+umopa   za3.s, p7/m, p7/m, z31.h, z31.h  // 10100001-10011111-11111111-11101011
+// CHECK-INST: umopa   za3.s, p7/m, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xeb,0xff,0x9f,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19fffeb <unknown>
+
+umopa   za1.s, p3/m, p0/m, z17.h, z16.h  // 10100001-10010000-00001110-00101001
+// CHECK-INST: umopa   za1.s, p3/m, p0/m, z17.h, z16.h
+// CHECK-ENCODING: [0x29,0x0e,0x90,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1900e29 <unknown>
+
+umopa   za1.s, p1/m, p4/m, z1.h, z30.h  // 10100001-10011110-10000100-00101001
+// CHECK-INST: umopa   za1.s, p1/m, p4/m, z1.h, z30.h
+// CHECK-ENCODING: [0x29,0x84,0x9e,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19e8429 <unknown>
+
+umopa   za0.s, p5/m, p2/m, z19.h, z20.h  // 10100001-10010100-01010110-01101000
+// CHECK-INST: umopa   za0.s, p5/m, p2/m, z19.h, z20.h
+// CHECK-ENCODING: [0x68,0x56,0x94,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1945668 <unknown>
+
+umopa   za0.s, p6/m, p0/m, z12.h, z2.h  // 10100001-10000010-00011001-10001000
+// CHECK-INST: umopa   za0.s, p6/m, p0/m, z12.h, z2.h
+// CHECK-ENCODING: [0x88,0x19,0x82,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1821988 <unknown>
+
+umopa   za1.s, p2/m, p6/m, z1.h, z26.h  // 10100001-10011010-11001000-00101001
+// CHECK-INST: umopa   za1.s, p2/m, p6/m, z1.h, z26.h
+// CHECK-ENCODING: [0x29,0xc8,0x9a,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19ac829 <unknown>
+
+umopa   za1.s, p2/m, p0/m, z22.h, z30.h  // 10100001-10011110-00001010-11001001
+// CHECK-INST: umopa   za1.s, p2/m, p0/m, z22.h, z30.h
+// CHECK-ENCODING: [0xc9,0x0a,0x9e,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19e0ac9 <unknown>
+
+umopa   za2.s, p5/m, p7/m, z9.h, z1.h  // 10100001-10000001-11110101-00101010
+// CHECK-INST: umopa   za2.s, p5/m, p7/m, z9.h, z1.h
+// CHECK-ENCODING: [0x2a,0xf5,0x81,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a181f52a <unknown>
+
+umopa   za3.s, p2/m, p5/m, z12.h, z11.h  // 10100001-10001011-10101001-10001011
+// CHECK-INST: umopa   za3.s, p2/m, p5/m, z12.h, z11.h
+// CHECK-ENCODING: [0x8b,0xa9,0x8b,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a18ba98b <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/umops-diagnostics.s b/llvm/test/MC/AArch64/SME2/umops-diagnostics.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/umops-diagnostics.s
@@ -0,0 +1,35 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid tile
+
+umops za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: umops za8.s, p0/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+umops za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: umops za0.s, p0/z, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umops za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
+// CHECK-NEXT: umops za0.s, p15/m, p0/m, z0.s, z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Invalid suffixes
+
+umops za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-3].s
+// CHECK-NEXT: umops za0.d, p0/z, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umops za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: za0.s, p0/m, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SME2/umops.s b/llvm/test/MC/AArch64/SME2/umops.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/umops.s
@@ -0,0 +1,86 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+umops   za0.s, p0/m, p0/m, z0.h, z0.h  // 10100001-10000000-00000000-00011000
+// CHECK-INST: umops   za0.s, p0/m, p0/m, z0.h, z0.h
+// CHECK-ENCODING: [0x18,0x00,0x80,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1800018 <unknown>
+
+umops   za1.s, p5/m, p2/m, z10.h, z21.h  // 10100001-10010101-01010101-01011001
+// CHECK-INST: umops   za1.s, p5/m, p2/m, z10.h, z21.h
+// CHECK-ENCODING: [0x59,0x55,0x95,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1955559 <unknown>
+
+umops   za3.s, p3/m, p7/m, z13.h, z8.h  // 10100001-10001000-11101101-10111011
+// CHECK-INST: umops   za3.s, p3/m, p7/m, z13.h, z8.h
+// CHECK-ENCODING: [0xbb,0xed,0x88,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a188edbb <unknown>
+
+umops   za3.s, p7/m, p7/m, z31.h, z31.h  // 10100001-10011111-11111111-11111011
+// CHECK-INST: umops   za3.s, p7/m, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xfb,0xff,0x9f,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19ffffb <unknown>
+
+umops   za1.s, p3/m, p0/m, z17.h, z16.h  // 10100001-10010000-00001110-00111001
+// CHECK-INST: umops   za1.s, p3/m, p0/m, z17.h, z16.h
+// CHECK-ENCODING: [0x39,0x0e,0x90,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1900e39 <unknown>
+
+umops   za1.s, p1/m, p4/m, z1.h, z30.h  // 10100001-10011110-10000100-00111001
+// CHECK-INST: umops   za1.s, p1/m, p4/m, z1.h, z30.h
+// CHECK-ENCODING: [0x39,0x84,0x9e,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19e8439 <unknown>
+
+umops   za0.s, p5/m, p2/m, z19.h, z20.h  // 10100001-10010100-01010110-01111000
+// CHECK-INST: umops   za0.s, p5/m, p2/m, z19.h, z20.h
+// CHECK-ENCODING: [0x78,0x56,0x94,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1945678 <unknown>
+
+umops   za0.s, p6/m, p0/m, z12.h, z2.h  // 10100001-10000010-00011001-10011000
+// CHECK-INST: umops   za0.s, p6/m, p0/m, z12.h, z2.h
+// CHECK-ENCODING: [0x98,0x19,0x82,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a1821998 <unknown>
+
+umops   za1.s, p2/m, p6/m, z1.h, z26.h  // 10100001-10011010-11001000-00111001
+// CHECK-INST: umops   za1.s, p2/m, p6/m, z1.h, z26.h
+// CHECK-ENCODING: [0x39,0xc8,0x9a,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19ac839 <unknown>
+
+umops   za1.s, p2/m, p0/m, z22.h, z30.h  // 10100001-10011110-00001010-11011001
+// CHECK-INST: umops   za1.s, p2/m, p0/m, z22.h, z30.h
+// CHECK-ENCODING: [0xd9,0x0a,0x9e,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a19e0ad9 <unknown>
+
+umops   za2.s, p5/m, p7/m, z9.h, z1.h  // 10100001-10000001-11110101-00111010
+// CHECK-INST: umops   za2.s, p5/m, p7/m, z9.h, z1.h
+// CHECK-ENCODING: [0x3a,0xf5,0x81,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a181f53a <unknown>
+
+umops   za3.s, p2/m, p5/m, z12.h, z11.h  // 10100001-10001011-10101001-10011011
+// CHECK-INST: umops   za3.s, p2/m, p5/m, z12.h, z11.h
+// CHECK-ENCODING: [0x9b,0xa9,0x8b,0xa1]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: a18ba99b <unknown>
+
diff --git a/llvm/test/MC/AArch64/SME2/zero.s b/llvm/test/MC/AArch64/SME2/zero.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/AArch64/SME2/zero.s
@@ -0,0 +1,20 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
+// RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
+// RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+
+
+zero    {zt0}  // 11000000-01001000-00000000-00000001
+// CHECK-INST: zero    { zt0 }
+// CHECK-ENCODING: [0x01,0x00,0x48,0xc0]
+// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c0480001 <unknown>
+