diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h --- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h @@ -113,12 +113,14 @@ GISelChangeObserver &Observer; GISelKnownBits *KB; MachineDominatorTree *MDT; + bool IsPreLegalize; const LegalizerInfo *LI; const RegisterBankInfo *RBI; const TargetRegisterInfo *TRI; public: CombinerHelper(GISelChangeObserver &Observer, MachineIRBuilder &B, + bool IsPreLegalize, GISelKnownBits *KB = nullptr, MachineDominatorTree *MDT = nullptr, const LegalizerInfo *LI = nullptr); diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp --- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp @@ -47,11 +47,12 @@ "legal for the GlobalISel combiner")); CombinerHelper::CombinerHelper(GISelChangeObserver &Observer, - MachineIRBuilder &B, GISelKnownBits *KB, - MachineDominatorTree *MDT, + MachineIRBuilder &B, bool IsPreLegalize, + GISelKnownBits *KB, MachineDominatorTree *MDT, const LegalizerInfo *LI) : Builder(B), MRI(Builder.getMF().getRegInfo()), Observer(Observer), KB(KB), - MDT(MDT), LI(LI), RBI(Builder.getMF().getSubtarget().getRegBankInfo()), + MDT(MDT), IsPreLegalize(IsPreLegalize), LI(LI), + RBI(Builder.getMF().getSubtarget().getRegBankInfo()), TRI(Builder.getMF().getSubtarget().getRegisterInfo()) { (void)this->KB; } @@ -130,7 +131,7 @@ return BigEndian; } -bool CombinerHelper::isPreLegalize() const { return !LI; } +bool CombinerHelper::isPreLegalize() const { return IsPreLegalize; } bool CombinerHelper::isLegal(const LegalityQuery &Query) const { assert(LI && "Must have LegalizerInfo to query isLegal!"); @@ -486,6 +487,24 @@ return false; } +static unsigned getExtLoadOpcForExtend(unsigned ExtOpc) { + unsigned CandidateLoadOpc; + switch (ExtOpc) { + case TargetOpcode::G_ANYEXT: + CandidateLoadOpc = TargetOpcode::G_LOAD; + break; + case TargetOpcode::G_SEXT: + CandidateLoadOpc = TargetOpcode::G_SEXTLOAD; + break; + case TargetOpcode::G_ZEXT: + CandidateLoadOpc = TargetOpcode::G_ZEXTLOAD; + break; + default: + llvm_unreachable("Unexpected extend opc"); + } + return CandidateLoadOpc; +} + bool CombinerHelper::matchCombineExtendingLoads(MachineInstr &MI, PreferredTuple &Preferred) { // We match the loads and follow the uses to the extend instead of matching @@ -538,9 +557,10 @@ // Check for legality. if (LI) { LegalityQuery::MemDesc MMDesc(MMO); + unsigned CandidateLoadOpc = getExtLoadOpcForExtend(UseMI.getOpcode()); LLT UseTy = MRI.getType(UseMI.getOperand(0).getReg()); LLT SrcTy = MRI.getType(LoadMI->getPointerReg()); - if (LI->getAction({LoadMI->getOpcode(), {UseTy, SrcTy}, {MMDesc}}) + if (LI->getAction({CandidateLoadOpc, {UseTy, SrcTy}, {MMDesc}}) .Action != LegalizeActions::Legal) continue; } @@ -588,12 +608,8 @@ }; Observer.changingInstr(MI); - MI.setDesc( - Builder.getTII().get(Preferred.ExtendOpcode == TargetOpcode::G_SEXT - ? TargetOpcode::G_SEXTLOAD - : Preferred.ExtendOpcode == TargetOpcode::G_ZEXT - ? TargetOpcode::G_ZEXTLOAD - : TargetOpcode::G_LOAD)); + unsigned LoadOpc = getExtLoadOpcForExtend(Preferred.ExtendOpcode); + MI.setDesc(Builder.getTII().get(LoadOpc)); // Rewrite all the uses to fix up the types. auto &LoadValue = MI.getOperand(0); diff --git a/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp --- a/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp @@ -73,7 +73,7 @@ bool AArch64O0PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - CombinerHelper Helper(Observer, B, KB, MDT); + CombinerHelper Helper(Observer, B, /*IsPreLegalize*/ true, KB, MDT); AArch64GenO0PreLegalizerCombinerHelper Generated(GeneratedRuleCfg, Helper); if (Generated.tryCombineAll(Observer, MI, B)) diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp --- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp @@ -364,7 +364,7 @@ MachineIRBuilder &B) const { const auto *LI = MI.getParent()->getParent()->getSubtarget().getLegalizerInfo(); - CombinerHelper Helper(Observer, B, KB, MDT, LI); + CombinerHelper Helper(Observer, B, /*IsPreLegalize*/ false, KB, MDT, LI); AArch64GenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg); return Generated.tryCombineAll(Observer, MI, B, Helper); } diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp --- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp @@ -1043,7 +1043,7 @@ bool AArch64PostLegalizerLoweringInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - CombinerHelper Helper(Observer, B); + CombinerHelper Helper(Observer, B, /* IsPreLegalize*/ false); AArch64GenPostLegalizerLoweringHelper Generated(GeneratedRuleCfg); return Generated.tryCombineAll(Observer, MI, B, Helper); } diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp --- a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp @@ -377,7 +377,9 @@ bool AArch64PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - CombinerHelper Helper(Observer, B, KB, MDT); + const auto *LI = + MI.getParent()->getParent()->getSubtarget().getLegalizerInfo(); + CombinerHelper Helper(Observer, B, /* IsPreLegalize*/ true, KB, MDT, LI); AArch64GenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg, Helper); if (Generated.tryCombineAll(Observer, MI, B)) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp @@ -348,7 +348,8 @@ bool AMDGPUPostLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - AMDGPUCombinerHelper Helper(Observer, B, KB, MDT, LInfo); + AMDGPUCombinerHelper Helper(Observer, B, /*IsPreLegalize*/ false, KB, MDT, + LInfo); AMDGPUPostLegalizerCombinerHelper PostLegalizerHelper(B, Helper); AMDGPUGenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg, Helper, PostLegalizerHelper); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp @@ -198,7 +198,7 @@ bool AMDGPUPreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - AMDGPUCombinerHelper Helper(Observer, B, KB, MDT); + AMDGPUCombinerHelper Helper(Observer, B, /*IsPreLegalize*/ true, KB, MDT); AMDGPUPreLegalizerCombinerHelper PreLegalizerHelper(B, Helper); AMDGPUGenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg, Helper, PreLegalizerHelper); diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp @@ -399,7 +399,7 @@ bool AMDGPURegBankCombinerInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - CombinerHelper Helper(Observer, B, KB, MDT); + CombinerHelper Helper(Observer, B, /* IsPreLegalize*/ false, KB, MDT); AMDGPURegBankCombinerHelper RegBankHelper(B, Helper); AMDGPUGenRegBankCombinerHelper Generated(GeneratedRuleCfg, Helper, RegBankHelper); diff --git a/llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp b/llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp --- a/llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp +++ b/llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp @@ -61,7 +61,7 @@ MachineInstr &MI, MachineIRBuilder &B) const { - CombinerHelper Helper(Observer, B, KB, + CombinerHelper Helper(Observer, B, /* IsPreLegalize*/ false, KB, /*DominatorTree*/ nullptr, LInfo); MipsGenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg, Helper); return Generated.tryCombineAll(Observer, MI, B, Helper); diff --git a/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp b/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp --- a/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp +++ b/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp @@ -38,7 +38,7 @@ bool MipsPreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, MachineInstr &MI, MachineIRBuilder &B) const { - CombinerHelper Helper(Observer, B); + CombinerHelper Helper(Observer, B, /*IsPreLegalize*/ true); switch (MI.getOpcode()) { default: