diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h --- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h @@ -77,6 +77,7 @@ virtual void MRI_NoteNewVirtualRegister(Register Reg) = 0; virtual void MRI_NotecloneVirtualRegister(Register ClonedReg, Register Reg) {} + virtual void MRI_NoteVirtualRegisterSpill(Register Reg) {} }; private: @@ -196,6 +197,9 @@ TheDelegates[DR] = delegate; } + /// Callback to notify a virtual register spill/reload. + void noteVirtualRegisterSpill(Register Reg); + //===--------------------------------------------------------------------===// // Function State //===--------------------------------------------------------------------===// diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp b/llvm/lib/CodeGen/LiveIntervals.cpp --- a/llvm/lib/CodeGen/LiveIntervals.cpp +++ b/llvm/lib/CodeGen/LiveIntervals.cpp @@ -1743,9 +1743,8 @@ return; LLVM_DEBUG(dbgs() << " Split " << NumComp << " components: " << LI << '\n'); Register Reg = LI.reg(); - const TargetRegisterClass *RegClass = MRI->getRegClass(Reg); for (unsigned I = 1; I < NumComp; ++I) { - Register NewVReg = MRI->createVirtualRegister(RegClass); + Register NewVReg = MRI->cloneVirtualRegister(Reg); LiveInterval &NewLI = createEmptyInterval(NewVReg); SplitLIs.push_back(&NewLI); } diff --git a/llvm/lib/CodeGen/LiveRangeEdit.cpp b/llvm/lib/CodeGen/LiveRangeEdit.cpp --- a/llvm/lib/CodeGen/LiveRangeEdit.cpp +++ b/llvm/lib/CodeGen/LiveRangeEdit.cpp @@ -33,7 +33,7 @@ LiveInterval &LiveRangeEdit::createEmptyIntervalFrom(Register OldReg, bool createSubRanges) { - Register VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); + Register VReg = MRI.cloneVirtualRegister(OldReg); if (VRM) VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); @@ -53,7 +53,7 @@ } Register LiveRangeEdit::createFrom(Register OldReg) { - Register VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); + Register VReg = MRI.cloneVirtualRegister(OldReg); if (VRM) { VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); } diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -213,6 +213,12 @@ I.second = 0; } +void MachineRegisterInfo::noteVirtualRegisterSpill(Register Reg) { + Delegate *TheDelegate = getDelegate(DelegateReceiver::RESERVED); + if (TheDelegate) + TheDelegate->MRI_NoteVirtualRegisterSpill(Reg); +} + void MachineRegisterInfo::verifyUseList(Register Reg) const { #ifndef NDEBUG bool Valid = true; diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -434,6 +434,7 @@ int FI = getStackSpaceFor(VirtReg); LLVM_DEBUG(dbgs() << " to stack slot #" << FI << '\n'); + MRI->noteVirtualRegisterSpill(VirtReg); const TargetRegisterClass &RC = *MRI->getRegClass(VirtReg); TII->storeRegToStackSlot(*MBB, Before, AssignedReg, Kill, FI, &RC, TRI); ++NumStores; @@ -488,6 +489,7 @@ LLVM_DEBUG(dbgs() << "Reloading " << printReg(VirtReg, TRI) << " into " << printReg(PhysReg, TRI) << '\n'); int FI = getStackSpaceFor(VirtReg); + MRI->noteVirtualRegisterSpill(VirtReg); const TargetRegisterClass &RC = *MRI->getRegClass(VirtReg); TII->loadRegFromStackSlot(*MBB, Before, PhysReg, FI, &RC, TRI); ++NumLoads;