Index: clang/include/clang/Basic/TargetBuiltins.h =================================================================== --- clang/include/clang/Basic/TargetBuiltins.h +++ clang/include/clang/Basic/TargetBuiltins.h @@ -309,6 +309,7 @@ bool isTupleSet() const { return Flags & IsTupleSet; } bool isRead() const { return Flags & IsRead; } bool isWrite() const { return Flags & IsWrite; } + bool isZero() const { return Flags & IsZero; } uint64_t getBits() const { return Flags; } bool isFlagSet(uint64_t Flag) const { return Flags & Flag; } Index: clang/include/clang/Basic/arm_sme.td =================================================================== --- clang/include/clang/Basic/arm_sme.td +++ clang/include/clang/Basic/arm_sme.td @@ -114,3 +114,14 @@ defm SVWRITE_ZA32 : ZAWrite<"za32", "iUif", [ImmCheck<0, ImmCheck0_3>, ImmCheck<2, ImmCheck0_3>]>; defm SVWRITE_ZA64 : ZAWrite<"za64", "lUld", [ImmCheck<0, ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>; defm SVWRITE_ZA128 : ZAWrite<"za128", "csilUcUsUiUlhbfd", [ImmCheck<0, ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>; + +//////////////////////////////////////////////////////////////////////////////// +// SME - Zero + +let TargetGuard = "sme" in { + def SVZERO_MASK_ZA : SInst<"svzero_mask_za", "vi", "", MergeNone, "aarch64_sme_zero", + [IsZero, IsOverloadNone, IsStreamingCompatible, IsSharedZA], + [ImmCheck<0, ImmCheck0_255>]>; + def SVZERO_ZA : SInst<"svzero_za", "v", "", MergeNone, "aarch64_sme_zero", + [IsZero, IsOverloadNone, IsStreamingCompatible, IsSharedZA]>; +} Index: clang/include/clang/Basic/arm_sve_sme_incl.td =================================================================== --- clang/include/clang/Basic/arm_sve_sme_incl.td +++ clang/include/clang/Basic/arm_sve_sme_incl.td @@ -218,6 +218,7 @@ def IsPreservesZA : FlagType<0x10000000000>; def IsRead : FlagType<0x20000000000>; def IsWrite : FlagType<0x40000000000>; +def IsZero : FlagType<0x80000000000>; // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h class ImmCheckType { @@ -241,6 +242,7 @@ def ImmCheck0_3 : ImmCheckType<15>; // 0..3 def ImmCheck0_0 : ImmCheckType<16>; // 0..0 def ImmCheck0_15 : ImmCheckType<17>; // 0..15 +def ImmCheck0_255 : ImmCheckType<18>; // 0..255 class ImmCheck { int Arg = arg; Index: clang/lib/CodeGen/CGBuiltin.cpp =================================================================== --- clang/lib/CodeGen/CGBuiltin.cpp +++ clang/lib/CodeGen/CGBuiltin.cpp @@ -9448,6 +9448,16 @@ return Builder.CreateCall(F, Ops); } +Value *CodeGenFunction::EmitSMEZero(SVETypeFlags TypeFlags, + SmallVectorImpl &Ops, + unsigned IntID) { + // svzero_za() intrinsic zeros the entire za tile and has no paramters. + if (Ops.size() == 0) + Ops.push_back(llvm::ConstantInt::get(Int32Ty, 255)); + Function *F = CGM.getIntrinsic(IntID, {}); + return Builder.CreateCall(F, Ops); +} + // Limit the usage of scalable llvm IR generated by the ACLE by using the // sve dup.x intrinsic instead of IRBuilder::CreateVectorSplat. Value *CodeGenFunction::EmitSVEDupX(Value *Scalar, llvm::Type *Ty) { @@ -9908,6 +9918,8 @@ return EmitSMELd1St1(TypeFlags, Ops, Builtin->LLVMIntrinsic); else if (TypeFlags.isRead() || TypeFlags.isWrite()) return EmitSMEReadWrite(TypeFlags, Ops, Builtin->LLVMIntrinsic); + else if (TypeFlags.isZero()) + return EmitSMEZero(TypeFlags, Ops, Builtin->LLVMIntrinsic); /// Should not happen return nullptr; Index: clang/lib/CodeGen/CodeGenFunction.h =================================================================== --- clang/lib/CodeGen/CodeGenFunction.h +++ clang/lib/CodeGen/CodeGenFunction.h @@ -4267,6 +4267,9 @@ llvm::Value *EmitSMEReadWrite(SVETypeFlags TypeFlags, llvm::SmallVectorImpl &Ops, unsigned IntID); + llvm::Value *EmitSMEZero(SVETypeFlags TypeFlags, + llvm::SmallVectorImpl &Ops, + unsigned IntID); llvm::Value *EmitAArch64SMEBuiltinExpr(unsigned BuiltinID, const CallExpr *E); llvm::Value *EmitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E, Index: clang/lib/Sema/SemaChecking.cpp =================================================================== --- clang/lib/Sema/SemaChecking.cpp +++ clang/lib/Sema/SemaChecking.cpp @@ -2992,6 +2992,10 @@ if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 15)) HasError = true; break; + case SVETypeFlags::ImmCheck0_255: + if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 255)) + HasError = true; + break; } } Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c =================================================================== --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c @@ -0,0 +1,46 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svzero_mask_za( +// CHECK-CXX-LABEL: @_Z19test_svzero_mask_zav( +// CHECK-NEXT: entry: +// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 0) +// CHECK-NEXT: ret void +// +void test_svzero_mask_za() { + svzero_mask_za(0); +} + +// CHECK-C-LABEL: @test_svzero_mask_za_1( +// CHECK-CXX-LABEL: @_Z21test_svzero_mask_za_1v( +// CHECK-NEXT: entry: +// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 176) +// CHECK-NEXT: ret void +// +void test_svzero_mask_za_1() { + svzero_mask_za(176); +} + +// CHECK-C-LABEL: @test_svzero_mask_za_2( +// CHECK-CXX-LABEL: @_Z21test_svzero_mask_za_2v( +// CHECK-NEXT: entry: +// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) +// CHECK-NEXT: ret void +// +void test_svzero_mask_za_2() { + svzero_mask_za(255); +} + +// CHECK-C-LABEL: @test_svzero_za( +// CHECK-CXX-LABEL: @_Z14test_svzero_zav( +// CHECK-NEXT: entry: +// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) +// CHECK-NEXT: ret void +// +void test_svzero_za() { + svzero_za(); +} Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp =================================================================== --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -203,6 +203,14 @@ SVE_ACLE_FUNC(svwrite_ver_za8, _s8, _m,)(0, -1, 16, pg, svundef_s8()); } +ARM_STREAMING_ATTR +void test_range_0_255(svbool_t pg, void *ptr) { + // expected-error@+1 {{argument value 256 is outside the valid range [0, 255]}} + SVE_ACLE_FUNC(svzero_mask_za,,,)(256); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 255]}} + SVE_ACLE_FUNC(svzero_mask_za,,,)(-1); +} + ARM_STREAMING_ATTR void test_constant(uint64_t u64, svbool_t pg, void *ptr) { SVE_ACLE_FUNC(svld1_hor_za8,,,)(u64, u64, 0, pg, ptr); // expected-error {{argument to 'svld1_hor_za8' must be a constant integer}}