diff --git a/llvm/lib/CodeGen/BranchRelaxation.cpp b/llvm/lib/CodeGen/BranchRelaxation.cpp
--- a/llvm/lib/CodeGen/BranchRelaxation.cpp
+++ b/llvm/lib/CodeGen/BranchRelaxation.cpp
@@ -431,7 +431,8 @@
 
 bool BranchRelaxation::fixupUnconditionalBranch(MachineInstr &MI) {
   MachineBasicBlock *MBB = MI.getParent();
-
+  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
+  SmallVector<MachineOperand, 4> Cond;
   unsigned OldBrSize = TII->getInstSizeInBytes(MI);
   MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI);
 
@@ -444,6 +445,13 @@
 
   MachineBasicBlock *BranchBB = MBB;
 
+  auto RemoveBranch = [&](MachineBasicBlock *MBB) {
+    unsigned &BBSize = BlockInfo[MBB->getNumber()].Size;
+    int RemovedSize = 0;
+    TII->removeBranch(*MBB, &RemovedSize);
+    BBSize -= RemovedSize;
+  };
+
   // If this was an expanded conditional branch, there is already a single
   // unconditional branch in a block.
   if (!MBB->empty()) {
@@ -482,11 +490,17 @@
     // restore blocks are just duplicated for each far branch.
     assert(!DestBB->isEntryBlock());
     MachineBasicBlock *PrevBB = &*std::prev(DestBB->getIterator());
-    if (auto *FT = PrevBB->getFallThrough()) {
-      assert(FT == DestBB);
-      TII->insertUnconditionalBranch(*PrevBB, FT, DebugLoc());
-      // Recalculate the block size.
-      BlockInfo[PrevBB->getNumber()].Size = computeBlockSize(*PrevBB);
+    bool FailToAnalyze = TII->analyzeBranch(*PrevBB, TBB, FBB, Cond);
+    // Fall through only if PrevBB has no unconditional branch as one of its
+    // terminators.
+    if (!FailToAnalyze && !FBB) {
+      if (!Cond.empty() && TBB && TBB == DestBB)
+        RemoveBranch(PrevBB);
+      if (!TBB || (TBB && !Cond.empty())) {
+        TII->insertUnconditionalBranch(*PrevBB, DestBB, DebugLoc());
+        // Recalculate the block size.
+        BlockInfo[PrevBB->getNumber()].Size = computeBlockSize(*PrevBB);
+      }
     }
     // Now, RestoreBB could be placed directly before DestBB.
     MF->splice(DestBB->getIterator(), RestoreBB->getIterator());
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir b/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
@@ -0,0 +1,1458 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass branch-relaxation -amdgpu-s-branch-bits=5 %s -o - | FileCheck %s
+
+# CHECK-LABEL: branch_no_terminators
+# CHECK-LABEL: bb.0.entry:
+# CHECK:  S_WAITCNT 0
+# CHECK:  $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+# CHECK:  BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec
+# CHECK:  BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec
+# CHECK: $exec = S_MOV_B64 killed $sgpr4_sgpr5
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 $sgpr33, 2, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr34, 3, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr35, 4, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr36, 5, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr37, 6, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr38, 7, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr39, 8, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr40, 9, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr41, 10, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr42, 11, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr43, 12, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr44, 13, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr45, 14, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr46, 15, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr47, 16, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr48, 17, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr49, 18, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr50, 19, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr51, 20, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr52, 21, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr53, 22, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr54, 23, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr55, 24, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr56, 25, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr57, 26, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr58, 27, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr59, 28, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr60, 29, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr61, 30, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr62, 31, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr63, 32, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr64, 33, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr65, 34, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr66, 35, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr67, 36, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr68, 37, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr69, 38, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr70, 39, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr71, 40, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr72, 41, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr73, 42, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr74, 43, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr75, 44, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr76, 45, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr77, 46, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr78, 47, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr79, 48, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr80, 49, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr81, 50, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr82, 51, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr83, 52, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr84, 53, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr85, 54, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr86, 55, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr87, 56, $vgpr0
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr88, 57, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr95, 0, $vgpr1
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr89, 58, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr96, 1, $vgpr1
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr90, 59, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr97, 2, $vgpr1
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr91, 60, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr98, 3, $vgpr1
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr92, 61, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr99, 4, $vgpr1
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr93, 62, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr100, 5, $vgpr1
+# CHECK: $sgpr81 = S_MOV_B32 killed $sgpr12
+# CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr94, 63, $vgpr0
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr101, 6, $vgpr1
+# CHECK: S_CMP_EQ_U32 killed renamable $sgpr81, 0, implicit-def $scc
+# CHECK: INLINEASM &"s_mov_b32 s0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr0
+# CHECK: INLINEASM &"s_mov_b32 s1, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr1
+# CHECK: INLINEASM &"s_mov_b32 s2, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr2
+# CHECK: INLINEASM &"s_mov_b32 s3, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr3
+# CHECK: INLINEASM &"s_mov_b32 s4, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr4
+# CHECK: INLINEASM &"s_mov_b32 s5, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr5
+# CHECK: INLINEASM &"s_mov_b32 s6, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr6
+# CHECK: INLINEASM &"s_mov_b32 s7, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr7
+# CHECK: INLINEASM &"s_mov_b32 s8, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr8
+# CHECK: INLINEASM &"s_mov_b32 s9, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr9
+# CHECK: INLINEASM &"s_mov_b32 s10, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr10
+# CHECK: INLINEASM &"s_mov_b32 s11, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr11
+# CHECK: INLINEASM &"s_mov_b32 s12, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr12
+# CHECK: INLINEASM &"s_mov_b32 s13, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr13
+# CHECK: INLINEASM &"s_mov_b32 s14, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr14
+# CHECK: INLINEASM &"s_mov_b32 s15, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr15
+# CHECK: INLINEASM &"s_mov_b32 s16, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr16
+# CHECK: INLINEASM &"s_mov_b32 s17, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr17
+# CHECK: INLINEASM &"s_mov_b32 s18, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr18
+# CHECK: INLINEASM &"s_mov_b32 s19, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr19
+# CHECK: INLINEASM &"s_mov_b32 s20, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr20
+# CHECK: INLINEASM &"s_mov_b32 s21, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr21
+# CHECK: INLINEASM &"s_mov_b32 s22, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr22
+# CHECK: INLINEASM &"s_mov_b32 s23, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr23
+# CHECK: INLINEASM &"s_mov_b32 s24, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr24
+# CHECK: INLINEASM &"s_mov_b32 s25, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr25
+# CHECK: INLINEASM &"s_mov_b32 s26, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr26
+# CHECK: INLINEASM &"s_mov_b32 s27, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr27
+# CHECK: INLINEASM &"s_mov_b32 s28, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr28
+# CHECK: INLINEASM &"s_mov_b32 s29, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr29
+# CHECK: INLINEASM &"s_mov_b32 s30, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr30
+# CHECK: INLINEASM &"s_mov_b32 s31, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr31
+# CHECK: INLINEASM &"s_mov_b32 s32, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr32
+# CHECK: INLINEASM &"s_mov_b32 s33, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr33
+# CHECK: INLINEASM &"s_mov_b32 s34, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr34
+# CHECK: INLINEASM &"s_mov_b32 s35, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr35
+# CHECK: INLINEASM &"s_mov_b32 s36, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr36
+# CHECK: INLINEASM &"s_mov_b32 s37, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr37
+# CHECK: INLINEASM &"s_mov_b32 s38, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr38
+# CHECK: INLINEASM &"s_mov_b32 s39, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr39
+# CHECK: INLINEASM &"s_mov_b32 s40, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr40
+# CHECK: INLINEASM &"s_mov_b32 s41, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr41
+# CHECK: INLINEASM &"s_mov_b32 s42, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr42
+# CHECK: INLINEASM &"s_mov_b32 s43, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr43
+# CHECK: INLINEASM &"s_mov_b32 s44, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr44
+# CHECK: INLINEASM &"s_mov_b32 s45, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr45
+# CHECK: INLINEASM &"s_mov_b32 s46, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr46
+# CHECK: INLINEASM &"s_mov_b32 s47, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr47
+# CHECK: INLINEASM &"s_mov_b32 s48, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr48
+# CHECK: INLINEASM &"s_mov_b32 s49, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr49
+# CHECK: INLINEASM &"s_mov_b32 s50, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr50
+# CHECK: INLINEASM &"s_mov_b32 s51, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr51
+# CHECK: INLINEASM &"s_mov_b32 s52, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr52
+# CHECK: INLINEASM &"s_mov_b32 s53, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr53
+# CHECK: INLINEASM &"s_mov_b32 s54, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr54
+# CHECK: INLINEASM &"s_mov_b32 s55, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr55
+# CHECK: INLINEASM &"s_mov_b32 s56, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr56
+# CHECK: INLINEASM &"s_mov_b32 s57, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr57
+# CHECK: INLINEASM &"s_mov_b32 s58, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr58
+# CHECK: INLINEASM &"s_mov_b32 s59, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr59
+# CHECK: INLINEASM &"s_mov_b32 s60, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr60
+# CHECK: INLINEASM &"s_mov_b32 s61, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr61
+# CHECK: INLINEASM &"s_mov_b32 s62, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr62
+# CHECK: INLINEASM &"s_mov_b32 s63, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr63
+# CHECK: INLINEASM &"s_mov_b32 s64, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr64
+# CHECK: INLINEASM &"s_mov_b32 s65, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr65
+# CHECK: INLINEASM &"s_mov_b32 s66, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr66
+# CHECK: INLINEASM &"s_mov_b32 s67, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr67
+# CHECK: INLINEASM &"s_mov_b32 s68, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr68
+# CHECK: INLINEASM &"s_mov_b32 s69, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr69
+# CHECK: INLINEASM &"s_mov_b32 s70, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr70
+# CHECK: INLINEASM &"s_mov_b32 s71, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr71
+# CHECK: INLINEASM &"s_mov_b32 s72, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr72
+# CHECK: INLINEASM &"s_mov_b32 s73, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr73
+# CHECK: INLINEASM &"s_mov_b32 s74, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr74
+# CHECK: INLINEASM &"s_mov_b32 s75, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr75
+# CHECK: INLINEASM &"s_mov_b32 s76, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr76
+# CHECK: INLINEASM &"s_mov_b32 s77, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr77
+# CHECK: INLINEASM &"s_mov_b32 s78, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr78
+# CHECK: INLINEASM &"s_mov_b32 s79, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr79
+# CHECK: INLINEASM &"s_mov_b32 s80, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr80
+# CHECK: INLINEASM &"s_mov_b32 s81, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr81
+# CHECK: INLINEASM &"s_mov_b32 s82, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr82
+# CHECK: INLINEASM &"s_mov_b32 s83, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr83
+# CHECK: INLINEASM &"s_mov_b32 s84, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr84
+# CHECK: INLINEASM &"s_mov_b32 s85, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr85
+# CHECK: INLINEASM &"s_mov_b32 s86, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr86
+# CHECK: INLINEASM &"s_mov_b32 s87, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr87
+# CHECK: INLINEASM &"s_mov_b32 s88, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr88
+# CHECK: INLINEASM &"s_mov_b32 s89, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr89
+# CHECK: INLINEASM &"s_mov_b32 s90, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr90
+# CHECK: INLINEASM &"s_mov_b32 s91, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr91
+# CHECK: INLINEASM &"s_mov_b32 s92, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr92
+# CHECK: INLINEASM &"s_mov_b32 s93, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr93
+# CHECK: INLINEASM &"s_mov_b32 s94, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr94
+# CHECK: INLINEASM &"s_mov_b32 s95, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr95
+# CHECK: INLINEASM &"s_mov_b32 s96, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr96
+# CHECK: INLINEASM &"s_mov_b32 s97, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr97
+# CHECK: INLINEASM &"s_mov_b32 s98, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr98
+# CHECK: INLINEASM &"s_mov_b32 s99, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr99
+# CHECK: INLINEASM &"s_mov_b32 s100, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr100
+# CHECK: INLINEASM &"s_mov_b32 s101, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr101
+# CHECK: INLINEASM &"s_mov_b32 $0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_lo
+# CHECK: INLINEASM &"s_mov_b32 $0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_hi
+# CHECK: S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+
+# CHECK-LABEL: bb.5.entry:
+# CHECK: $exec = S_NOT_B64 $exec, implicit-def dead $scc, implicit-def $vgpr2
+# CHECK: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $private_rsrc_reg, $sp_reg, 0, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+# CHECK: $vgpr2 = V_WRITELANE_B32 $sgpr0, 0, undef $vgpr2, implicit $sgpr0_sgpr1
+# CHECK: $vgpr2 = V_WRITELANE_B32 $sgpr1, 1, $vgpr2, implicit $sgpr0_sgpr1
+# CHECK: $sgpr0_sgpr1 = S_GETPC_B64 post-instr-symbol <mcsymbol >
+# CHECK: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc
+# CHECK: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc, implicit $scc
+# CHECK: S_SETPC_B64 $sgpr0_sgpr1
+
+# CHECK-LABEL: bb.1:
+# CHECK: $vgpr1 = V_WRITELANE_B32 killed $sgpr81, 7, $vgpr1
+# CHECK: $sgpr81 = S_MOV_B32 killed $sgpr82
+# CHECK: $sgpr82 = S_MOV_B32 killed $sgpr83
+# CHECK: $sgpr83 = S_MOV_B32 killed $sgpr84
+# CHECK: $sgpr84 = S_MOV_B32 killed $sgpr85
+# CHECK: $sgpr85 = S_MOV_B32 killed $sgpr86
+# CHECK: $sgpr86 = S_MOV_B32 killed $sgpr87
+# CHECK: $sgpr87 = S_MOV_B32 killed $sgpr88
+# CHECK: $sgpr88 = S_MOV_B32 killed $sgpr89
+# CHECK: $sgpr89 = S_MOV_B32 killed $sgpr90
+# CHECK: $sgpr90 = S_MOV_B32 killed $sgpr91
+# CHECK: $sgpr91 = S_MOV_B32 killed $sgpr92
+# CHECK: $sgpr92 = S_MOV_B32 killed $sgpr93
+# CHECK: $sgpr93 = S_MOV_B32 killed $sgpr94
+# CHECK: $sgpr94 = S_MOV_B32 killed $sgpr95
+# CHECK: $sgpr95 = S_MOV_B32 killed $sgpr96
+# CHECK: $sgpr96 = S_MOV_B32 killed $sgpr97
+# CHECK: $sgpr97 = S_MOV_B32 killed $sgpr98
+# CHECK: $sgpr98 = S_MOV_B32 killed $sgpr99
+# CHECK: $sgpr99 = S_MOV_B32 killed $sgpr100
+# CHECK: $sgpr100 = S_MOV_B32 killed $sgpr101
+# CHECK: $sgpr101 = S_MOV_B32 killed $vcc_lo
+# CHECK: $vcc_lo = S_MOV_B32 killed $vcc_hi
+# CHECK: $vcc_hi = S_MOV_B32 killed $sgpr80
+# CHECK: $sgpr80 = S_MOV_B32 killed $sgpr79
+# CHECK: $sgpr79 = S_MOV_B32 killed $sgpr78
+# CHECK: $sgpr78 = S_MOV_B32 killed $sgpr77
+# CHECK: $sgpr77 = S_MOV_B32 killed $sgpr76
+# CHECK: $sgpr76 = S_MOV_B32 killed $sgpr75
+# CHECK: $sgpr75 = S_MOV_B32 killed $sgpr74
+# CHECK: $sgpr74 = S_MOV_B32 killed $sgpr73
+# CHECK: $sgpr73 = S_MOV_B32 killed $sgpr72
+# CHECK: $sgpr72 = S_MOV_B32 killed $sgpr71
+# CHECK: $sgpr71 = S_MOV_B32 killed $sgpr70
+# CHECK: $sgpr70 = S_MOV_B32 killed $sgpr69
+# CHECK: $sgpr69 = S_MOV_B32 killed $sgpr68
+# CHECK: $sgpr68 = S_MOV_B32 killed $sgpr67
+# CHECK: $sgpr67 = S_MOV_B32 killed $sgpr66
+# CHECK: $sgpr66 = S_MOV_B32 killed $sgpr65
+# CHECK: $sgpr65 = S_MOV_B32 killed $sgpr64
+# CHECK: $sgpr64 = S_MOV_B32 killed $sgpr63
+# CHECK: $sgpr63 = S_MOV_B32 killed $sgpr62
+# CHECK: $sgpr62 = S_MOV_B32 killed $sgpr61
+# CHECK: $sgpr61 = S_MOV_B32 killed $sgpr60
+# CHECK: $sgpr60 = S_MOV_B32 killed $sgpr59
+# CHECK: $sgpr59 = S_MOV_B32 killed $sgpr58
+# CHECK: $sgpr58 = S_MOV_B32 killed $sgpr57
+# CHECK: $sgpr57 = S_MOV_B32 killed $sgpr56
+# CHECK: $sgpr56 = S_MOV_B32 killed $sgpr55
+# CHECK: $sgpr55 = S_MOV_B32 killed $sgpr54
+# CHECK: $sgpr54 = S_MOV_B32 killed $sgpr53
+# CHECK: $sgpr53 = S_MOV_B32 killed $sgpr52
+# CHECK: $sgpr52 = S_MOV_B32 killed $sgpr51
+# CHECK: $sgpr51 = S_MOV_B32 killed $sgpr50
+# CHECK: $sgpr50 = S_MOV_B32 killed $sgpr49
+# CHECK: $sgpr49 = S_MOV_B32 killed $sgpr48
+# CHECK: $sgpr48 = S_MOV_B32 killed $sgpr47
+# CHECK: $sgpr47 = S_MOV_B32 killed $sgpr46
+# CHECK: $sgpr46 = S_MOV_B32 killed $sgpr45
+# CHECK: $sgpr45 = S_MOV_B32 killed $sgpr44
+# CHECK: $sgpr44 = S_MOV_B32 killed $sgpr43
+# CHECK: $sgpr43 = S_MOV_B32 killed $sgpr42
+# CHECK: $sgpr42 = S_MOV_B32 killed $sgpr41
+# CHECK: $sgpr41 = S_MOV_B32 killed $sgpr40
+# CHECK: $sgpr40 = S_MOV_B32 killed $sgpr39
+# CHECK: $sgpr39 = S_MOV_B32 killed $sgpr38
+# CHECK: $sgpr38 = S_MOV_B32 killed $sgpr37
+# CHECK: $sgpr37 = S_MOV_B32 killed $sgpr36
+# CHECK: $sgpr36 = S_MOV_B32 killed $sgpr35
+# CHECK: $sgpr35 = S_MOV_B32 killed $sgpr34
+# CHECK: $sgpr34 = S_MOV_B32 killed $sgpr31
+# CHECK: $sgpr31 = S_MOV_B32 killed $sgpr30
+# CHECK: $sgpr30 = S_MOV_B32 killed $sgpr29
+# CHECK: $sgpr29 = S_MOV_B32 killed $sgpr28
+# CHECK: $sgpr28 = S_MOV_B32 killed $sgpr27
+# CHECK: $sgpr27 = S_MOV_B32 killed $sgpr26
+# CHECK: $sgpr26 = S_MOV_B32 killed $sgpr25
+# CHECK: $sgpr25 = S_MOV_B32 killed $sgpr24
+# CHECK: $sgpr24 = S_MOV_B32 killed $sgpr23
+# CHECK: $sgpr23 = S_MOV_B32 killed $sgpr22
+# CHECK: $sgpr22 = S_MOV_B32 killed $sgpr21
+# CHECK: $sgpr21 = S_MOV_B32 killed $sgpr20
+# CHECK: $sgpr20 = S_MOV_B32 killed $sgpr19
+# CHECK: $sgpr19 = S_MOV_B32 killed $sgpr18
+# CHECK: $sgpr18 = S_MOV_B32 killed $sgpr17
+# CHECK: $sgpr17 = S_MOV_B32 killed $sgpr16
+# CHECK: $sgpr16 = S_MOV_B32 killed $sgpr15
+# CHECK: $sgpr15 = S_MOV_B32 killed $sgpr14
+# CHECK: $sgpr14 = S_MOV_B32 killed $sgpr13
+# CHECK: $sgpr13 = S_MOV_B32 killed $sgpr12
+# CHECK: $sgpr12 = S_MOV_B32 killed $sgpr11
+# CHECK: $sgpr11 = S_MOV_B32 killed $sgpr10
+# CHECK: $sgpr10 = S_MOV_B32 killed $sgpr9
+# CHECK: $sgpr9 = S_MOV_B32 killed $sgpr8
+# CHECK: $sgpr8 = S_MOV_B32 killed $sgpr7
+# CHECK: $sgpr7 = S_MOV_B32 killed $sgpr6
+# CHECK: $sgpr6 = S_MOV_B32 killed $sgpr5
+# CHECK: $sgpr5 = S_MOV_B32 killed $sgpr4
+
+# CHECK-LABEL: bb.2.bb2:
+# CHECK: INLINEASM &"v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64", 1 /* sideeffect attdialect */, 2097162 /* regdef:SReg_32 */, def renamable $sgpr4
+# CHECK: S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
+# CHECK: S_CBRANCH_SCC0 %bb.3, implicit killed $scc
+  
+# CHECK-LABEL: bb.7.bb2:
+# CHECK: $sgpr0_sgpr1 = S_GETPC_B64 post-instr-symbol <mcsymbol >
+# CHECK: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc
+# CHECK: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc, implicit $scc
+# CHECK: S_SETPC_B64 $sgpr0_sgpr1
+  
+# CHECK-LABEL: bb.3.Flow:
+# CHECK: $sgpr4 = S_MOV_B32 killed $sgpr5
+# CHECK: $sgpr5 = S_MOV_B32 killed $sgpr6
+# CHECK: $sgpr6 = S_MOV_B32 killed $sgpr7
+# CHECK: $sgpr7 = S_MOV_B32 killed $sgpr8
+# CHECK: $sgpr8 = S_MOV_B32 killed $sgpr9
+# CHECK: $sgpr9 = S_MOV_B32 killed $sgpr10
+# CHECK: $sgpr10 = S_MOV_B32 killed $sgpr11
+# CHECK: $sgpr11 = S_MOV_B32 killed $sgpr12
+# CHECK: $sgpr12 = S_MOV_B32 killed $sgpr13
+# CHECK: $sgpr13 = S_MOV_B32 killed $sgpr14
+# CHECK: $sgpr14 = S_MOV_B32 killed $sgpr15
+# CHECK: $sgpr15 = S_MOV_B32 killed $sgpr16
+# CHECK: $sgpr16 = S_MOV_B32 killed $sgpr17
+# CHECK: $sgpr17 = S_MOV_B32 killed $sgpr18
+# CHECK: $sgpr18 = S_MOV_B32 killed $sgpr19
+# CHECK: $sgpr19 = S_MOV_B32 killed $sgpr20
+# CHECK: $sgpr20 = S_MOV_B32 killed $sgpr21
+# CHECK: $sgpr21 = S_MOV_B32 killed $sgpr22
+# CHECK: $sgpr22 = S_MOV_B32 killed $sgpr23
+# CHECK: $sgpr23 = S_MOV_B32 killed $sgpr24
+# CHECK: $sgpr24 = S_MOV_B32 killed $sgpr25
+# CHECK: $sgpr25 = S_MOV_B32 killed $sgpr26
+# CHECK: $sgpr26 = S_MOV_B32 killed $sgpr27
+# CHECK: $sgpr27 = S_MOV_B32 killed $sgpr28
+# CHECK: $sgpr28 = S_MOV_B32 killed $sgpr29
+# CHECK: $sgpr29 = S_MOV_B32 killed $sgpr30
+# CHECK: $sgpr30 = S_MOV_B32 killed $sgpr31
+# CHECK: $sgpr31 = S_MOV_B32 killed $sgpr34
+# CHECK: $sgpr34 = S_MOV_B32 killed $sgpr35
+# CHECK: $sgpr35 = S_MOV_B32 killed $sgpr36
+# CHECK: $sgpr36 = S_MOV_B32 killed $sgpr37
+# CHECK: $sgpr37 = S_MOV_B32 killed $sgpr38
+# CHECK: $sgpr38 = S_MOV_B32 killed $sgpr39
+# CHECK: $sgpr39 = S_MOV_B32 killed $sgpr40
+# CHECK: $sgpr40 = S_MOV_B32 killed $sgpr41
+# CHECK: $sgpr41 = S_MOV_B32 killed $sgpr42
+# CHECK: $sgpr42 = S_MOV_B32 killed $sgpr43
+# CHECK: $sgpr43 = S_MOV_B32 killed $sgpr44
+# CHECK: $sgpr44 = S_MOV_B32 killed $sgpr45
+# CHECK: $sgpr45 = S_MOV_B32 killed $sgpr46
+# CHECK: $sgpr46 = S_MOV_B32 killed $sgpr47
+# CHECK: $sgpr47 = S_MOV_B32 killed $sgpr48
+# CHECK: $sgpr48 = S_MOV_B32 killed $sgpr49
+# CHECK: $sgpr49 = S_MOV_B32 killed $sgpr50
+# CHECK: $sgpr50 = S_MOV_B32 killed $sgpr51
+# CHECK: $sgpr51 = S_MOV_B32 killed $sgpr52
+# CHECK: $sgpr52 = S_MOV_B32 killed $sgpr53
+# CHECK: $sgpr53 = S_MOV_B32 killed $sgpr54
+# CHECK: $sgpr54 = S_MOV_B32 killed $sgpr55
+# CHECK: $sgpr55 = S_MOV_B32 killed $sgpr56
+# CHECK: $sgpr56 = S_MOV_B32 killed $sgpr57
+# CHECK: $sgpr57 = S_MOV_B32 killed $sgpr58
+# CHECK: $sgpr58 = S_MOV_B32 killed $sgpr59
+# CHECK: $sgpr59 = S_MOV_B32 killed $sgpr60
+# CHECK: $sgpr60 = S_MOV_B32 killed $sgpr61
+# CHECK: $sgpr61 = S_MOV_B32 killed $sgpr62
+# CHECK: $sgpr62 = S_MOV_B32 killed $sgpr63
+# CHECK: $sgpr63 = S_MOV_B32 killed $sgpr64
+# CHECK: $sgpr64 = S_MOV_B32 killed $sgpr65
+# CHECK: $sgpr65 = S_MOV_B32 killed $sgpr66
+# CHECK: $sgpr66 = S_MOV_B32 killed $sgpr67
+# CHECK: $sgpr67 = S_MOV_B32 killed $sgpr68
+# CHECK: $sgpr68 = S_MOV_B32 killed $sgpr69
+# CHECK: $sgpr69 = S_MOV_B32 killed $sgpr70
+# CHECK: $sgpr70 = S_MOV_B32 killed $sgpr71
+# CHECK: $sgpr71 = S_MOV_B32 killed $sgpr72
+# CHECK: $sgpr72 = S_MOV_B32 killed $sgpr73
+# CHECK: $sgpr73 = S_MOV_B32 killed $sgpr74
+# CHECK: $sgpr74 = S_MOV_B32 killed $sgpr75
+# CHECK: $sgpr75 = S_MOV_B32 killed $sgpr76
+# CHECK: $sgpr76 = S_MOV_B32 killed $sgpr77
+# CHECK: $sgpr77 = S_MOV_B32 killed $sgpr78
+# CHECK: $sgpr78 = S_MOV_B32 killed $sgpr79
+# CHECK: $sgpr79 = S_MOV_B32 killed $sgpr80
+# CHECK: $sgpr80 = S_MOV_B32 killed $vcc_hi
+# CHECK: $vcc_hi = S_MOV_B32 killed $vcc_lo
+# CHECK: $vcc_lo = S_MOV_B32 killed $sgpr101
+# CHECK: $sgpr101 = S_MOV_B32 killed $sgpr100
+# CHECK: $sgpr100 = S_MOV_B32 killed $sgpr99
+# CHECK: $sgpr99 = S_MOV_B32 killed $sgpr98
+# CHECK: $sgpr98 = S_MOV_B32 killed $sgpr97
+# CHECK: $sgpr97 = S_MOV_B32 killed $sgpr96
+# CHECK: $sgpr96 = S_MOV_B32 killed $sgpr95
+# CHECK: $sgpr95 = S_MOV_B32 killed $sgpr94
+# CHECK: $sgpr94 = S_MOV_B32 killed $sgpr93
+# CHECK: $sgpr93 = S_MOV_B32 killed $sgpr92
+# CHECK: $sgpr92 = S_MOV_B32 killed $sgpr91
+# CHECK: $sgpr91 = S_MOV_B32 killed $sgpr90
+# CHECK: $sgpr90 = S_MOV_B32 killed $sgpr89
+# CHECK: $sgpr89 = S_MOV_B32 killed $sgpr88
+# CHECK: $sgpr88 = S_MOV_B32 killed $sgpr87
+# CHECK: $sgpr87 = S_MOV_B32 killed $sgpr86
+# CHECK: $sgpr86 = S_MOV_B32 killed $sgpr85
+# CHECK: $sgpr85 = S_MOV_B32 killed $sgpr84
+# CHECK: $sgpr84 = S_MOV_B32 killed $sgpr83
+# CHECK: $sgpr83 = S_MOV_B32 killed $sgpr82
+# CHECK: $sgpr82 = S_MOV_B32 killed $sgpr81
+# CHECK: $sgpr81 = V_READLANE_B32 $vgpr1, 7
+# CHECK: S_BRANCH %bb.4
+  
+# CHECK-LABEL: bb.6.bb3:
+# CHECK: $sgpr0 = V_READLANE_B32 $vgpr2, 0, implicit-def $sgpr0_sgpr1
+# CHECK: $sgpr1 = V_READLANE_B32 killed $vgpr2, 1
+# CHECK: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $private_rsrc_reg, $sp_reg, 0, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
+# CHECK: $exec = S_NOT_B64 $exec, implicit-def dead $scc, implicit killed $vgpr2
+  
+# CHECK-LABEL: bb.4.bb3:
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr0
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr1
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr2
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr3
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr4
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr5
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr6
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr7
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr8
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr9
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr10
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr11
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr12
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr13
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr14
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr15
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr16
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr17
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr18
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr19
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr20
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr21
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr22
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr23
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr24
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr25
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr26
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr27
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr28
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr29
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr30
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr31
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr32
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr33
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr34
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr35
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr36
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr37
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr38
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr39
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr40
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr41
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr42
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr43
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr44
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr45
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr46
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr47
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr48
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr49
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr50
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr51
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr52
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr53
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr54
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr55
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr56
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr57
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr58
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr59
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr60
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr61
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr62
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr63
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr64
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr65
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr66
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr67
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr68
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr69
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr70
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr71
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr72
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr73
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr74
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr75
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr76
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr77
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr78
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr79
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr80
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr81
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr82
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr83
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr84
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr85
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr86
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr87
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr88
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr89
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr90
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr91
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr92
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr93
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr94
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr95
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr96
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr97
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr98
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr99
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr100
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr101
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $vcc_lo
+# CHECK: INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $vcc_hi
+# CHECK: $sgpr101 = V_READLANE_B32 $vgpr1, 6
+# CHECK: $sgpr100 = V_READLANE_B32 $vgpr1, 5
+# CHECK: $sgpr99 = V_READLANE_B32 $vgpr1, 4
+# CHECK: $sgpr98 = V_READLANE_B32 $vgpr1, 3
+# CHECK: $sgpr97 = V_READLANE_B32 $vgpr1, 2
+# CHECK: $sgpr96 = V_READLANE_B32 $vgpr1, 1
+# CHECK: $sgpr95 = V_READLANE_B32 $vgpr1, 0
+# CHECK: $sgpr94 = V_READLANE_B32 $vgpr0, 63
+# CHECK: $sgpr93 = V_READLANE_B32 $vgpr0, 62
+# CHECK: $sgpr92 = V_READLANE_B32 $vgpr0, 61
+# CHECK: $sgpr91 = V_READLANE_B32 $vgpr0, 60
+# CHECK: $sgpr90 = V_READLANE_B32 $vgpr0, 59
+# CHECK: $sgpr89 = V_READLANE_B32 $vgpr0, 58
+# CHECK: $sgpr88 = V_READLANE_B32 $vgpr0, 57
+# CHECK: $sgpr87 = V_READLANE_B32 $vgpr0, 56
+# CHECK: $sgpr86 = V_READLANE_B32 $vgpr0, 55
+# CHECK: $sgpr85 = V_READLANE_B32 $vgpr0, 54
+# CHECK: $sgpr84 = V_READLANE_B32 $vgpr0, 53
+# CHECK: $sgpr83 = V_READLANE_B32 $vgpr0, 52
+# CHECK: $sgpr82 = V_READLANE_B32 $vgpr0, 51
+# CHECK: $sgpr81 = V_READLANE_B32 $vgpr0, 50
+# CHECK: $sgpr80 = V_READLANE_B32 $vgpr0, 49
+# CHECK: $sgpr79 = V_READLANE_B32 $vgpr0, 48
+# CHECK: $sgpr78 = V_READLANE_B32 $vgpr0, 47
+# CHECK: $sgpr77 = V_READLANE_B32 $vgpr0, 46
+# CHECK: $sgpr76 = V_READLANE_B32 $vgpr0, 45
+# CHECK: $sgpr75 = V_READLANE_B32 $vgpr0, 44
+# CHECK: $sgpr74 = V_READLANE_B32 $vgpr0, 43
+# CHECK: $sgpr73 = V_READLANE_B32 $vgpr0, 42
+# CHECK: $sgpr72 = V_READLANE_B32 $vgpr0, 41
+# CHECK: $sgpr71 = V_READLANE_B32 $vgpr0, 40
+# CHECK: $sgpr70 = V_READLANE_B32 $vgpr0, 39
+# CHECK: $sgpr69 = V_READLANE_B32 $vgpr0, 38
+# CHECK: $sgpr68 = V_READLANE_B32 $vgpr0, 37
+# CHECK: $sgpr67 = V_READLANE_B32 $vgpr0, 36
+# CHECK: $sgpr66 = V_READLANE_B32 $vgpr0, 35
+# CHECK: $sgpr65 = V_READLANE_B32 $vgpr0, 34
+# CHECK: $sgpr64 = V_READLANE_B32 $vgpr0, 33
+# CHECK: $sgpr63 = V_READLANE_B32 $vgpr0, 32
+# CHECK: $sgpr62 = V_READLANE_B32 $vgpr0, 31
+# CHECK: $sgpr61 = V_READLANE_B32 $vgpr0, 30
+# CHECK: $sgpr60 = V_READLANE_B32 $vgpr0, 29
+# CHECK: $sgpr59 = V_READLANE_B32 $vgpr0, 28
+# CHECK: $sgpr58 = V_READLANE_B32 $vgpr0, 27
+# CHECK: $sgpr57 = V_READLANE_B32 $vgpr0, 26
+# CHECK: $sgpr56 = V_READLANE_B32 $vgpr0, 25
+# CHECK: $sgpr55 = V_READLANE_B32 $vgpr0, 24
+# CHECK: $sgpr54 = V_READLANE_B32 $vgpr0, 23
+# CHECK: $sgpr53 = V_READLANE_B32 $vgpr0, 22
+# CHECK: $sgpr52 = V_READLANE_B32 $vgpr0, 21
+# CHECK: $sgpr51 = V_READLANE_B32 $vgpr0, 20
+# CHECK: $sgpr50 = V_READLANE_B32 $vgpr0, 19
+# CHECK: $sgpr49 = V_READLANE_B32 $vgpr0, 18
+# CHECK: $sgpr48 = V_READLANE_B32 $vgpr0, 17
+# CHECK: $sgpr47 = V_READLANE_B32 $vgpr0, 16
+# CHECK: $sgpr46 = V_READLANE_B32 $vgpr0, 15
+# CHECK: $sgpr45 = V_READLANE_B32 $vgpr0, 14
+# CHECK: $sgpr44 = V_READLANE_B32 $vgpr0, 13
+# CHECK: $sgpr43 = V_READLANE_B32 $vgpr0, 12
+# CHECK: $sgpr42 = V_READLANE_B32 $vgpr0, 11
+# CHECK: $sgpr41 = V_READLANE_B32 $vgpr0, 10
+# CHECK: $sgpr40 = V_READLANE_B32 $vgpr0, 9
+# CHECK: $sgpr39 = V_READLANE_B32 $vgpr0, 8
+# CHECK: $sgpr38 = V_READLANE_B32 $vgpr0, 7
+# CHECK: $sgpr37 = V_READLANE_B32 $vgpr0, 6
+# CHECK: $sgpr36 = V_READLANE_B32 $vgpr0, 5
+# CHECK: $sgpr35 = V_READLANE_B32 $vgpr0, 4
+# CHECK: $sgpr34 = V_READLANE_B32 $vgpr0, 3
+# CHECK: $sgpr33 = V_READLANE_B32 $vgpr0, 2
+# CHECK: $sgpr31 = V_READLANE_B32 $vgpr0, 1
+# CHECK: $sgpr30 = V_READLANE_B32 $vgpr0, 0
+# CHECK: $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+# CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec
+# CHECK: $vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec
+# CHECK: $exec = S_MOV_B64 killed $sgpr4_sgpr5
+# CHECK: S_WAITCNT 3952
+# CHECK: S_SETPC_B64_return undef $sgpr30_sgpr31
+
+--- |
+  ; ModuleID = '../llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.ll'
+  source_filename = "../llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.ll"
+  target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
+  target triple = "amdgcn-amd-amdhsa"
+  
+  ; Function Attrs: nounwind
+  define void @branch_no_terminators(i32 addrspace(1)* %arg) #0 {
+  entry:
+    %cnd = tail call i32 @llvm.amdgcn.workgroup.id.x() #4
+    %sgpr0 = tail call i32 asm sideeffect "s_mov_b32 s0, 0", "={s0}"() #4
+    %sgpr1 = tail call i32 asm sideeffect "s_mov_b32 s1, 0", "={s1}"() #4
+    %sgpr2 = tail call i32 asm sideeffect "s_mov_b32 s2, 0", "={s2}"() #4
+    %sgpr3 = tail call i32 asm sideeffect "s_mov_b32 s3, 0", "={s3}"() #4
+    %sgpr4 = tail call i32 asm sideeffect "s_mov_b32 s4, 0", "={s4}"() #4
+    %sgpr5 = tail call i32 asm sideeffect "s_mov_b32 s5, 0", "={s5}"() #4
+    %sgpr6 = tail call i32 asm sideeffect "s_mov_b32 s6, 0", "={s6}"() #4
+    %sgpr7 = tail call i32 asm sideeffect "s_mov_b32 s7, 0", "={s7}"() #4
+    %sgpr8 = tail call i32 asm sideeffect "s_mov_b32 s8, 0", "={s8}"() #4
+    %sgpr9 = tail call i32 asm sideeffect "s_mov_b32 s9, 0", "={s9}"() #4
+    %sgpr10 = tail call i32 asm sideeffect "s_mov_b32 s10, 0", "={s10}"() #4
+    %sgpr11 = tail call i32 asm sideeffect "s_mov_b32 s11, 0", "={s11}"() #4
+    %sgpr12 = tail call i32 asm sideeffect "s_mov_b32 s12, 0", "={s12}"() #4
+    %sgpr13 = tail call i32 asm sideeffect "s_mov_b32 s13, 0", "={s13}"() #4
+    %sgpr14 = tail call i32 asm sideeffect "s_mov_b32 s14, 0", "={s14}"() #4
+    %sgpr15 = tail call i32 asm sideeffect "s_mov_b32 s15, 0", "={s15}"() #4
+    %sgpr16 = tail call i32 asm sideeffect "s_mov_b32 s16, 0", "={s16}"() #4
+    %sgpr17 = tail call i32 asm sideeffect "s_mov_b32 s17, 0", "={s17}"() #4
+    %sgpr18 = tail call i32 asm sideeffect "s_mov_b32 s18, 0", "={s18}"() #4
+    %sgpr19 = tail call i32 asm sideeffect "s_mov_b32 s19, 0", "={s19}"() #4
+    %sgpr20 = tail call i32 asm sideeffect "s_mov_b32 s20, 0", "={s20}"() #4
+    %sgpr21 = tail call i32 asm sideeffect "s_mov_b32 s21, 0", "={s21}"() #4
+    %sgpr22 = tail call i32 asm sideeffect "s_mov_b32 s22, 0", "={s22}"() #4
+    %sgpr23 = tail call i32 asm sideeffect "s_mov_b32 s23, 0", "={s23}"() #4
+    %sgpr24 = tail call i32 asm sideeffect "s_mov_b32 s24, 0", "={s24}"() #4
+    %sgpr25 = tail call i32 asm sideeffect "s_mov_b32 s25, 0", "={s25}"() #4
+    %sgpr26 = tail call i32 asm sideeffect "s_mov_b32 s26, 0", "={s26}"() #4
+    %sgpr27 = tail call i32 asm sideeffect "s_mov_b32 s27, 0", "={s27}"() #4
+    %sgpr28 = tail call i32 asm sideeffect "s_mov_b32 s28, 0", "={s28}"() #4
+    %sgpr29 = tail call i32 asm sideeffect "s_mov_b32 s29, 0", "={s29}"() #4
+    %sgpr30 = tail call i32 asm sideeffect "s_mov_b32 s30, 0", "={s30}"() #4
+    %sgpr31 = tail call i32 asm sideeffect "s_mov_b32 s31, 0", "={s31}"() #4
+    %sgpr32 = tail call i32 asm sideeffect "s_mov_b32 s32, 0", "={s32}"() #4
+    %sgpr33 = tail call i32 asm sideeffect "s_mov_b32 s33, 0", "={s33}"() #4
+    %sgpr34 = tail call i32 asm sideeffect "s_mov_b32 s34, 0", "={s34}"() #4
+    %sgpr35 = tail call i32 asm sideeffect "s_mov_b32 s35, 0", "={s35}"() #4
+    %sgpr36 = tail call i32 asm sideeffect "s_mov_b32 s36, 0", "={s36}"() #4
+    %sgpr37 = tail call i32 asm sideeffect "s_mov_b32 s37, 0", "={s37}"() #4
+    %sgpr38 = tail call i32 asm sideeffect "s_mov_b32 s38, 0", "={s38}"() #4
+    %sgpr39 = tail call i32 asm sideeffect "s_mov_b32 s39, 0", "={s39}"() #4
+    %sgpr40 = tail call i32 asm sideeffect "s_mov_b32 s40, 0", "={s40}"() #4
+    %sgpr41 = tail call i32 asm sideeffect "s_mov_b32 s41, 0", "={s41}"() #4
+    %sgpr42 = tail call i32 asm sideeffect "s_mov_b32 s42, 0", "={s42}"() #4
+    %sgpr43 = tail call i32 asm sideeffect "s_mov_b32 s43, 0", "={s43}"() #4
+    %sgpr44 = tail call i32 asm sideeffect "s_mov_b32 s44, 0", "={s44}"() #4
+    %sgpr45 = tail call i32 asm sideeffect "s_mov_b32 s45, 0", "={s45}"() #4
+    %sgpr46 = tail call i32 asm sideeffect "s_mov_b32 s46, 0", "={s46}"() #4
+    %sgpr47 = tail call i32 asm sideeffect "s_mov_b32 s47, 0", "={s47}"() #4
+    %sgpr48 = tail call i32 asm sideeffect "s_mov_b32 s48, 0", "={s48}"() #4
+    %sgpr49 = tail call i32 asm sideeffect "s_mov_b32 s49, 0", "={s49}"() #4
+    %sgpr50 = tail call i32 asm sideeffect "s_mov_b32 s50, 0", "={s50}"() #4
+    %sgpr51 = tail call i32 asm sideeffect "s_mov_b32 s51, 0", "={s51}"() #4
+    %sgpr52 = tail call i32 asm sideeffect "s_mov_b32 s52, 0", "={s52}"() #4
+    %sgpr53 = tail call i32 asm sideeffect "s_mov_b32 s53, 0", "={s53}"() #4
+    %sgpr54 = tail call i32 asm sideeffect "s_mov_b32 s54, 0", "={s54}"() #4
+    %sgpr55 = tail call i32 asm sideeffect "s_mov_b32 s55, 0", "={s55}"() #4
+    %sgpr56 = tail call i32 asm sideeffect "s_mov_b32 s56, 0", "={s56}"() #4
+    %sgpr57 = tail call i32 asm sideeffect "s_mov_b32 s57, 0", "={s57}"() #4
+    %sgpr58 = tail call i32 asm sideeffect "s_mov_b32 s58, 0", "={s58}"() #4
+    %sgpr59 = tail call i32 asm sideeffect "s_mov_b32 s59, 0", "={s59}"() #4
+    %sgpr60 = tail call i32 asm sideeffect "s_mov_b32 s60, 0", "={s60}"() #4
+    %sgpr61 = tail call i32 asm sideeffect "s_mov_b32 s61, 0", "={s61}"() #4
+    %sgpr62 = tail call i32 asm sideeffect "s_mov_b32 s62, 0", "={s62}"() #4
+    %sgpr63 = tail call i32 asm sideeffect "s_mov_b32 s63, 0", "={s63}"() #4
+    %sgpr64 = tail call i32 asm sideeffect "s_mov_b32 s64, 0", "={s64}"() #4
+    %sgpr65 = tail call i32 asm sideeffect "s_mov_b32 s65, 0", "={s65}"() #4
+    %sgpr66 = tail call i32 asm sideeffect "s_mov_b32 s66, 0", "={s66}"() #4
+    %sgpr67 = tail call i32 asm sideeffect "s_mov_b32 s67, 0", "={s67}"() #4
+    %sgpr68 = tail call i32 asm sideeffect "s_mov_b32 s68, 0", "={s68}"() #4
+    %sgpr69 = tail call i32 asm sideeffect "s_mov_b32 s69, 0", "={s69}"() #4
+    %sgpr70 = tail call i32 asm sideeffect "s_mov_b32 s70, 0", "={s70}"() #4
+    %sgpr71 = tail call i32 asm sideeffect "s_mov_b32 s71, 0", "={s71}"() #4
+    %sgpr72 = tail call i32 asm sideeffect "s_mov_b32 s72, 0", "={s72}"() #4
+    %sgpr73 = tail call i32 asm sideeffect "s_mov_b32 s73, 0", "={s73}"() #4
+    %sgpr74 = tail call i32 asm sideeffect "s_mov_b32 s74, 0", "={s74}"() #4
+    %sgpr75 = tail call i32 asm sideeffect "s_mov_b32 s75, 0", "={s75}"() #4
+    %sgpr76 = tail call i32 asm sideeffect "s_mov_b32 s76, 0", "={s76}"() #4
+    %sgpr77 = tail call i32 asm sideeffect "s_mov_b32 s77, 0", "={s77}"() #4
+    %sgpr78 = tail call i32 asm sideeffect "s_mov_b32 s78, 0", "={s78}"() #4
+    %sgpr79 = tail call i32 asm sideeffect "s_mov_b32 s79, 0", "={s79}"() #4
+    %sgpr80 = tail call i32 asm sideeffect "s_mov_b32 s80, 0", "={s80}"() #4
+    %sgpr81 = tail call i32 asm sideeffect "s_mov_b32 s81, 0", "={s81}"() #4
+    %sgpr82 = tail call i32 asm sideeffect "s_mov_b32 s82, 0", "={s82}"() #4
+    %sgpr83 = tail call i32 asm sideeffect "s_mov_b32 s83, 0", "={s83}"() #4
+    %sgpr84 = tail call i32 asm sideeffect "s_mov_b32 s84, 0", "={s84}"() #4
+    %sgpr85 = tail call i32 asm sideeffect "s_mov_b32 s85, 0", "={s85}"() #4
+    %sgpr86 = tail call i32 asm sideeffect "s_mov_b32 s86, 0", "={s86}"() #4
+    %sgpr87 = tail call i32 asm sideeffect "s_mov_b32 s87, 0", "={s87}"() #4
+    %sgpr88 = tail call i32 asm sideeffect "s_mov_b32 s88, 0", "={s88}"() #4
+    %sgpr89 = tail call i32 asm sideeffect "s_mov_b32 s89, 0", "={s89}"() #4
+    %sgpr90 = tail call i32 asm sideeffect "s_mov_b32 s90, 0", "={s90}"() #4
+    %sgpr91 = tail call i32 asm sideeffect "s_mov_b32 s91, 0", "={s91}"() #4
+    %sgpr92 = tail call i32 asm sideeffect "s_mov_b32 s92, 0", "={s92}"() #4
+    %sgpr93 = tail call i32 asm sideeffect "s_mov_b32 s93, 0", "={s93}"() #4
+    %sgpr94 = tail call i32 asm sideeffect "s_mov_b32 s94, 0", "={s94}"() #4
+    %sgpr95 = tail call i32 asm sideeffect "s_mov_b32 s95, 0", "={s95}"() #4
+    %sgpr96 = tail call i32 asm sideeffect "s_mov_b32 s96, 0", "={s96}"() #4
+    %sgpr97 = tail call i32 asm sideeffect "s_mov_b32 s97, 0", "={s97}"() #4
+    %sgpr98 = tail call i32 asm sideeffect "s_mov_b32 s98, 0", "={s98}"() #4
+    %sgpr99 = tail call i32 asm sideeffect "s_mov_b32 s99, 0", "={s99}"() #4
+    %sgpr100 = tail call i32 asm sideeffect "s_mov_b32 s100, 0", "={s100}"() #4
+    %sgpr101 = tail call i32 asm sideeffect "s_mov_b32 s101, 0", "={s101}"() #4
+    %vcc_lo = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_lo}"() #4
+    %vcc_hi = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_hi}"() #4
+    %cmp = icmp ne i32 %cnd, 0
+    br i1 %cmp, label %bb2.preheader, label %Flow1, !amdgpu.uniform !0
+  
+  bb2.preheader:                                    ; preds = %entry
+    br label %bb2, !amdgpu.uniform !0
+  
+  Flow1:                                            ; preds = %Flow, %entry
+    br label %bb3, !amdgpu.uniform !0
+  
+  bb2:                                              ; preds = %bb2.preheader, %bb2
+    %res = call i32 asm sideeffect "v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64", "=s"() #4
+    %cmp1 = icmp eq i32 %res, 0
+    br i1 %cmp1, label %Flow, label %bb2, !amdgpu.uniform !0
+  
+  Flow:                                             ; preds = %bb2
+    br label %Flow1, !amdgpu.uniform !0
+  
+  bb3:                                              ; preds = %Flow1
+    tail call void asm sideeffect "; reg use $0", "{s0}"(i32 %sgpr0) #4
+    tail call void asm sideeffect "; reg use $0", "{s1}"(i32 %sgpr1) #4
+    tail call void asm sideeffect "; reg use $0", "{s2}"(i32 %sgpr2) #4
+    tail call void asm sideeffect "; reg use $0", "{s3}"(i32 %sgpr3) #4
+    tail call void asm sideeffect "; reg use $0", "{s4}"(i32 %sgpr4) #4
+    tail call void asm sideeffect "; reg use $0", "{s5}"(i32 %sgpr5) #4
+    tail call void asm sideeffect "; reg use $0", "{s6}"(i32 %sgpr6) #4
+    tail call void asm sideeffect "; reg use $0", "{s7}"(i32 %sgpr7) #4
+    tail call void asm sideeffect "; reg use $0", "{s8}"(i32 %sgpr8) #4
+    tail call void asm sideeffect "; reg use $0", "{s9}"(i32 %sgpr9) #4
+    tail call void asm sideeffect "; reg use $0", "{s10}"(i32 %sgpr10) #4
+    tail call void asm sideeffect "; reg use $0", "{s11}"(i32 %sgpr11) #4
+    tail call void asm sideeffect "; reg use $0", "{s12}"(i32 %sgpr12) #4
+    tail call void asm sideeffect "; reg use $0", "{s13}"(i32 %sgpr13) #4
+    tail call void asm sideeffect "; reg use $0", "{s14}"(i32 %sgpr14) #4
+    tail call void asm sideeffect "; reg use $0", "{s15}"(i32 %sgpr15) #4
+    tail call void asm sideeffect "; reg use $0", "{s16}"(i32 %sgpr16) #4
+    tail call void asm sideeffect "; reg use $0", "{s17}"(i32 %sgpr17) #4
+    tail call void asm sideeffect "; reg use $0", "{s18}"(i32 %sgpr18) #4
+    tail call void asm sideeffect "; reg use $0", "{s19}"(i32 %sgpr19) #4
+    tail call void asm sideeffect "; reg use $0", "{s20}"(i32 %sgpr20) #4
+    tail call void asm sideeffect "; reg use $0", "{s21}"(i32 %sgpr21) #4
+    tail call void asm sideeffect "; reg use $0", "{s22}"(i32 %sgpr22) #4
+    tail call void asm sideeffect "; reg use $0", "{s23}"(i32 %sgpr23) #4
+    tail call void asm sideeffect "; reg use $0", "{s24}"(i32 %sgpr24) #4
+    tail call void asm sideeffect "; reg use $0", "{s25}"(i32 %sgpr25) #4
+    tail call void asm sideeffect "; reg use $0", "{s26}"(i32 %sgpr26) #4
+    tail call void asm sideeffect "; reg use $0", "{s27}"(i32 %sgpr27) #4
+    tail call void asm sideeffect "; reg use $0", "{s28}"(i32 %sgpr28) #4
+    tail call void asm sideeffect "; reg use $0", "{s29}"(i32 %sgpr29) #4
+    tail call void asm sideeffect "; reg use $0", "{s30}"(i32 %sgpr30) #4
+    tail call void asm sideeffect "; reg use $0", "{s31}"(i32 %sgpr31) #4
+    tail call void asm sideeffect "; reg use $0", "{s32}"(i32 %sgpr32) #4
+    tail call void asm sideeffect "; reg use $0", "{s33}"(i32 %sgpr33) #4
+    tail call void asm sideeffect "; reg use $0", "{s34}"(i32 %sgpr34) #4
+    tail call void asm sideeffect "; reg use $0", "{s35}"(i32 %sgpr35) #4
+    tail call void asm sideeffect "; reg use $0", "{s36}"(i32 %sgpr36) #4
+    tail call void asm sideeffect "; reg use $0", "{s37}"(i32 %sgpr37) #4
+    tail call void asm sideeffect "; reg use $0", "{s38}"(i32 %sgpr38) #4
+    tail call void asm sideeffect "; reg use $0", "{s39}"(i32 %sgpr39) #4
+    tail call void asm sideeffect "; reg use $0", "{s40}"(i32 %sgpr40) #4
+    tail call void asm sideeffect "; reg use $0", "{s41}"(i32 %sgpr41) #4
+    tail call void asm sideeffect "; reg use $0", "{s42}"(i32 %sgpr42) #4
+    tail call void asm sideeffect "; reg use $0", "{s43}"(i32 %sgpr43) #4
+    tail call void asm sideeffect "; reg use $0", "{s44}"(i32 %sgpr44) #4
+    tail call void asm sideeffect "; reg use $0", "{s45}"(i32 %sgpr45) #4
+    tail call void asm sideeffect "; reg use $0", "{s46}"(i32 %sgpr46) #4
+    tail call void asm sideeffect "; reg use $0", "{s47}"(i32 %sgpr47) #4
+    tail call void asm sideeffect "; reg use $0", "{s48}"(i32 %sgpr48) #4
+    tail call void asm sideeffect "; reg use $0", "{s49}"(i32 %sgpr49) #4
+    tail call void asm sideeffect "; reg use $0", "{s50}"(i32 %sgpr50) #4
+    tail call void asm sideeffect "; reg use $0", "{s51}"(i32 %sgpr51) #4
+    tail call void asm sideeffect "; reg use $0", "{s52}"(i32 %sgpr52) #4
+    tail call void asm sideeffect "; reg use $0", "{s53}"(i32 %sgpr53) #4
+    tail call void asm sideeffect "; reg use $0", "{s54}"(i32 %sgpr54) #4
+    tail call void asm sideeffect "; reg use $0", "{s55}"(i32 %sgpr55) #4
+    tail call void asm sideeffect "; reg use $0", "{s56}"(i32 %sgpr56) #4
+    tail call void asm sideeffect "; reg use $0", "{s57}"(i32 %sgpr57) #4
+    tail call void asm sideeffect "; reg use $0", "{s58}"(i32 %sgpr58) #4
+    tail call void asm sideeffect "; reg use $0", "{s59}"(i32 %sgpr59) #4
+    tail call void asm sideeffect "; reg use $0", "{s60}"(i32 %sgpr60) #4
+    tail call void asm sideeffect "; reg use $0", "{s61}"(i32 %sgpr61) #4
+    tail call void asm sideeffect "; reg use $0", "{s62}"(i32 %sgpr62) #4
+    tail call void asm sideeffect "; reg use $0", "{s63}"(i32 %sgpr63) #4
+    tail call void asm sideeffect "; reg use $0", "{s64}"(i32 %sgpr64) #4
+    tail call void asm sideeffect "; reg use $0", "{s65}"(i32 %sgpr65) #4
+    tail call void asm sideeffect "; reg use $0", "{s66}"(i32 %sgpr66) #4
+    tail call void asm sideeffect "; reg use $0", "{s67}"(i32 %sgpr67) #4
+    tail call void asm sideeffect "; reg use $0", "{s68}"(i32 %sgpr68) #4
+    tail call void asm sideeffect "; reg use $0", "{s69}"(i32 %sgpr69) #4
+    tail call void asm sideeffect "; reg use $0", "{s70}"(i32 %sgpr70) #4
+    tail call void asm sideeffect "; reg use $0", "{s71}"(i32 %sgpr71) #4
+    tail call void asm sideeffect "; reg use $0", "{s72}"(i32 %sgpr72) #4
+    tail call void asm sideeffect "; reg use $0", "{s73}"(i32 %sgpr73) #4
+    tail call void asm sideeffect "; reg use $0", "{s74}"(i32 %sgpr74) #4
+    tail call void asm sideeffect "; reg use $0", "{s75}"(i32 %sgpr75) #4
+    tail call void asm sideeffect "; reg use $0", "{s76}"(i32 %sgpr76) #4
+    tail call void asm sideeffect "; reg use $0", "{s77}"(i32 %sgpr77) #4
+    tail call void asm sideeffect "; reg use $0", "{s78}"(i32 %sgpr78) #4
+    tail call void asm sideeffect "; reg use $0", "{s79}"(i32 %sgpr79) #4
+    tail call void asm sideeffect "; reg use $0", "{s80}"(i32 %sgpr80) #4
+    tail call void asm sideeffect "; reg use $0", "{s81}"(i32 %sgpr81) #4
+    tail call void asm sideeffect "; reg use $0", "{s82}"(i32 %sgpr82) #4
+    tail call void asm sideeffect "; reg use $0", "{s83}"(i32 %sgpr83) #4
+    tail call void asm sideeffect "; reg use $0", "{s84}"(i32 %sgpr84) #4
+    tail call void asm sideeffect "; reg use $0", "{s85}"(i32 %sgpr85) #4
+    tail call void asm sideeffect "; reg use $0", "{s86}"(i32 %sgpr86) #4
+    tail call void asm sideeffect "; reg use $0", "{s87}"(i32 %sgpr87) #4
+    tail call void asm sideeffect "; reg use $0", "{s88}"(i32 %sgpr88) #4
+    tail call void asm sideeffect "; reg use $0", "{s89}"(i32 %sgpr89) #4
+    tail call void asm sideeffect "; reg use $0", "{s90}"(i32 %sgpr90) #4
+    tail call void asm sideeffect "; reg use $0", "{s91}"(i32 %sgpr91) #4
+    tail call void asm sideeffect "; reg use $0", "{s92}"(i32 %sgpr92) #4
+    tail call void asm sideeffect "; reg use $0", "{s93}"(i32 %sgpr93) #4
+    tail call void asm sideeffect "; reg use $0", "{s94}"(i32 %sgpr94) #4
+    tail call void asm sideeffect "; reg use $0", "{s95}"(i32 %sgpr95) #4
+    tail call void asm sideeffect "; reg use $0", "{s96}"(i32 %sgpr96) #4
+    tail call void asm sideeffect "; reg use $0", "{s97}"(i32 %sgpr97) #4
+    tail call void asm sideeffect "; reg use $0", "{s98}"(i32 %sgpr98) #4
+    tail call void asm sideeffect "; reg use $0", "{s99}"(i32 %sgpr99) #4
+    tail call void asm sideeffect "; reg use $0", "{s100}"(i32 %sgpr100) #4
+    tail call void asm sideeffect "; reg use $0", "{s101}"(i32 %sgpr101) #4
+    tail call void asm sideeffect "; reg use $0", "{vcc_lo}"(i32 %vcc_lo) #4
+    tail call void asm sideeffect "; reg use $0", "{vcc_hi}"(i32 %vcc_hi) #4
+    ret void
+  }
+  
+  ; Function Attrs: nounwind readnone speculatable willreturn
+  declare i32 @llvm.amdgcn.workgroup.id.x() #1
+  
+  ; Function Attrs: convergent nounwind willreturn
+  declare { i1, i64 } @llvm.amdgcn.if.i64(i1) #2
+  
+  ; Function Attrs: convergent nounwind willreturn
+  declare { i1, i64 } @llvm.amdgcn.else.i64.i64(i64) #2
+  
+  ; Function Attrs: convergent nounwind readnone willreturn
+  declare i64 @llvm.amdgcn.if.break.i64(i1, i64) #3
+  
+  ; Function Attrs: convergent nounwind willreturn
+  declare i1 @llvm.amdgcn.loop.i64(i64) #2
+  
+  ; Function Attrs: convergent nounwind willreturn
+  declare void @llvm.amdgcn.end.cf.i64(i64) #2
+  
+  attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
+  attributes #1 = { nounwind readnone speculatable willreturn "target-cpu"="gfx90a" }
+  attributes #2 = { convergent nounwind willreturn }
+  attributes #3 = { convergent nounwind readnone willreturn }
+  attributes #4 = { nounwind }
+  
+  !0 = !{}
+
+...
+---
+name:            branch_no_terminators
+alignment:       1
+tracksRegLiveness: true
+liveins:
+  - { reg: '$sgpr12' }
+body:             |
+  bb.0.entry:
+    successors: %bb.1(0x50000000), %bb.4(0x30000000)
+    liveins: $sgpr12, $sgpr30, $sgpr31, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32
+  
+    S_WAITCNT 0
+    $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+    BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec
+    BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec
+    $exec = S_MOV_B64 killed $sgpr4_sgpr5
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 $sgpr33, 2, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr34, 3, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr35, 4, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr36, 5, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr37, 6, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr38, 7, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr39, 8, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr40, 9, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr41, 10, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr42, 11, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr43, 12, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr44, 13, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr45, 14, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr46, 15, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr47, 16, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr48, 17, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr49, 18, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr50, 19, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr51, 20, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr52, 21, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr53, 22, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr54, 23, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr55, 24, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr56, 25, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr57, 26, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr58, 27, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr59, 28, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr60, 29, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr61, 30, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr62, 31, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr63, 32, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr64, 33, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr65, 34, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr66, 35, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr67, 36, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr68, 37, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr69, 38, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr70, 39, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr71, 40, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr72, 41, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr73, 42, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr74, 43, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr75, 44, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr76, 45, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr77, 46, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr78, 47, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr79, 48, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr80, 49, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr81, 50, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr82, 51, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr83, 52, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr84, 53, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr85, 54, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr86, 55, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr87, 56, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr88, 57, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr95, 0, $vgpr1
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr89, 58, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr96, 1, $vgpr1
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr90, 59, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr97, 2, $vgpr1
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr91, 60, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr98, 3, $vgpr1
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr92, 61, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr99, 4, $vgpr1
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr93, 62, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr100, 5, $vgpr1
+    $sgpr81 = S_MOV_B32 killed $sgpr12
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr94, 63, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr101, 6, $vgpr1
+    S_CMP_EQ_U32 killed renamable $sgpr81, 0, implicit-def $scc
+    INLINEASM &"s_mov_b32 s0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr0
+    INLINEASM &"s_mov_b32 s1, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr1
+    INLINEASM &"s_mov_b32 s2, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr2
+    INLINEASM &"s_mov_b32 s3, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr3
+    INLINEASM &"s_mov_b32 s4, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr4
+    INLINEASM &"s_mov_b32 s5, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr5
+    INLINEASM &"s_mov_b32 s6, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr6
+    INLINEASM &"s_mov_b32 s7, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr7
+    INLINEASM &"s_mov_b32 s8, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr8
+    INLINEASM &"s_mov_b32 s9, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr9
+    INLINEASM &"s_mov_b32 s10, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr10
+    INLINEASM &"s_mov_b32 s11, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr11
+    INLINEASM &"s_mov_b32 s12, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr12
+    INLINEASM &"s_mov_b32 s13, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr13
+    INLINEASM &"s_mov_b32 s14, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr14
+    INLINEASM &"s_mov_b32 s15, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr15
+    INLINEASM &"s_mov_b32 s16, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr16
+    INLINEASM &"s_mov_b32 s17, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr17
+    INLINEASM &"s_mov_b32 s18, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr18
+    INLINEASM &"s_mov_b32 s19, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr19
+    INLINEASM &"s_mov_b32 s20, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr20
+    INLINEASM &"s_mov_b32 s21, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr21
+    INLINEASM &"s_mov_b32 s22, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr22
+    INLINEASM &"s_mov_b32 s23, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr23
+    INLINEASM &"s_mov_b32 s24, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr24
+    INLINEASM &"s_mov_b32 s25, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr25
+    INLINEASM &"s_mov_b32 s26, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr26
+    INLINEASM &"s_mov_b32 s27, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr27
+    INLINEASM &"s_mov_b32 s28, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr28
+    INLINEASM &"s_mov_b32 s29, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr29
+    INLINEASM &"s_mov_b32 s30, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr30
+    INLINEASM &"s_mov_b32 s31, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr31
+    INLINEASM &"s_mov_b32 s32, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr32
+    INLINEASM &"s_mov_b32 s33, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr33
+    INLINEASM &"s_mov_b32 s34, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr34
+    INLINEASM &"s_mov_b32 s35, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr35
+    INLINEASM &"s_mov_b32 s36, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr36
+    INLINEASM &"s_mov_b32 s37, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr37
+    INLINEASM &"s_mov_b32 s38, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr38
+    INLINEASM &"s_mov_b32 s39, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr39
+    INLINEASM &"s_mov_b32 s40, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr40
+    INLINEASM &"s_mov_b32 s41, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr41
+    INLINEASM &"s_mov_b32 s42, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr42
+    INLINEASM &"s_mov_b32 s43, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr43
+    INLINEASM &"s_mov_b32 s44, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr44
+    INLINEASM &"s_mov_b32 s45, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr45
+    INLINEASM &"s_mov_b32 s46, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr46
+    INLINEASM &"s_mov_b32 s47, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr47
+    INLINEASM &"s_mov_b32 s48, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr48
+    INLINEASM &"s_mov_b32 s49, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr49
+    INLINEASM &"s_mov_b32 s50, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr50
+    INLINEASM &"s_mov_b32 s51, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr51
+    INLINEASM &"s_mov_b32 s52, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr52
+    INLINEASM &"s_mov_b32 s53, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr53
+    INLINEASM &"s_mov_b32 s54, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr54
+    INLINEASM &"s_mov_b32 s55, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr55
+    INLINEASM &"s_mov_b32 s56, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr56
+    INLINEASM &"s_mov_b32 s57, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr57
+    INLINEASM &"s_mov_b32 s58, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr58
+    INLINEASM &"s_mov_b32 s59, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr59
+    INLINEASM &"s_mov_b32 s60, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr60
+    INLINEASM &"s_mov_b32 s61, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr61
+    INLINEASM &"s_mov_b32 s62, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr62
+    INLINEASM &"s_mov_b32 s63, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr63
+    INLINEASM &"s_mov_b32 s64, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr64
+    INLINEASM &"s_mov_b32 s65, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr65
+    INLINEASM &"s_mov_b32 s66, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr66
+    INLINEASM &"s_mov_b32 s67, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr67
+    INLINEASM &"s_mov_b32 s68, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr68
+    INLINEASM &"s_mov_b32 s69, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr69
+    INLINEASM &"s_mov_b32 s70, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr70
+    INLINEASM &"s_mov_b32 s71, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr71
+    INLINEASM &"s_mov_b32 s72, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr72
+    INLINEASM &"s_mov_b32 s73, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr73
+    INLINEASM &"s_mov_b32 s74, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr74
+    INLINEASM &"s_mov_b32 s75, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr75
+    INLINEASM &"s_mov_b32 s76, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr76
+    INLINEASM &"s_mov_b32 s77, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr77
+    INLINEASM &"s_mov_b32 s78, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr78
+    INLINEASM &"s_mov_b32 s79, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr79
+    INLINEASM &"s_mov_b32 s80, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr80
+    INLINEASM &"s_mov_b32 s81, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr81
+    INLINEASM &"s_mov_b32 s82, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr82
+    INLINEASM &"s_mov_b32 s83, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr83
+    INLINEASM &"s_mov_b32 s84, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr84
+    INLINEASM &"s_mov_b32 s85, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr85
+    INLINEASM &"s_mov_b32 s86, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr86
+    INLINEASM &"s_mov_b32 s87, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr87
+    INLINEASM &"s_mov_b32 s88, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr88
+    INLINEASM &"s_mov_b32 s89, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr89
+    INLINEASM &"s_mov_b32 s90, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr90
+    INLINEASM &"s_mov_b32 s91, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr91
+    INLINEASM &"s_mov_b32 s92, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr92
+    INLINEASM &"s_mov_b32 s93, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr93
+    INLINEASM &"s_mov_b32 s94, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr94
+    INLINEASM &"s_mov_b32 s95, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr95
+    INLINEASM &"s_mov_b32 s96, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr96
+    INLINEASM &"s_mov_b32 s97, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr97
+    INLINEASM &"s_mov_b32 s98, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr98
+    INLINEASM &"s_mov_b32 s99, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr99
+    INLINEASM &"s_mov_b32 s100, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr100
+    INLINEASM &"s_mov_b32 s101, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $sgpr101
+    INLINEASM &"s_mov_b32 $0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_lo
+    INLINEASM &"s_mov_b32 $0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_hi
+    S_CBRANCH_SCC1 %bb.4, implicit killed $scc
+  
+  bb.1:
+    liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr81, 7, $vgpr1
+    $sgpr81 = S_MOV_B32 killed $sgpr82
+    $sgpr82 = S_MOV_B32 killed $sgpr83
+    $sgpr83 = S_MOV_B32 killed $sgpr84
+    $sgpr84 = S_MOV_B32 killed $sgpr85
+    $sgpr85 = S_MOV_B32 killed $sgpr86
+    $sgpr86 = S_MOV_B32 killed $sgpr87
+    $sgpr87 = S_MOV_B32 killed $sgpr88
+    $sgpr88 = S_MOV_B32 killed $sgpr89
+    $sgpr89 = S_MOV_B32 killed $sgpr90
+    $sgpr90 = S_MOV_B32 killed $sgpr91
+    $sgpr91 = S_MOV_B32 killed $sgpr92
+    $sgpr92 = S_MOV_B32 killed $sgpr93
+    $sgpr93 = S_MOV_B32 killed $sgpr94
+    $sgpr94 = S_MOV_B32 killed $sgpr95
+    $sgpr95 = S_MOV_B32 killed $sgpr96
+    $sgpr96 = S_MOV_B32 killed $sgpr97
+    $sgpr97 = S_MOV_B32 killed $sgpr98
+    $sgpr98 = S_MOV_B32 killed $sgpr99
+    $sgpr99 = S_MOV_B32 killed $sgpr100
+    $sgpr100 = S_MOV_B32 killed $sgpr101
+    $sgpr101 = S_MOV_B32 killed $vcc_lo
+    $vcc_lo = S_MOV_B32 killed $vcc_hi
+    $vcc_hi = S_MOV_B32 killed $sgpr80
+    $sgpr80 = S_MOV_B32 killed $sgpr79
+    $sgpr79 = S_MOV_B32 killed $sgpr78
+    $sgpr78 = S_MOV_B32 killed $sgpr77
+    $sgpr77 = S_MOV_B32 killed $sgpr76
+    $sgpr76 = S_MOV_B32 killed $sgpr75
+    $sgpr75 = S_MOV_B32 killed $sgpr74
+    $sgpr74 = S_MOV_B32 killed $sgpr73
+    $sgpr73 = S_MOV_B32 killed $sgpr72
+    $sgpr72 = S_MOV_B32 killed $sgpr71
+    $sgpr71 = S_MOV_B32 killed $sgpr70
+    $sgpr70 = S_MOV_B32 killed $sgpr69
+    $sgpr69 = S_MOV_B32 killed $sgpr68
+    $sgpr68 = S_MOV_B32 killed $sgpr67
+    $sgpr67 = S_MOV_B32 killed $sgpr66
+    $sgpr66 = S_MOV_B32 killed $sgpr65
+    $sgpr65 = S_MOV_B32 killed $sgpr64
+    $sgpr64 = S_MOV_B32 killed $sgpr63
+    $sgpr63 = S_MOV_B32 killed $sgpr62
+    $sgpr62 = S_MOV_B32 killed $sgpr61
+    $sgpr61 = S_MOV_B32 killed $sgpr60
+    $sgpr60 = S_MOV_B32 killed $sgpr59
+    $sgpr59 = S_MOV_B32 killed $sgpr58
+    $sgpr58 = S_MOV_B32 killed $sgpr57
+    $sgpr57 = S_MOV_B32 killed $sgpr56
+    $sgpr56 = S_MOV_B32 killed $sgpr55
+    $sgpr55 = S_MOV_B32 killed $sgpr54
+    $sgpr54 = S_MOV_B32 killed $sgpr53
+    $sgpr53 = S_MOV_B32 killed $sgpr52
+    $sgpr52 = S_MOV_B32 killed $sgpr51
+    $sgpr51 = S_MOV_B32 killed $sgpr50
+    $sgpr50 = S_MOV_B32 killed $sgpr49
+    $sgpr49 = S_MOV_B32 killed $sgpr48
+    $sgpr48 = S_MOV_B32 killed $sgpr47
+    $sgpr47 = S_MOV_B32 killed $sgpr46
+    $sgpr46 = S_MOV_B32 killed $sgpr45
+    $sgpr45 = S_MOV_B32 killed $sgpr44
+    $sgpr44 = S_MOV_B32 killed $sgpr43
+    $sgpr43 = S_MOV_B32 killed $sgpr42
+    $sgpr42 = S_MOV_B32 killed $sgpr41
+    $sgpr41 = S_MOV_B32 killed $sgpr40
+    $sgpr40 = S_MOV_B32 killed $sgpr39
+    $sgpr39 = S_MOV_B32 killed $sgpr38
+    $sgpr38 = S_MOV_B32 killed $sgpr37
+    $sgpr37 = S_MOV_B32 killed $sgpr36
+    $sgpr36 = S_MOV_B32 killed $sgpr35
+    $sgpr35 = S_MOV_B32 killed $sgpr34
+    $sgpr34 = S_MOV_B32 killed $sgpr31
+    $sgpr31 = S_MOV_B32 killed $sgpr30
+    $sgpr30 = S_MOV_B32 killed $sgpr29
+    $sgpr29 = S_MOV_B32 killed $sgpr28
+    $sgpr28 = S_MOV_B32 killed $sgpr27
+    $sgpr27 = S_MOV_B32 killed $sgpr26
+    $sgpr26 = S_MOV_B32 killed $sgpr25
+    $sgpr25 = S_MOV_B32 killed $sgpr24
+    $sgpr24 = S_MOV_B32 killed $sgpr23
+    $sgpr23 = S_MOV_B32 killed $sgpr22
+    $sgpr22 = S_MOV_B32 killed $sgpr21
+    $sgpr21 = S_MOV_B32 killed $sgpr20
+    $sgpr20 = S_MOV_B32 killed $sgpr19
+    $sgpr19 = S_MOV_B32 killed $sgpr18
+    $sgpr18 = S_MOV_B32 killed $sgpr17
+    $sgpr17 = S_MOV_B32 killed $sgpr16
+    $sgpr16 = S_MOV_B32 killed $sgpr15
+    $sgpr15 = S_MOV_B32 killed $sgpr14
+    $sgpr14 = S_MOV_B32 killed $sgpr13
+    $sgpr13 = S_MOV_B32 killed $sgpr12
+    $sgpr12 = S_MOV_B32 killed $sgpr11
+    $sgpr11 = S_MOV_B32 killed $sgpr10
+    $sgpr10 = S_MOV_B32 killed $sgpr9
+    $sgpr9 = S_MOV_B32 killed $sgpr8
+    $sgpr8 = S_MOV_B32 killed $sgpr7
+    $sgpr7 = S_MOV_B32 killed $sgpr6
+    $sgpr6 = S_MOV_B32 killed $sgpr5
+    $sgpr5 = S_MOV_B32 killed $sgpr4
+  
+  bb.2.bb2:
+    successors: %bb.3(0x04000000), %bb.2(0x7c000000)
+    liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  
+    INLINEASM &"v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64", 1 /* sideeffect attdialect */, 2097162 /* regdef:SReg_32 */, def renamable $sgpr4
+    S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
+    S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  
+  bb.3.Flow:
+    liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  
+    $sgpr4 = S_MOV_B32 killed $sgpr5
+    $sgpr5 = S_MOV_B32 killed $sgpr6
+    $sgpr6 = S_MOV_B32 killed $sgpr7
+    $sgpr7 = S_MOV_B32 killed $sgpr8
+    $sgpr8 = S_MOV_B32 killed $sgpr9
+    $sgpr9 = S_MOV_B32 killed $sgpr10
+    $sgpr10 = S_MOV_B32 killed $sgpr11
+    $sgpr11 = S_MOV_B32 killed $sgpr12
+    $sgpr12 = S_MOV_B32 killed $sgpr13
+    $sgpr13 = S_MOV_B32 killed $sgpr14
+    $sgpr14 = S_MOV_B32 killed $sgpr15
+    $sgpr15 = S_MOV_B32 killed $sgpr16
+    $sgpr16 = S_MOV_B32 killed $sgpr17
+    $sgpr17 = S_MOV_B32 killed $sgpr18
+    $sgpr18 = S_MOV_B32 killed $sgpr19
+    $sgpr19 = S_MOV_B32 killed $sgpr20
+    $sgpr20 = S_MOV_B32 killed $sgpr21
+    $sgpr21 = S_MOV_B32 killed $sgpr22
+    $sgpr22 = S_MOV_B32 killed $sgpr23
+    $sgpr23 = S_MOV_B32 killed $sgpr24
+    $sgpr24 = S_MOV_B32 killed $sgpr25
+    $sgpr25 = S_MOV_B32 killed $sgpr26
+    $sgpr26 = S_MOV_B32 killed $sgpr27
+    $sgpr27 = S_MOV_B32 killed $sgpr28
+    $sgpr28 = S_MOV_B32 killed $sgpr29
+    $sgpr29 = S_MOV_B32 killed $sgpr30
+    $sgpr30 = S_MOV_B32 killed $sgpr31
+    $sgpr31 = S_MOV_B32 killed $sgpr34
+    $sgpr34 = S_MOV_B32 killed $sgpr35
+    $sgpr35 = S_MOV_B32 killed $sgpr36
+    $sgpr36 = S_MOV_B32 killed $sgpr37
+    $sgpr37 = S_MOV_B32 killed $sgpr38
+    $sgpr38 = S_MOV_B32 killed $sgpr39
+    $sgpr39 = S_MOV_B32 killed $sgpr40
+    $sgpr40 = S_MOV_B32 killed $sgpr41
+    $sgpr41 = S_MOV_B32 killed $sgpr42
+    $sgpr42 = S_MOV_B32 killed $sgpr43
+    $sgpr43 = S_MOV_B32 killed $sgpr44
+    $sgpr44 = S_MOV_B32 killed $sgpr45
+    $sgpr45 = S_MOV_B32 killed $sgpr46
+    $sgpr46 = S_MOV_B32 killed $sgpr47
+    $sgpr47 = S_MOV_B32 killed $sgpr48
+    $sgpr48 = S_MOV_B32 killed $sgpr49
+    $sgpr49 = S_MOV_B32 killed $sgpr50
+    $sgpr50 = S_MOV_B32 killed $sgpr51
+    $sgpr51 = S_MOV_B32 killed $sgpr52
+    $sgpr52 = S_MOV_B32 killed $sgpr53
+    $sgpr53 = S_MOV_B32 killed $sgpr54
+    $sgpr54 = S_MOV_B32 killed $sgpr55
+    $sgpr55 = S_MOV_B32 killed $sgpr56
+    $sgpr56 = S_MOV_B32 killed $sgpr57
+    $sgpr57 = S_MOV_B32 killed $sgpr58
+    $sgpr58 = S_MOV_B32 killed $sgpr59
+    $sgpr59 = S_MOV_B32 killed $sgpr60
+    $sgpr60 = S_MOV_B32 killed $sgpr61
+    $sgpr61 = S_MOV_B32 killed $sgpr62
+    $sgpr62 = S_MOV_B32 killed $sgpr63
+    $sgpr63 = S_MOV_B32 killed $sgpr64
+    $sgpr64 = S_MOV_B32 killed $sgpr65
+    $sgpr65 = S_MOV_B32 killed $sgpr66
+    $sgpr66 = S_MOV_B32 killed $sgpr67
+    $sgpr67 = S_MOV_B32 killed $sgpr68
+    $sgpr68 = S_MOV_B32 killed $sgpr69
+    $sgpr69 = S_MOV_B32 killed $sgpr70
+    $sgpr70 = S_MOV_B32 killed $sgpr71
+    $sgpr71 = S_MOV_B32 killed $sgpr72
+    $sgpr72 = S_MOV_B32 killed $sgpr73
+    $sgpr73 = S_MOV_B32 killed $sgpr74
+    $sgpr74 = S_MOV_B32 killed $sgpr75
+    $sgpr75 = S_MOV_B32 killed $sgpr76
+    $sgpr76 = S_MOV_B32 killed $sgpr77
+    $sgpr77 = S_MOV_B32 killed $sgpr78
+    $sgpr78 = S_MOV_B32 killed $sgpr79
+    $sgpr79 = S_MOV_B32 killed $sgpr80
+    $sgpr80 = S_MOV_B32 killed $vcc_hi
+    $vcc_hi = S_MOV_B32 killed $vcc_lo
+    $vcc_lo = S_MOV_B32 killed $sgpr101
+    $sgpr101 = S_MOV_B32 killed $sgpr100
+    $sgpr100 = S_MOV_B32 killed $sgpr99
+    $sgpr99 = S_MOV_B32 killed $sgpr98
+    $sgpr98 = S_MOV_B32 killed $sgpr97
+    $sgpr97 = S_MOV_B32 killed $sgpr96
+    $sgpr96 = S_MOV_B32 killed $sgpr95
+    $sgpr95 = S_MOV_B32 killed $sgpr94
+    $sgpr94 = S_MOV_B32 killed $sgpr93
+    $sgpr93 = S_MOV_B32 killed $sgpr92
+    $sgpr92 = S_MOV_B32 killed $sgpr91
+    $sgpr91 = S_MOV_B32 killed $sgpr90
+    $sgpr90 = S_MOV_B32 killed $sgpr89
+    $sgpr89 = S_MOV_B32 killed $sgpr88
+    $sgpr88 = S_MOV_B32 killed $sgpr87
+    $sgpr87 = S_MOV_B32 killed $sgpr86
+    $sgpr86 = S_MOV_B32 killed $sgpr85
+    $sgpr85 = S_MOV_B32 killed $sgpr84
+    $sgpr84 = S_MOV_B32 killed $sgpr83
+    $sgpr83 = S_MOV_B32 killed $sgpr82
+    $sgpr82 = S_MOV_B32 killed $sgpr81
+    $sgpr81 = V_READLANE_B32 $vgpr1, 7
+  
+  bb.4.bb3:
+    liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr32, $sgpr33, $sgpr0_sgpr1_sgpr2_sgpr3
+  
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr0
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr1
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr2
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr3
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr4
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr5
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr6
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr7
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr8
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr9
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr10
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr11
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr12
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr13
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr14
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr15
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr16
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr17
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr18
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr19
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr20
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr21
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr22
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr23
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr24
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr25
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr26
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr27
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr28
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr29
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr30
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr31
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr32
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $sgpr33
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr34
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr35
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr36
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr37
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr38
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr39
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr40
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr41
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr42
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr43
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr44
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr45
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr46
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr47
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr48
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr49
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr50
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr51
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr52
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr53
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr54
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr55
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr56
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr57
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr58
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr59
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr60
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr61
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr62
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr63
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr64
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr65
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr66
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr67
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr68
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr69
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr70
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr71
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr72
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr73
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr74
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr75
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr76
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr77
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr78
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr79
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr80
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr81
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr82
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr83
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr84
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr85
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr86
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr87
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr88
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr89
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr90
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr91
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr92
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr93
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr94
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr95
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr96
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr97
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr98
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr99
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr100
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $sgpr101
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $vcc_lo
+    INLINEASM &"; reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $vcc_hi
+    $sgpr101 = V_READLANE_B32 $vgpr1, 6
+    $sgpr100 = V_READLANE_B32 $vgpr1, 5
+    $sgpr99 = V_READLANE_B32 $vgpr1, 4
+    $sgpr98 = V_READLANE_B32 $vgpr1, 3
+    $sgpr97 = V_READLANE_B32 $vgpr1, 2
+    $sgpr96 = V_READLANE_B32 $vgpr1, 1
+    $sgpr95 = V_READLANE_B32 $vgpr1, 0
+    $sgpr94 = V_READLANE_B32 $vgpr0, 63
+    $sgpr93 = V_READLANE_B32 $vgpr0, 62
+    $sgpr92 = V_READLANE_B32 $vgpr0, 61
+    $sgpr91 = V_READLANE_B32 $vgpr0, 60
+    $sgpr90 = V_READLANE_B32 $vgpr0, 59
+    $sgpr89 = V_READLANE_B32 $vgpr0, 58
+    $sgpr88 = V_READLANE_B32 $vgpr0, 57
+    $sgpr87 = V_READLANE_B32 $vgpr0, 56
+    $sgpr86 = V_READLANE_B32 $vgpr0, 55
+    $sgpr85 = V_READLANE_B32 $vgpr0, 54
+    $sgpr84 = V_READLANE_B32 $vgpr0, 53
+    $sgpr83 = V_READLANE_B32 $vgpr0, 52
+    $sgpr82 = V_READLANE_B32 $vgpr0, 51
+    $sgpr81 = V_READLANE_B32 $vgpr0, 50
+    $sgpr80 = V_READLANE_B32 $vgpr0, 49
+    $sgpr79 = V_READLANE_B32 $vgpr0, 48
+    $sgpr78 = V_READLANE_B32 $vgpr0, 47
+    $sgpr77 = V_READLANE_B32 $vgpr0, 46
+    $sgpr76 = V_READLANE_B32 $vgpr0, 45
+    $sgpr75 = V_READLANE_B32 $vgpr0, 44
+    $sgpr74 = V_READLANE_B32 $vgpr0, 43
+    $sgpr73 = V_READLANE_B32 $vgpr0, 42
+    $sgpr72 = V_READLANE_B32 $vgpr0, 41
+    $sgpr71 = V_READLANE_B32 $vgpr0, 40
+    $sgpr70 = V_READLANE_B32 $vgpr0, 39
+    $sgpr69 = V_READLANE_B32 $vgpr0, 38
+    $sgpr68 = V_READLANE_B32 $vgpr0, 37
+    $sgpr67 = V_READLANE_B32 $vgpr0, 36
+    $sgpr66 = V_READLANE_B32 $vgpr0, 35
+    $sgpr65 = V_READLANE_B32 $vgpr0, 34
+    $sgpr64 = V_READLANE_B32 $vgpr0, 33
+    $sgpr63 = V_READLANE_B32 $vgpr0, 32
+    $sgpr62 = V_READLANE_B32 $vgpr0, 31
+    $sgpr61 = V_READLANE_B32 $vgpr0, 30
+    $sgpr60 = V_READLANE_B32 $vgpr0, 29
+    $sgpr59 = V_READLANE_B32 $vgpr0, 28
+    $sgpr58 = V_READLANE_B32 $vgpr0, 27
+    $sgpr57 = V_READLANE_B32 $vgpr0, 26
+    $sgpr56 = V_READLANE_B32 $vgpr0, 25
+    $sgpr55 = V_READLANE_B32 $vgpr0, 24
+    $sgpr54 = V_READLANE_B32 $vgpr0, 23
+    $sgpr53 = V_READLANE_B32 $vgpr0, 22
+    $sgpr52 = V_READLANE_B32 $vgpr0, 21
+    $sgpr51 = V_READLANE_B32 $vgpr0, 20
+    $sgpr50 = V_READLANE_B32 $vgpr0, 19
+    $sgpr49 = V_READLANE_B32 $vgpr0, 18
+    $sgpr48 = V_READLANE_B32 $vgpr0, 17
+    $sgpr47 = V_READLANE_B32 $vgpr0, 16
+    $sgpr46 = V_READLANE_B32 $vgpr0, 15
+    $sgpr45 = V_READLANE_B32 $vgpr0, 14
+    $sgpr44 = V_READLANE_B32 $vgpr0, 13
+    $sgpr43 = V_READLANE_B32 $vgpr0, 12
+    $sgpr42 = V_READLANE_B32 $vgpr0, 11
+    $sgpr41 = V_READLANE_B32 $vgpr0, 10
+    $sgpr40 = V_READLANE_B32 $vgpr0, 9
+    $sgpr39 = V_READLANE_B32 $vgpr0, 8
+    $sgpr38 = V_READLANE_B32 $vgpr0, 7
+    $sgpr37 = V_READLANE_B32 $vgpr0, 6
+    $sgpr36 = V_READLANE_B32 $vgpr0, 5
+    $sgpr35 = V_READLANE_B32 $vgpr0, 4
+    $sgpr34 = V_READLANE_B32 $vgpr0, 3
+    $sgpr33 = V_READLANE_B32 $vgpr0, 2
+    $sgpr31 = V_READLANE_B32 $vgpr0, 1
+    $sgpr30 = V_READLANE_B32 $vgpr0, 0
+    $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+    $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec
+    $vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec
+    $exec = S_MOV_B64 killed $sgpr4_sgpr5
+    S_WAITCNT 3952
+    S_SETPC_B64_return undef $sgpr30_sgpr31
+
+...