diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -1372,9 +1372,8 @@ } else { assert(N->getOpcode() == ISD::VP_TRUNCATE && "Expected VP_TRUNCATE opcode"); - SDValue MaskLo, MaskHi, EVLLo, EVLHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(1)); - std::tie(EVLLo, EVLHi) = + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(1)); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(2), N->getValueType(0), dl); EOp1 = DAG.getNode(ISD::VP_TRUNCATE, dl, HalfNVT, EOp1, MaskLo, EVLLo); EOp2 = DAG.getNode(ISD::VP_TRUNCATE, dl, HalfNVT, EOp2, MaskHi, EVLHi); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -1201,12 +1201,9 @@ assert(N->getNumOperands() == 4 && "Unexpected number of operands!"); assert(N->isVPOpcode() && "Expected VP opcode"); - SDValue MaskLo, MaskHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(2)); + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(2)); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = - DAG.SplitEVL(N->getOperand(3), N->getValueType(0), dl); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(3), N->getValueType(0), dl); Lo = DAG.getNode(Opcode, dl, LHSLo.getValueType(), {LHSLo, RHSLo, MaskLo, EVLLo}, Flags); @@ -1235,12 +1232,9 @@ assert(N->getNumOperands() == 5 && "Unexpected number of operands!"); assert(N->isVPOpcode() && "Expected VP opcode"); - SDValue MaskLo, MaskHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(3)); + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(3)); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = - DAG.SplitEVL(N->getOperand(4), N->getValueType(0), dl); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(4), N->getValueType(0), dl); Lo = DAG.getNode(Opcode, dl, Op0Lo.getValueType(), {Op0Lo, Op1Lo, Op2Lo, MaskLo, EVLLo}, Flags); @@ -1267,8 +1261,7 @@ SDValue &Hi) { // We know the result is a vector. The input may be either a vector or a // scalar value. - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); SDLoc dl(N); SDValue InOp = N->getOperand(0); @@ -1325,9 +1318,8 @@ void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) { - EVT LoVT, HiVT; SDLoc dl(N); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); unsigned LoNumElts = LoVT.getVectorNumElements(); SmallVector LoOps(N->op_begin(), N->op_begin()+LoNumElts); Lo = DAG.getBuildVector(LoVT, dl, LoOps); @@ -1347,8 +1339,7 @@ return; } - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); SmallVector LoOps(N->op_begin(), N->op_begin()+NumSubvectors); Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps); @@ -1363,8 +1354,7 @@ SDValue Idx = N->getOperand(1); SDLoc dl(N); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx); uint64_t IdxVal = cast(Idx)->getZExtValue(); @@ -1471,8 +1461,7 @@ SDValue ArgLo, ArgHi; SDValue Test = N->getOperand(1); GetSplitVector(N->getOperand(0), ArgLo, ArgHi); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); Lo = DAG.getNode(ISD::IS_FPCLASS, DL, LoVT, ArgLo, Test, N->getFlags()); Hi = DAG.getNode(ISD::IS_FPCLASS, DL, HiVT, ArgHi, Test, N->getFlags()); @@ -1484,9 +1473,8 @@ GetSplitVector(N->getOperand(0), LHSLo, LHSHi); SDLoc dl(N); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = - DAG.GetSplitDestVTs(cast(N->getOperand(1))->getVT()); + auto [LoVT, HiVT] = + DAG.GetSplitDestVTs(cast(N->getOperand(1))->getVT()); Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, DAG.getValueType(LoVT)); @@ -1510,8 +1498,7 @@ EVT InLoVT = InLo.getValueType(); unsigned InNumElements = InLoVT.getVectorNumElements(); - EVT OutLoVT, OutHiVT; - std::tie(OutLoVT, OutHiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [OutLoVT, OutHiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); unsigned OutNumElements = OutLoVT.getVectorNumElements(); assert((2 * OutNumElements) <= InNumElements && "Illegal extend vector in reg split"); @@ -1536,9 +1523,8 @@ SDValue &Hi) { unsigned NumOps = N->getNumOperands(); SDValue Chain = N->getOperand(0); - EVT LoVT, HiVT; SDLoc dl(N); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); SmallVector OpsLo(NumOps); SmallVector OpsHi(NumOps); @@ -1644,9 +1630,8 @@ SDLoc dl(N); EVT ResVT = N->getValueType(0); EVT OvVT = N->getValueType(1); - EVT LoResVT, HiResVT, LoOvVT, HiOvVT; - std::tie(LoResVT, HiResVT) = DAG.GetSplitDestVTs(ResVT); - std::tie(LoOvVT, HiOvVT) = DAG.GetSplitDestVTs(OvVT); + auto [LoResVT, HiResVT] = DAG.GetSplitDestVTs(ResVT); + auto [LoOvVT, HiOvVT] = DAG.GetSplitDestVTs(OvVT); SDValue LoLHS, HiLHS, LoRHS, HiRHS; if (getTypeAction(ResVT) == TargetLowering::TypeSplitVector) { @@ -1742,8 +1727,7 @@ commonAlignment(SmallestAlign, EltVT.getFixedSizeInBits() / 8)); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(VecVT); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(VecVT); // Load the Lo part from the stack slot. Lo = DAG.getLoad(LoVT, dl, Store, StackPtr, PtrInfo, SmallestAlign); @@ -1765,11 +1749,10 @@ void DAGTypeLegalizer::SplitVecRes_STEP_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) { - EVT LoVT, HiVT; SDLoc dl(N); assert(N->getValueType(0).isScalableVector() && "Only scalable vectors are supported for STEP_VECTOR"); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); SDValue Step = N->getOperand(0); Lo = DAG.getNode(ISD::STEP_VECTOR, dl, LoVT, Step); @@ -1788,9 +1771,8 @@ void DAGTypeLegalizer::SplitVecRes_ScalarOp(SDNode *N, SDValue &Lo, SDValue &Hi) { - EVT LoVT, HiVT; SDLoc dl(N); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); Lo = DAG.getNode(N->getOpcode(), dl, LoVT, N->getOperand(0)); if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) { Hi = DAG.getUNDEF(HiVT); @@ -1803,9 +1785,8 @@ void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi) { assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!"); - EVT LoVT, HiVT; SDLoc dl(LD); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(LD->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(LD->getValueType(0)); ISD::LoadExtType ExtType = LD->getExtensionType(); SDValue Ch = LD->getChain(); @@ -1815,8 +1796,7 @@ MachineMemOperand::Flags MMOFlags = LD->getMemOperand()->getFlags(); AAMDNodes AAInfo = LD->getAAInfo(); - EVT LoMemVT, HiMemVT; - std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT); + auto [LoMemVT, HiMemVT] = DAG.GetSplitDestVTs(MemoryVT); if (!LoMemVT.isByteSized() || !HiMemVT.isByteSized()) { SDValue Value, NewChain; @@ -1849,9 +1829,8 @@ void DAGTypeLegalizer::SplitVecRes_VP_LOAD(VPLoadSDNode *LD, SDValue &Lo, SDValue &Hi) { assert(LD->isUnindexed() && "Indexed VP load during type legalization!"); - EVT LoVT, HiVT; SDLoc dl(LD); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(LD->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(LD->getValueType(0)); ISD::LoadExtType ExtType = LD->getExtensionType(); SDValue Ch = LD->getChain(); @@ -1863,9 +1842,8 @@ SDValue EVL = LD->getVectorLength(); EVT MemoryVT = LD->getMemoryVT(); - EVT LoMemVT, HiMemVT; bool HiIsEmpty = false; - std::tie(LoMemVT, HiMemVT) = + auto [LoMemVT, HiMemVT] = DAG.GetDependentSplitDestVTs(MemoryVT, LoVT, &HiIsEmpty); // Split Mask operand @@ -1880,8 +1858,7 @@ } // Split EVL operand - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = DAG.SplitEVL(EVL, LD->getValueType(0), dl); + auto [EVLLo, EVLHi] = DAG.SplitEVL(EVL, LD->getValueType(0), dl); MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( LD->getPointerInfo(), MachineMemOperand::MOLoad, @@ -1935,12 +1912,10 @@ SDLoc DL(SLD); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(SLD->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(SLD->getValueType(0)); - EVT LoMemVT, HiMemVT; bool HiIsEmpty = false; - std::tie(LoMemVT, HiMemVT) = + auto [LoMemVT, HiMemVT] = DAG.GetDependentSplitDestVTs(SLD->getMemoryVT(), LoVT, &HiIsEmpty); SDValue Mask = SLD->getMask(); @@ -1954,8 +1929,7 @@ std::tie(LoMask, HiMask) = DAG.SplitVector(Mask, DL); } - SDValue LoEVL, HiEVL; - std::tie(LoEVL, HiEVL) = + auto [LoEVL, HiEVL] = DAG.SplitEVL(SLD->getVectorLength(), SLD->getValueType(0), DL); // Generate the low vp_strided_load @@ -2010,9 +1984,8 @@ void DAGTypeLegalizer::SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi) { assert(MLD->isUnindexed() && "Indexed masked load during type legalization!"); - EVT LoVT, HiVT; SDLoc dl(MLD); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(MLD->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(MLD->getValueType(0)); SDValue Ch = MLD->getChain(); SDValue Ptr = MLD->getBasePtr(); @@ -2035,9 +2008,8 @@ } EVT MemoryVT = MLD->getMemoryVT(); - EVT LoMemVT, HiMemVT; bool HiIsEmpty = false; - std::tie(LoMemVT, HiMemVT) = + auto [LoMemVT, HiMemVT] = DAG.GetDependentSplitDestVTs(MemoryVT, LoVT, &HiIsEmpty); SDValue PassThruLo, PassThruHi; @@ -2093,9 +2065,8 @@ void DAGTypeLegalizer::SplitVecRes_Gather(MemSDNode *N, SDValue &Lo, SDValue &Hi, bool SplitSETCC) { - EVT LoVT, HiVT; SDLoc dl(N); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); SDValue Ch = N->getChain(); SDValue Ptr = N->getBasePtr(); @@ -2122,9 +2093,8 @@ std::tie(MaskLo, MaskHi) = SplitMask(Ops.Mask, dl); } - EVT LoMemVT, HiMemVT; // Split MemoryVT - std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT); + auto [LoMemVT, HiMemVT] = DAG.GetSplitDestVTs(MemoryVT); SDValue IndexHi, IndexLo; if (getTypeAction(Ops.Index.getValueType()) == @@ -2158,9 +2128,7 @@ OpsHi, MMO, IndexTy, ExtType); } else { auto *VPGT = cast(N); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = - DAG.SplitEVL(VPGT->getVectorLength(), MemoryVT, dl); + auto [EVLLo, EVLHi] = DAG.SplitEVL(VPGT->getVectorLength(), MemoryVT, dl); SDValue OpsLo[] = {Ch, Ptr, IndexLo, Ops.Scale, MaskLo, EVLLo}; Lo = DAG.getGatherVP(DAG.getVTList(LoVT, MVT::Other), LoMemVT, dl, OpsLo, @@ -2186,9 +2154,8 @@ N->getOperand(0).getValueType().isVector() && "Operand types must be vectors"); - EVT LoVT, HiVT; SDLoc DL(N); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); // If the input also splits, handle it directly. Otherwise split it by hand. SDValue LL, LH, RL, RH; @@ -2209,9 +2176,8 @@ Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); } else { assert(N->getOpcode() == ISD::VP_SETCC && "Expected VP_SETCC opcode"); - SDValue MaskLo, MaskHi, EVLLo, EVLHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(3)); - std::tie(EVLLo, EVLHi) = + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(3)); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(4), N->getValueType(0), DL); Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2), MaskLo, EVLLo); @@ -2223,9 +2189,8 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi) { // Get the dest types - they may not match the input types, e.g. int_to_fp. - EVT LoVT, HiVT; SDLoc dl(N); - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); // If the input also splits, handle it directly for a compile time speedup. // Otherwise split it by hand. @@ -2251,12 +2216,9 @@ assert(N->getNumOperands() == 3 && "Unexpected number of operands!"); assert(N->isVPOpcode() && "Expected VP opcode"); - SDValue MaskLo, MaskHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(1)); + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(1)); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = - DAG.SplitEVL(N->getOperand(2), N->getValueType(0), dl); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(2), N->getValueType(0), dl); Lo = DAG.getNode(Opcode, dl, LoVT, {Lo, MaskLo, EVLLo}, Flags); Hi = DAG.getNode(Opcode, dl, HiVT, {Hi, MaskHi, EVLHi}, Flags); @@ -2267,8 +2229,7 @@ SDLoc dl(N); EVT SrcVT = N->getOperand(0).getValueType(); EVT DestVT = N->getValueType(0); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(DestVT); // We can do better than a generic split operation if the extend is doing // more than just doubling the width of the elements and the following are @@ -2289,8 +2250,7 @@ EVT NewSrcVT = SrcVT.widenIntegerVectorElementType(Ctx); EVT SplitSrcVT = SrcVT.getHalfNumVectorElementsVT(Ctx); - EVT SplitLoVT, SplitHiVT; - std::tie(SplitLoVT, SplitHiVT) = DAG.GetSplitDestVTs(NewSrcVT); + auto [SplitLoVT, SplitHiVT] = DAG.GetSplitDestVTs(NewSrcVT); if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { LLVM_DEBUG(dbgs() << "Split vector extend via incremental extend:"; @@ -2314,11 +2274,9 @@ // Get the low and high halves of the new, extended one step, vector. std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl); - SDValue MaskLo, MaskHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(1)); + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(1)); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(2), N->getValueType(0), dl); // Extend those vector halves the rest of the way. Lo = DAG.getNode(N->getOpcode(), dl, LoVT, {Lo, MaskLo, EVLLo}); @@ -2705,8 +2663,7 @@ void DAGTypeLegalizer::SplitVecRes_FP_TO_XINT_SAT(SDNode *N, SDValue &Lo, SDValue &Hi) { - EVT DstVTLo, DstVTHi; - std::tie(DstVTLo, DstVTHi) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [DstVTLo, DstVTHi] = DAG.GetSplitDestVTs(N->getValueType(0)); SDLoc dl(N); SDValue SrcLo, SrcHi; @@ -2735,8 +2692,7 @@ EVT VT = N->getValueType(0); SDLoc DL(N); - EVT LoVT, HiVT; - std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(VT); + auto [LoVT, HiVT] = DAG.GetSplitDestVTs(VT); SDValue Expanded = TLI.expandVectorSplice(N, DAG); Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, Expanded, @@ -2921,14 +2877,12 @@ assert(Lo.getValueType() == Hi.getValueType() && "Lo and Hi have differing types"); - EVT LoOpVT, HiOpVT; - std::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(Src0VT); + auto [LoOpVT, HiOpVT] = DAG.GetSplitDestVTs(Src0VT); assert(LoOpVT == HiOpVT && "Asymmetric vector split?"); - SDValue LoOp0, HiOp0, LoOp1, HiOp1, LoMask, HiMask; - std::tie(LoOp0, HiOp0) = DAG.SplitVector(Src0, DL); - std::tie(LoOp1, HiOp1) = DAG.SplitVector(Src1, DL); - std::tie(LoMask, HiMask) = DAG.SplitVector(Mask, DL); + auto [LoOp0, HiOp0] = DAG.SplitVector(Src0, DL); + auto [LoOp1, HiOp1] = DAG.SplitVector(Src1, DL); + auto [LoMask, HiMask] = DAG.SplitVector(Mask, DL); SDValue LoSelect = DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1); @@ -2947,8 +2901,7 @@ EVT VecVT = VecOp.getValueType(); assert(VecVT.isVector() && "Can only split reduce vector operand"); GetSplitVector(VecOp, Lo, Hi); - EVT LoOpVT, HiOpVT; - std::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(VecVT); + auto [LoOpVT, HiOpVT] = DAG.GetSplitDestVTs(VecVT); // Use the appropriate scalar instruction on the split subvectors before // reducing the now partially reduced smaller vector. @@ -2969,8 +2922,6 @@ EVT VecVT = VecOp.getValueType(); assert(VecVT.isVector() && "Can only split reduce vector operand"); GetSplitVector(VecOp, Lo, Hi); - EVT LoOpVT, HiOpVT; - std::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(VecVT); // Reduce low half. SDValue Partial = DAG.getNode(N->getOpcode(), dl, ResVT, AccOp, Lo, Flags); @@ -2993,11 +2944,9 @@ assert(VecVT.isVector() && "Can only split reduce vector operand"); GetSplitVector(VecOp, Lo, Hi); - SDValue MaskLo, MaskHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(2)); + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(2)); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = DAG.SplitEVL(N->getOperand(3), VecVT, dl); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(3), VecVT, dl); const SDNodeFlags Flags = N->getFlags(); @@ -3033,9 +2982,8 @@ ReplaceValueWith(SDValue(N, 1), Ch); } else if (N->getNumOperands() == 3) { assert(N->isVPOpcode() && "Expected VP opcode"); - SDValue MaskLo, MaskHi, EVLLo, EVLHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(1)); - std::tie(EVLLo, EVLHi) = + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(1)); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(2), N->getValueType(0), dl); Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo, MaskLo, EVLLo); Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi, MaskHi, EVLHi); @@ -3260,14 +3208,12 @@ } EVT MemoryVT = N->getMemoryVT(); - EVT LoMemVT, HiMemVT; bool HiIsEmpty = false; - std::tie(LoMemVT, HiMemVT) = + auto [LoMemVT, HiMemVT] = DAG.GetDependentSplitDestVTs(MemoryVT, DataLo.getValueType(), &HiIsEmpty); // Split EVL - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = DAG.SplitEVL(EVL, Data.getValueType(), DL); + auto [EVLLo, EVLHi] = DAG.SplitEVL(EVL, Data.getValueType(), DL); SDValue Lo, Hi; MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( @@ -3321,9 +3267,8 @@ else std::tie(LoData, HiData) = DAG.SplitVector(Data, DL); - EVT LoMemVT, HiMemVT; bool HiIsEmpty = false; - std::tie(LoMemVT, HiMemVT) = DAG.GetDependentSplitDestVTs( + auto [LoMemVT, HiMemVT] = DAG.GetDependentSplitDestVTs( N->getMemoryVT(), LoData.getValueType(), &HiIsEmpty); SDValue Mask = N->getMask(); @@ -3336,8 +3281,7 @@ else std::tie(LoMask, HiMask) = DAG.SplitVector(Mask, DL); - SDValue LoEVL, HiEVL; - std::tie(LoEVL, HiEVL) = + auto [LoEVL, HiEVL] = DAG.SplitEVL(N->getVectorLength(), Data.getValueType(), DL); // Generate the low vp_strided_store @@ -3412,9 +3356,8 @@ } EVT MemoryVT = N->getMemoryVT(); - EVT LoMemVT, HiMemVT; bool HiIsEmpty = false; - std::tie(LoMemVT, HiMemVT) = + auto [LoMemVT, HiMemVT] = DAG.GetDependentSplitDestVTs(MemoryVT, DataLo.getValueType(), &HiIsEmpty); SDValue Lo, Hi, Res; @@ -3482,8 +3425,7 @@ }(); // Split all operands - EVT LoMemVT, HiMemVT; - std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT); + auto [LoMemVT, HiMemVT] = DAG.GetSplitDestVTs(MemoryVT); SDValue DataLo, DataHi; if (getTypeAction(Ops.Data.getValueType()) == TargetLowering::TypeSplitVector) @@ -3527,8 +3469,7 @@ MSC->isTruncatingStore()); } auto *VPSC = cast(N); - SDValue EVLLo, EVLHi; - std::tie(EVLLo, EVLHi) = + auto [EVLLo, EVLHi] = DAG.SplitEVL(VPSC->getVectorLength(), Ops.Data.getValueType(), DL); SDValue OpsLo[] = {Ch, DataLo, Ptr, IndexLo, Ops.Scale, MaskLo, EVLLo}; @@ -3558,8 +3499,7 @@ SDValue Lo, Hi; GetSplitVector(N->getOperand(1), Lo, Hi); - EVT LoMemVT, HiMemVT; - std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT); + auto [LoMemVT, HiMemVT] = DAG.GetSplitDestVTs(MemoryVT); // Scalarize if the split halves are not byte-sized. if (!LoMemVT.isByteSized() || !HiMemVT.isByteSized()) @@ -3634,8 +3574,7 @@ unsigned OutElementSize = OutVT.getScalarSizeInBits(); // Determine the split output VT. If its legal we can just split dirctly. - EVT LoOutVT, HiOutVT; - std::tie(LoOutVT, HiOutVT) = DAG.GetSplitDestVTs(OutVT); + auto [LoOutVT, HiOutVT] = DAG.GetSplitDestVTs(OutVT); assert(LoOutVT == HiOutVT && "Unequal split?"); // If the input elements are only 1/2 the width of the result elements, @@ -3731,9 +3670,8 @@ HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2)); } else { assert(N->getOpcode() == ISD::VP_SETCC && "Expected VP_SETCC opcode"); - SDValue MaskLo, MaskHi, EVLLo, EVLHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(3)); - std::tie(EVLLo, EVLHi) = + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(3)); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(4), N->getValueType(0), DL); LoRes = DAG.getNode(ISD::VP_SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2), MaskLo, EVLLo); @@ -3771,9 +3709,8 @@ Lo.getValue(1), Hi.getValue(1)); ReplaceValueWith(SDValue(N, 1), NewChain); } else if (N->getOpcode() == ISD::VP_FP_ROUND) { - SDValue MaskLo, MaskHi, EVLLo, EVLHi; - std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(1)); - std::tie(EVLLo, EVLHi) = + auto [MaskLo, MaskHi] = SplitMask(N->getOperand(1)); + auto [EVLLo, EVLHi] = DAG.SplitEVL(N->getOperand(2), N->getValueType(0), DL); Lo = DAG.getNode(ISD::VP_FP_ROUND, DL, OutVT, Lo, MaskLo, EVLLo); Hi = DAG.getNode(ISD::VP_FP_ROUND, DL, OutVT, Hi, MaskHi, EVLHi); @@ -3791,18 +3728,14 @@ SDLoc DL(N); - EVT LHSLoVT, LHSHiVT; - std::tie(LHSLoVT, LHSHiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); + auto [LHSLoVT, LHSHiVT] = DAG.GetSplitDestVTs(N->getValueType(0)); if (!isTypeLegal(LHSLoVT) || !isTypeLegal(LHSHiVT)) return DAG.UnrollVectorOp(N, N->getValueType(0).getVectorNumElements()); - SDValue LHSLo, LHSHi; - std::tie(LHSLo, LHSHi) = - DAG.SplitVector(N->getOperand(0), DL, LHSLoVT, LHSHiVT); + auto [LHSLo, LHSHi] = DAG.SplitVector(N->getOperand(0), DL, LHSLoVT, LHSHiVT); - SDValue RHSLo, RHSHi; - std::tie(RHSLo, RHSHi) = DAG.SplitVector(N->getOperand(1), DL); + auto [RHSLo, RHSHi] = DAG.SplitVector(N->getOperand(1), DL); SDValue Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLoVT, LHSLo, RHSLo); SDValue Hi = DAG.getNode(ISD::FCOPYSIGN, DL, LHSHiVT, LHSHi, RHSHi); @@ -5044,8 +4977,7 @@ // elements that are byte-sized must therefore be stored as an integer // built out of the extracted vector elements. if (!LD->getMemoryVT().isByteSized()) { - SDValue Value, NewChain; - std::tie(Value, NewChain) = TLI.scalarizeVectorLoad(LD, DAG); + auto [Value, NewChain] = TLI.scalarizeVectorLoad(LD, DAG); ReplaceValueWith(SDValue(LD, 0), Value); ReplaceValueWith(SDValue(LD, 1), NewChain); return SDValue();