diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1647,7 +1647,6 @@
   bool validateSMEMOffset(const MCInst &Inst, const OperandVector &Operands);
   bool validateSOPLiteral(const MCInst &Inst) const;
   bool validateConstantBusLimitations(const MCInst &Inst, const OperandVector &Operands);
-  bool validateEarlyClobberLimitations(const MCInst &Inst, const OperandVector &Operands);
   bool validateIntClampSupported(const MCInst &Inst);
   bool validateMIMGAtomicDMask(const MCInst &Inst);
   bool validateMIMGGatherDMask(const MCInst &Inst);
@@ -3554,46 +3553,6 @@
   return false;
 }
 
-bool
-AMDGPUAsmParser::validateEarlyClobberLimitations(const MCInst &Inst,
-                                                 const OperandVector &Operands) {
-  const unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opcode);
-
-  const int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst);
-  if (DstIdx == -1 ||
-      Desc.getOperandConstraint(DstIdx, MCOI::EARLY_CLOBBER) == -1) {
-    return true;
-  }
-
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-
-  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
-  const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
-  const int Src2Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2);
-
-  assert(DstIdx != -1);
-  const MCOperand &Dst = Inst.getOperand(DstIdx);
-  assert(Dst.isReg());
-
-  const int SrcIndices[] = { Src0Idx, Src1Idx, Src2Idx };
-
-  for (int SrcIdx : SrcIndices) {
-    if (SrcIdx == -1) break;
-    const MCOperand &Src = Inst.getOperand(SrcIdx);
-    if (Src.isReg()) {
-      if (TRI->regsOverlap(Dst.getReg(), Src.getReg())) {
-        const unsigned SrcReg = mc2PseudoReg(Src.getReg());
-        Error(getRegLoc(SrcReg, Operands),
-          "destination must be different than all sources");
-        return false;
-      }
-    }
-  }
-
-  return true;
-}
-
 bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) {
 
   const unsigned Opc = Inst.getOpcode();
@@ -4622,9 +4581,6 @@
   if (!validateConstantBusLimitations(Inst, Operands)) {
     return false;
   }
-  if (!validateEarlyClobberLimitations(Inst, Operands)) {
-    return false;
-  }
   if (!validateIntClampSupported(Inst)) {
     Error(getImmLoc(AMDGPUOperand::ImmTyClampSI, Operands),
       "integer clamping is not supported on this GPU");
diff --git a/llvm/test/MC/AMDGPU/gfx10_err_pos.s b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
--- a/llvm/test/MC/AMDGPU/gfx10_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
@@ -1,28 +1,5 @@
 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+WavefrontSize32,-WavefrontSize64 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
 
-//==============================================================================
-// destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[0:1], v[1:2], v9, v[4:5]
-// CHECK: error: destination must be different than all sources
-// CHECK-NEXT:{{^}}v_mqsad_pk_u16_u8 v[0:1], v[1:2], v9, v[4:5]
-// CHECK-NEXT:{{^}}                          ^
-
-v_mqsad_pk_u16_u8 v[0:1], v[2:3], v0, v[4:5]
-// CHECK: error: destination must be different than all sources
-// CHECK-NEXT:{{^}}v_mqsad_pk_u16_u8 v[0:1], v[2:3], v0, v[4:5]
-// CHECK-NEXT:{{^}}                                  ^
-
-v_mqsad_pk_u16_u8 v[0:1], v[2:3], v1, v[4:5]
-// CHECK: error: destination must be different than all sources
-// CHECK-NEXT:{{^}}v_mqsad_pk_u16_u8 v[0:1], v[2:3], v1, v[4:5]
-// CHECK-NEXT:{{^}}                                  ^
-
-v_mqsad_pk_u16_u8 v[0:1], v[2:3], v9, v[0:1]
-// CHECK: error: destination must be different than all sources
-// CHECK-NEXT:{{^}}v_mqsad_pk_u16_u8 v[0:1], v[2:3], v9, v[0:1]
-// CHECK-NEXT:{{^}}                                      ^
-
 //==============================================================================
 // dim modifier is required on this GPU
 
diff --git a/llvm/test/MC/AMDGPU/vop3-errs.s b/llvm/test/MC/AMDGPU/vop3-errs.s
--- a/llvm/test/MC/AMDGPU/vop3-errs.s
+++ b/llvm/test/MC/AMDGPU/vop3-errs.s
@@ -11,31 +11,6 @@
 
 v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3]
 // GFX67: error: instruction not supported on this GPU
-// GFX89: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[0:1], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[1:2], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[2:3], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[3:4], v[0:1], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[4:5], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[5:6], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[8:9], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
-
-v_mqsad_pk_u16_u8 v[9:10], v[1:2], v9, v[4:5]
-// GCN: error: destination must be different than all sources
 
 v_cmp_eq_f32_e64 vcc, v0, v1 mul:2
 // GCN: error: invalid operand for instruction