diff --git a/lldb/include/lldb/Core/EmulateInstruction.h b/lldb/include/lldb/Core/EmulateInstruction.h
--- a/lldb/include/lldb/Core/EmulateInstruction.h
+++ b/lldb/include/lldb/Core/EmulateInstruction.h
@@ -183,7 +183,12 @@
 
   struct Context {
     ContextType type = eContextInvalid;
+
+  private:
     enum InfoType info_type = eInfoTypeNoArgs;
+
+  public:
+    enum InfoType GetInfoType() const { return info_type; }
     union {
       struct RegisterPlusOffset {
         RegisterInfo reg;      // base register
diff --git a/lldb/source/Core/EmulateInstruction.cpp b/lldb/source/Core/EmulateInstruction.cpp
--- a/lldb/source/Core/EmulateInstruction.cpp
+++ b/lldb/source/Core/EmulateInstruction.cpp
@@ -440,7 +440,7 @@
     break;
   }
 
-  switch (info_type) {
+  switch (GetInfoType()) {
   case eInfoTypeRegisterPlusOffset:
     strm.Printf(" (reg_plus_offset = %s%+" PRId64 ")",
                 info.RegisterPlusOffset.reg.name,
diff --git a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
--- a/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
+++ b/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
@@ -455,7 +455,7 @@
   case EmulateInstruction::eContextPushRegisterOnStack: {
     uint32_t reg_num = LLDB_INVALID_REGNUM;
     uint32_t generic_regnum = LLDB_INVALID_REGNUM;
-    assert(context.info_type ==
+    assert(context.GetInfoType() ==
                EmulateInstruction::eInfoTypeRegisterToRegisterPlusOffset &&
            "unhandled case, add code to handle this!");
     const uint32_t unwind_reg_kind = m_unwind_plan_ptr->GetRegisterKind();
@@ -574,7 +574,8 @@
     // with the same amount.
     lldb::RegisterKind kind = m_unwind_plan_ptr->GetRegisterKind();
     if (m_fp_is_cfa && reg_info->kinds[kind] == m_cfa_reg_info.kinds[kind] &&
-        context.info_type == EmulateInstruction::eInfoTypeRegisterPlusOffset &&
+        context.GetInfoType() ==
+            EmulateInstruction::eInfoTypeRegisterPlusOffset &&
         context.info.RegisterPlusOffset.reg.kinds[kind] ==
             m_cfa_reg_info.kinds[kind]) {
       const int64_t offset = context.info.RegisterPlusOffset.signed_offset;
@@ -585,18 +586,19 @@
 
   case EmulateInstruction::eContextAbsoluteBranchRegister:
   case EmulateInstruction::eContextRelativeBranchImmediate: {
-    if (context.info_type == EmulateInstruction::eInfoTypeISAAndImmediate &&
+    if (context.GetInfoType() == EmulateInstruction::eInfoTypeISAAndImmediate &&
         context.info.ISAAndImmediate.unsigned_data32 > 0) {
       m_forward_branch_offset =
           context.info.ISAAndImmediateSigned.signed_data32;
-    } else if (context.info_type ==
+    } else if (context.GetInfoType() ==
                    EmulateInstruction::eInfoTypeISAAndImmediateSigned &&
                context.info.ISAAndImmediateSigned.signed_data32 > 0) {
       m_forward_branch_offset = context.info.ISAAndImmediate.unsigned_data32;
-    } else if (context.info_type == EmulateInstruction::eInfoTypeImmediate &&
+    } else if (context.GetInfoType() ==
+                   EmulateInstruction::eInfoTypeImmediate &&
                context.info.unsigned_immediate > 0) {
       m_forward_branch_offset = context.info.unsigned_immediate;
-    } else if (context.info_type ==
+    } else if (context.GetInfoType() ==
                    EmulateInstruction::eInfoTypeImmediateSigned &&
                context.info.signed_immediate > 0) {
       m_forward_branch_offset = context.info.signed_immediate;
@@ -609,7 +611,7 @@
     const uint32_t generic_regnum = reg_info->kinds[eRegisterKindGeneric];
     if (reg_num != LLDB_INVALID_REGNUM &&
         generic_regnum != LLDB_REGNUM_GENERIC_SP) {
-      switch (context.info_type) {
+      switch (context.GetInfoType()) {
       case EmulateInstruction::eInfoTypeAddress:
         if (m_pushed_regs.find(reg_num) != m_pushed_regs.end() &&
             context.info.address == m_pushed_regs[reg_num]) {