Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -1063,6 +1063,9 @@
     if (i) OS << ", "; else OS << " ";
     printOperand(OS, G, getOperand(i));
   }
+  if (isDivergent()) {
+    OS << " :divergent";
+  }
   if (DebugLoc DL = getDebugLoc()) {
     OS << ", ";
     DL.print(OS);
Index: llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
@@ -0,0 +1,23 @@
+; RUN: llc -march=amdgcn -mcpu=gfx900 -O0 -verify-machineinstrs < %s -debug-only=isel -o /dev/null |& FileCheck --check-prefix=GCN %s
+
+; REQUIRES: asserts
+
+; GCN-LABEL: === test_sdag_dump
+; GCN: Initial selection DAG: %bb.0 'test_sdag_dump:entry'
+; GCN: SelectionDAG has 10 nodes:
+; GCN:  t0: ch = EntryToken{{$}}
+; GCN:  t2: f32,ch = CopyFromReg t0, Register:f32 %0{{$}}
+; GCN:      t5: f32 = fadd t2, t2{{$}}
+; GCN:      t4: f32,ch = CopyFromReg t0, Register:f32 %1 :divergent{{$}}
+; GCN:    t6: f32 = fadd t5, t4 :divergent{{$}}
+; GCN:  t8: ch,glue = CopyToReg t0, Register:f32 $vgpr0, t6 :divergent{{$}}
+; GCN:  t9: ch = RETURN_TO_EPILOG t8, Register:f32 $vgpr0, t8:1 :divergent{{$}}
+
+define amdgpu_ps float @test_sdag_dump(float inreg %scalar, float %vector)  {
+entry:
+  %sadd = fadd float %scalar, %scalar
+  %ret = fadd float %sadd, %vector
+  ret float %ret
+}
+
+declare i32 @llvm.amdgcn.workitem.id.x()