diff --git a/llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir b/llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
--- a/llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
+++ b/llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
@@ -39,7 +39,7 @@
     %0:gr16_abcd = MOV16ri 1, debug-instr-number 1, debug-location !9
 
   bb.1:
-    DBG_INSTR_REF 2, 0, !7, !DIExpression(), debug-location !9
+    DBG_INSTR_REF !7, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !9
     %1:gr16 = COPY %0, debug-location !9
     %2:gr16 = COPY %0
 
diff --git a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
--- a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
+++ b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
@@ -298,8 +298,8 @@
     $rcx = CMOV64rr killed $rcx, killed $rdx, 5, implicit killed $eflags
     $rcx = OR64rr killed $rcx, killed $rsi, implicit-def dead $eflags
     $rdx = MOVSX64rm32 $rbx, 1, $noreg, 0, $noreg :: (load (s32), align 8)
-    DBG_INSTR_REF 1, 0, !46, !17, debug-location !48
-    DBG_INSTR_REF 2, 0, !39, !17, debug-location !44
+    DBG_INSTR_REF !46, !17, dbg-instr-ref(1, 0), debug-location !48
+    DBG_INSTR_REF !39, !17, dbg-instr-ref(2, 0), debug-location !44
     TEST32mr killed $rcx, 4, killed $rdx, 0, $noreg, killed $eax, implicit-def $eflags :: (load (s32))
     JCC_1 %bb.2, 5, implicit $eflags
     JMP_1 %bb.3
diff --git a/llvm/test/DebugInfo/AArch64/instr-ref-const-physreg.ll b/llvm/test/DebugInfo/AArch64/instr-ref-const-physreg.ll
--- a/llvm/test/DebugInfo/AArch64/instr-ref-const-physreg.ll
+++ b/llvm/test/DebugInfo/AArch64/instr-ref-const-physreg.ll
@@ -7,7 +7,7 @@
 ; crash, and we don't just drop the information.
 
 ; CHECK: DBG_PHI $xzr, 1
-; CHECK: DBG_INSTR_REF 1, 0
+; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 
 define i64 @test() !dbg !7 {
   %foo = add i64 0, 0
diff --git a/llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll b/llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll
--- a/llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll
+++ b/llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll
@@ -25,7 +25,7 @@
 ; CHECK-LABEL:  bb.1.entry:
 ; CHECK:          $r0 = COPY %0
 ; CHECK-NEXT:     $r1 = COPY %1
-; CHECK-NEXT:     DBG_INSTR_REF 1, 0
+; CHECK-NEXT:     DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 ; CHECK-NEXT:     TCRETURNdi &__divsi3, 0, csr_ios, implicit $sp, implicit $r0, implicit $r1
 
 declare i1 @ext()
diff --git a/llvm/test/DebugInfo/COFF/pieces.ll b/llvm/test/DebugInfo/COFF/pieces.ll
--- a/llvm/test/DebugInfo/COFF/pieces.ll
+++ b/llvm/test/DebugInfo/COFF/pieces.ll
@@ -101,7 +101,7 @@
 ; ASM:         callq   g
 ; ASM:         movl    %eax, [[offset_o_x:[0-9]+]](%rsp)          # 4-byte Spill
 ; ASM: [[spill_o_x_start:\.Ltmp[0-9]+]]:
-; ASM:         #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_LLVM_fragment 32 32] [$rsp+0]
+; ASM:         #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_deref, DW_OP_LLVM_fragment 32 32] $rsp
 ; ASM:         #APP
 ; ASM:         #NO_APP
 ; ASM:         movl    [[offset_o_x]](%rsp), %eax          # 4-byte Reload
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir b/llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir
@@ -80,7 +80,7 @@
   bb.0.entry:
   
     DBG_PHI $fp0, 3
-    DBG_INSTR_REF 3, 0, !17, !DIExpression(), debug-location !30
+    DBG_INSTR_REF !17, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !30
     $eax = MOV32ri 0
     RET 0, debug-location !36
 
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
@@ -9,8 +9,8 @@
 #
 # CHECK-LABEL: name: foo
 # CHECK:       DBG_PHI $edi
-# CHECK-NEXT:  DBG_INSTR_REF 2, 0
-# CHECK-NEXT:  DBG_VALUE $dil
+# CHECK-NEXT:  DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+# CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $dil
 --- |
   ; ModuleID = 'out.ll'
   source_filename = "out.ll"
@@ -63,7 +63,7 @@
     liveins: $edi
 
     DBG_PHI $edi, 1
-    DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !13
     renamable $rax = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @someglobal, $noreg, debug-location !13 :: (load (s64) from got)
     MOV8mr killed renamable $rax, 1, $noreg, 0, $noreg, renamable $dil, debug-location !13 :: (store (s8) into @someglobal)
     RET64 debug-location !13
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
@@ -134,7 +134,7 @@
     DBG_PHI $rbx, 1
     $rax = COPY $rbx
     $rbx = MOV64ri 0
-    DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
 
     ; This sequence should mark the contents of rbx on block entry as being the
     ; value for the variable at this DBG_INSTR_REF. We've force it to be in
@@ -142,8 +142,8 @@
     ; CHECK:      DBG_PHI $rbx, 1
     ; CHECK-NEXT: $rax = COPY $rbx
     ; CHECK-NEXT: $rbx = MOV64ri 0
-    ; CHECK-NEXT: DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT: DBG_VALUE $rax, $noreg
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}} $rax
 
     $rbx = COPY $rax
     renamable $rbx = ADD64rr killed renamable $rbx, killed renamable $r14, implicit-def $eflags, debug-location !23
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir
@@ -84,9 +84,9 @@
     MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
 
     ;; This should resolve to the loaded register.
-    DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
-    ; CHECK:      DBG_INSTR_REF 1, 0,
-    ; CHECK-NEXT: DBG_VALUE $rcx
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}} $rcx
 
     ;; And if we say it's a smaller size, we should be able to pick out smaller
     ;; subregisters within the stack slot.
@@ -96,9 +96,9 @@
     MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
 
     ;; This should pick out the 32 bit value.
-    DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
-    ; CHECK:      DBG_INSTR_REF 2, 0,
-    ; CHECK-NEXT: DBG_VALUE $ecx
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !13
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}} $ecx
 
     ;; Try all the other subregs.
     DBG_PHI %stack.0, 3, 16
@@ -106,18 +106,18 @@
     $rcx = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
     MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
 
-    DBG_INSTR_REF 3, 0, !12, !DIExpression(), debug-location !13
-    ; CHECK:      DBG_INSTR_REF 3, 0,
-    ; CHECK-NEXT: DBG_VALUE $cx
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !13
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}} $cx
 
     DBG_PHI %stack.0, 4, 8
     $rax = MOV64ri 0
     $rcx = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
     MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
 
-    DBG_INSTR_REF 4, 0, !12, !DIExpression(), debug-location !13
-    ; CHECK:      DBG_INSTR_REF 4, 0,
-    ; CHECK-NEXT: DBG_VALUE $cl
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(4, 0), debug-location !13
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}} $cl
 
     ;; We can't, at this time, describe subregister fields with nonzero offset.
     ;; It's easily achieved by attaching more data to stack DBG_PHIs, but it's
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
@@ -158,32 +158,32 @@
   bb.3.if.end:
     liveins: $rbx, $r14
   
-    DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !13
-    DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
-    DBG_INSTR_REF 3, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !13
 
     ; Value number 1 is live-through the above control flow from the two
     ; DBG_PHIs:
-    ; CHECK:       DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT:  DBG_VALUE $r14
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $r14
     ;
     ; While value number 2 has different defs that merge on entry to bb.3.
     ; These are both in $rbx though, and we should find its location:
-    ; CHECK:       DBG_INSTR_REF 2, 0
-    ; CHECK-NEXT:  DBG_VALUE $rbx
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $rbx
     ;
     ; Value number 3 cannot be resolved because $rax is clobbered in bb.2,
     ; meaning the merged value in bb.3 is incorrect. It should produce a
     ; DBG_VALUE $noreg.
-    ; CHECK:       DBG_INSTR_REF 3, 0
-    ; CHECK-NEXT:  DBG_VALUE $noreg
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $noreg
 
     renamable $rbx = ADD64rr killed renamable $rbx, killed renamable $r14, implicit-def $eflags, debug-location !28
-    DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !13
 
     ; After clobbering rbx, the variable location should not be available.
-    ; CHECK:       DBG_INSTR_REF 2, 0
-    ; CHECK-NEXT:  DBG_VALUE $noreg
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $noreg
 
     $rdi = MOV64rr $rbx, debug-location !29
     CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, debug-location !29
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
@@ -164,32 +164,32 @@
   bb.4:
     liveins: $rbx, $r14
   
-    DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !13
-    DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
-    DBG_INSTR_REF 3, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !13
 
     ; Value number 1 is live-through the above control flow from the two
     ; DBG_PHIs:
-    ; CHECK:       DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT:  DBG_VALUE $r14
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $r14
     ;
     ; While value number 2 has different defs that merge on entry to bb.3.
     ; These are both in $rbx though, and we should find its location:
-    ; CHECK:       DBG_INSTR_REF 2, 0
-    ; CHECK-NEXT:  DBG_VALUE $rbx
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $rbx
     ;
     ; Value number 3 cannot be resolved because $rax is clobbered in bb.2,
     ; meaning the merged value in bb.3 is incorrect. It should produce a
     ; DBG_VALUE $noreg.
-    ; CHECK:       DBG_INSTR_REF 3, 0
-    ; CHECK-NEXT:  DBG_VALUE $noreg
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $noreg
 
     renamable $rbx = ADD64rr killed renamable $rbx, killed renamable $r14, implicit-def $eflags, debug-location !28
-    DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !13
 
     ; After clobbering rbx, the variable location should not be available.
-    ; CHECK:       DBG_INSTR_REF 2, 0
-    ; CHECK-NEXT:  DBG_VALUE $noreg
+    ; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT:  DBG_VALUE_LIST {{.+}} $noreg
 
     $rdi = MOV64rr $rbx, debug-location !29
     CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, debug-location !29
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir b/llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir
@@ -168,19 +168,19 @@
     ;; the size of the value on the stack makes it through to the expression.
 
     $al = MOV8ri 0, debug-instr-number 1, debug-location !7
-    DBG_INSTR_REF 1, 0, !8, !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), debug-location !7
-    ; CHECK:      DBG_VALUE $al, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed,
-    ; CHECK-SAME     : DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), dbg-instr-ref(1, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_convert, 8, DW_ATE_signed,
+    ; CHECK-SAME     : DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), $al
 
     MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
     ;; Clobber to force variable location onto stack. We should use a
     ;; deref_size 1 because the value is smaller than the variable.
     $al = MOV8ri 0, debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, 
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, 
     ; CHECK-SAME:     DW_OP_deref_size, 1, DW_OP_LLVM_convert, 8, DW_ATE_signed,
-    ; CHECK-SAME:     DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value),
+    ; CHECK-SAME:     DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), $rsp
 
     ; Terminate the current variable location,
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
@@ -189,11 +189,11 @@
     ;; Try again, but with the value originating on the stack, to ensure that
     ;; we can find its size. It should be deref_size 1 again.
     INC8m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 2, debug-location !7 :: (store (s8) into %stack.0)
-    DBG_INSTR_REF 2, 1000000, !8, !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus,
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), dbg-instr-ref(2, 1000000), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus,
     ; CHECK-SAME:     DW_OP_deref_size, 1, DW_OP_LLVM_convert, 8, DW_ATE_signed,
-    ; CHECK-SAME:     DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value),
+    ; CHECK-SAME:     DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), $rsp
 
     $eax = MOV32ri 0, debug-location !7
 
@@ -209,17 +209,17 @@
 
     MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
     $eax = MOV32ri 0, debug-location !7
-    DBG_INSTR_REF 7, 0, !8, !DIExpression(), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value)
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(7, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value), $rsp
 
     $eax = MOV32ri 0, debug-location !7
 
     ;; And for when the DBG_PHI specifies a stack size...
     DBG_PHI %stack.0, 8, 16
-    DBG_INSTR_REF 8, 0, !8, !DIExpression(), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 2, DW_OP_stack_value)
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(8, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 2, DW_OP_stack_value), $rsp
 
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
@@ -237,9 +237,9 @@
     $rax = MOV64ri 0, debug-instr-number 10, debug-location !7
     MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 10, 0, !8, !DIExpression(), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_stack_value),
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(10, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_stack_value), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -248,9 +248,9 @@
     $eax = MOV32ri 0, debug-instr-number 11, debug-location !7
     MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 11, 0, !8, !DIExpression(), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, 0, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus),
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(11, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -259,9 +259,9 @@
     $al = MOV8ri 0, debug-instr-number 12, debug-location !7
     MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 12, 0, !8, !DIExpression(), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value),
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(12, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -270,9 +270,9 @@
     $rax = MOV64ri 0, debug-instr-number 13, debug-location !7
     MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 13, 0, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(13, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM2]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -281,9 +281,9 @@
     $eax = MOV32ri 0, debug-instr-number 14, debug-location !7
     MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 14, 0, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, 0, ![[VARNUM2]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_LLVM_fragment, 0, 32),
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(14, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM2]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_LLVM_fragment, 0, 32), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -292,9 +292,9 @@
     $al = MOV8ri 0, debug-instr-number 15, debug-location !7
     MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 15, 0, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(15, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM2]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -305,9 +305,9 @@
     $rax = MOV64ri 0, debug-instr-number 16, debug-location !7
     MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 16, 0, !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value),
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), dbg-instr-ref(16, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -316,9 +316,9 @@
     $eax = MOV32ri 0, debug-instr-number 17, debug-location !7
     MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 17, 0, !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value),
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), dbg-instr-ref(17, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -327,9 +327,9 @@
     $al = MOV8ri 0, debug-instr-number 18, debug-location !7
     MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 18, 0, !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value),
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), dbg-instr-ref(18, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !8, !DIExpression(), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -338,9 +338,9 @@
     $rax = MOV64ri 0, debug-instr-number 19, debug-location !7
     MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 19, 0, !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(19, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM2]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -349,9 +349,9 @@
     $eax = MOV32ri 0, debug-instr-number 20, debug-location !7
     MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 20, 0, !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 4, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(20, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM2]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 4, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
@@ -360,9 +360,9 @@
     $al = MOV8ri 0, debug-instr-number 21, debug-location !7
     MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
     $rax = MOV64ri 0, debug-location !7
-    DBG_INSTR_REF 21, 0, !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), debug-location !7
-    ; CHECK:      DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
-    ; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(21, 0), debug-location !7
+    ; CHECK:      DBG_VALUE_LIST ![[VARNUM2]],
+    ; CHECK-SAME: !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), $rsp
     $eax = MOV32ri 0, debug-location !7
     DBG_VALUE $noreg, $noreg, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
     ; CHECK: DBG_VALUE $noreg, $noreg
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
@@ -20,9 +20,9 @@
 # CHECK: ![[VARNUM:[0-9]+]] = !DILocalVariable
 #
 # CHECK-LABEL: bb.8:
-# CHECK:       DBG_VALUE $rsp, 0, ![[VARNUM]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_LLVM_fragment, 64, 64),
+# CHECK:       DBG_VALUE_LIST ![[VARNUM]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_LLVM_fragment, 64, 64), $rsp,
 # CHECK-LABEL:  bb.9:
-# CHECK:       DBG_VALUE $rsp, 0, ![[VARNUM]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_LLVM_fragment, 64, 64),
+# CHECK:       DBG_VALUE_LIST ![[VARNUM]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_LLVM_fragment, 64, 64), $rsp,
 
 --- |
   ; ModuleID = 'missingvar.ll'
@@ -302,7 +302,7 @@
     MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $r10, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`)
     MOV64mr killed renamable $rdi, 1, $noreg, 40, $noreg, killed renamable $r9, debug-location !7 :: (store 8 into %ir.24)
     renamable $rax = MOV64rm killed renamable $rsi, 1, $noreg, 24, $noreg, debug-location !7 :: (load 8 from %ir.26)
-    DBG_INSTR_REF 1, 0, !8, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !7
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(1, 0), debug-location !7
     renamable $rax = SUB64rr killed renamable $rax, killed renamable $r11, implicit-def dead $eflags, debug-location !7
     renamable $r8 = SUB64rr killed renamable $r8, killed renamable $r14, implicit-def dead $eflags, debug-location !7
     renamable $r8 = exact SAR64ri killed renamable $r8, 3, implicit-def dead $eflags, debug-location !7
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
@@ -45,37 +45,37 @@
     ; CHECK-LABE: bb.0.entry:
 
     $rax = MOV64ri 1, debug-instr-number 1, debug-location !17
-    DBG_INSTR_REF 1, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !17
     ;; First check that picking out location works as usual.
-    ; CHECK:      DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT: DBG_VALUE $rax
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $rax
 
     $rax = MOV64ri 1, debug-instr-number 2, debug-location !17
-    DBG_INSTR_REF 2, 999, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 999), debug-location !17
     ;; Test out of bounds operand number.
-    ; CHECK:      DBG_INSTR_REF 2, 999
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 999)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     $rax = MOV64ri 1, debug-instr-number 3, debug-location !17
-    DBG_INSTR_REF 3, 1, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 1), debug-location !17
     ;; Test non-register operand
-    ; CHECK:      DBG_INSTR_REF 3, 1
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 1)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     ;; FIXME: We should test what happens when this meta-instruction is seen
     ;; by livedbugvalues with an instruction number. However, right now it's
     ;; impossible to turn the machine-code verifier off when loading MIR?
     ;KILL implicit killed $eflags, debug-instr-number 4, debug-location !17
-    ;DBG_INSTR_REF 4, 0, !16, !DIExpression(), debug-location !17
+    ;DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(4, 0), debug-location !17
     ;;; Test non-def operand
-    ;; check:      DBG_INSTR_REF 4, 0
-    ;; check-next: DBG_VALUE $noreg
+    ;; check:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
+    ;; check-next: DBG_VALUE_LIST {{.+}}, $noreg
 
     $noreg = MOV32ri 1, debug-instr-number 5, debug-location !17
-    DBG_INSTR_REF 5, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !17
     ;; Def of $noreg?
-    ; CHECK:      DBG_INSTR_REF 5, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     JCC_1 %bb.1, 1, implicit $eflags
     JMP_1 %bb.2
@@ -85,10 +85,10 @@
     ; CHECK-LABEL: bb.1:
 
     DBG_PHI $rax, 6
-    DBG_INSTR_REF 6, 1, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(6, 1), debug-location !17
     ;; Test out-of-bounds reference to a DBG_PHI.
-    ; CHECK:      DBG_INSTR_REF 6, 1
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 1)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     DBG_PHI $noreg, 7
     JMP_1 %bb.3
@@ -97,22 +97,22 @@
     successors: %bb.3
     ; CHECK-LABEL: bb.2:
     DBG_PHI 1, 6
-    DBG_INSTR_REF 6, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(6, 0), debug-location !17
     ;; Test non-reg operand to DBG_PHI. It's not clear if this can ever happen
     ;; as the result of an optimisation, but lets test for it anyway.
-    ; CHECK:      DBG_INSTR_REF 6, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     DBG_PHI 1, 7
     JMP_1 %bb.3
 
   bb.3:
     ; CHECK-LABEL: bb.3:
-    DBG_INSTR_REF 7, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(7, 0), debug-location !17
     ;; PHI resolution of illegal inputs shouldn't crash either. It should also
     ;; come out as a $noreg location.
-    ; CHECK:      DBG_INSTR_REF 7, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     RET 0, debug-location !17
 
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
@@ -37,17 +37,17 @@
   bb.0.entry:
     $rax = MOV64ri 1, debug-instr-number 1, debug-location !17
     ; This debug instruction should identify the value as being in $rax.
-    DBG_INSTR_REF 1, 0, !16, !DIExpression(), debug-location !17
-    ; CHECK: DBG_VALUE $rax, $noreg
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !17
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rax
 
     $rbx = COPY killed $rax, debug-location !17
     $rax = MOV64ri 1, debug-location !17
-    ; CHECK: DBG_VALUE $rbx, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rbx
 
-    DBG_INSTR_REF 2, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !17
     ; No instruction is labelled with the number "2". This should produce an
     ; empty variable location.
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
 
     $rbx = MOV64ri 1, debug-instr-number 3, debug-location !17
     JMP_1 %bb.1
@@ -56,40 +56,40 @@
     ; CHECK-LABEL: bb.1:
   bb.1:
 
-    DBG_INSTR_REF 3, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !17
     ; This refers to a value def'd in a parent block -- but it should be
     ; tracked into this block.
-    ; CHECK: DBG_VALUE $rbx, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rbx
     JMP_1 %bb.2
 
     ; CHECK-LABEL: bb.2:
   bb.2:
     ; Just like any other variable location, live-ins should be created for
     ; any successor blocks.
-    ; CHECK: DBG_VALUE $rbx, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rbx
 
-    DBG_INSTR_REF 5, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !17
     ; This is a debug use-before-def: the value appears a few instructions
     ; later. Any earlier value should be terminated here, _and_ we should
     ; emit a DBG_VALUE when the value becomes available.
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
 
     $rax = MOV64ri 1, debug-location !17
     $rax = MOV64ri 1, debug-location !17
     $rcx = MOV64ri 1, debug-instr-number 5, debug-location !17
-    ; CHECK: DBG_VALUE $rcx, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rcx
     $rax = MOV64ri 1, debug-location !17
 
-    DBG_INSTR_REF 6, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(6, 0), debug-location !17
     ; Another debug use-before-def, but across block boundaries.
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
     JMP_1 %bb.3
 
     ; CHECK-LABEL: bb.3:
   bb.3:
     $rax = MOV64ri 1, debug-location !17
     $rdx = MOV64ri 1, debug-instr-number 6, debug-location !17
-    ; CHECK: DBG_VALUE $rdx, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rdx
 
     ; Terminate variable location for next few blocks,
     DBG_VALUE $noreg, $noreg, !16, !DIExpression(), debug-location !17
@@ -104,8 +104,8 @@
     $rdx = MOV64ri 1, implicit-def $eflags, debug-location !17
     JCC_1 %bb.6, 4, implicit $eflags, debug-location !17
   bb.5:
-    DBG_INSTR_REF 7, 0, !16, !DIExpression(), debug-location !17
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(7, 0), debug-location !17
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
     JMP_1 %bb.6, debug-location !17
   bb.6:
     $rsi = MOV64ri 1, debug-instr-number 7, debug-location !17
@@ -114,8 +114,8 @@
   ; A use-before-def shouldn't pass another definition of the variable location
   ; or value.
   bb.7:
-    DBG_INSTR_REF 8, 0, !16, !DIExpression(), debug-location !17
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(8, 0), debug-location !17
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
     DBG_VALUE $rax, $noreg, !16, !DIExpression(), debug-location !17
     ; CHECK: DBG_VALUE $rax, $noreg,
     $rdi = MOV64ri 1, debug-instr-number 8, debug-location !17
@@ -123,33 +123,33 @@
   ; Loops: use-before-defs should be live-through loops, assuming that nothing
   ; in that loop modifies the variable location.
   bb.8:
-    DBG_INSTR_REF 9, 0, !16, !DIExpression(), debug-location !17
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(9, 0), debug-location !17
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
     JCC_1 %bb.8, 4, implicit $eflags
   bb.9:
     $rax = MOV64ri 11, debug-instr-number 9, debug-location !17
-    ; CHECK: DBG_VALUE $rax, $noreg,
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rax
 
   ; Likewise, use-before-defs where anything changes the variable location
   ; or value in the loop, should be discarded.
   bb.10:
     ; live-in,
-    ; CHECK: DBG_VALUE $rax, $noreg,
-    DBG_INSTR_REF 10, 0, !16, !DIExpression(), debug-location !17
-    ; CHECK: DBG_VALUE $noreg, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rax
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(10, 0), debug-location !17
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
 
   bb.11:
     $rbx = MOV64ri 1, debug-location !17
 
   bb.12:
-    DBG_INSTR_REF 9, 0, !16, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(9, 0), debug-location !17
     ; This still has a value in $rax,
-    ; CHECK: DBG_VALUE $rax, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rax
     JCC_1 %bb.11, 4, implicit $eflags
 
   bb.13:
     ; Live in,
-    ; CHECK: DBG_VALUE $rax, $noreg
+    ; CHECK: DBG_VALUE_LIST {{.+}}, $rax
     $rbx = MOV64ri 11, debug-instr-number 10, debug-location !17
     ; This is instruction 10 referred to in bb.10. However, as the variable
     ; location/value has been modified in the meantime, no DBG_VALUE should be
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
@@ -49,8 +49,8 @@
     $rax = MOV64ri 0
     $rdi = MOV64ri 0
 
-    DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
     ; CHECK:      DBG_INSTR_REF
-    ; CHECK-NEXT: DBG_VALUE $esi
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $esi
     RET64 $rsi, debug-location !12
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
@@ -71,39 +71,39 @@
   liveins: $rdi, $rax
     CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rax, debug-instr-number 4, debug-location !12
     ; CHECK:      CALL64pcrel32
-    DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT: DBG_VALUE $al
-    DBG_INSTR_REF 5, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 5, 0
-    ; CHECK-NEXT: DBG_VALUE $ah
-    DBG_INSTR_REF 8, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 8, 0
-    ; CHECK-NEXT: DBG_VALUE $ah
-    DBG_INSTR_REF 13, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 13, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $al
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $ah
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(8, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(8, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $ah
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(13, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(13, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
     MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
     $rax = MOV64ri 0, debug-location !12
     ; CHECK:      $rax = MOV64ri 0
     ; The value is now located in a spill slot, as a subregister within the
     ; slot, which InstrRefBasedLDV should be able to find.
-    DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT: DBG_VALUE $rsp, 0, !{{[0-9]*}}, !DIExpression(DW_OP_constu, 8, DW_OP_minus)
-    DBG_INSTR_REF 5, 0, !11, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST !{{[0-9]*}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 8, DW_OP_minus, DW_OP_deref), $rsp
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !12
     ; This and the next DBG_INSTR_REF refer to a value that is on the stack, but
     ; is located at a non-zero offset from the start of the slot -- $ah within
     ; $rax is 8 bits in. Today, InstrRefBasedLDV can't express this. It also
     ; doesn't seem likely to be profitable.
-    ; CHECK-NEXT: DBG_INSTR_REF 5, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
-    DBG_INSTR_REF 8, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 8, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
-    DBG_INSTR_REF 13, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK-NEXT: DBG_INSTR_REF 13, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(8, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(8, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(13, 0), debug-location !12
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(13, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
     $rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
     RET64 $rax, debug-location !12
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
@@ -171,6 +171,6 @@
     CALL64r %37, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp, implicit-def $al, debug-location !13
     ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !13
     %13:gr32 = INC32r %6, implicit-def dead $eflags, debug-instr-number 1, debug-location !13
-    DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
     JMP_1 %bb.1, debug-location !13
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir
@@ -250,7 +250,7 @@
     RET 0, $al
   
   bb.13:
-    DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
     %32:gr64 = IMPLICIT_DEF
     MOV8mr killed %32, 1, $noreg, 0, $noreg, %0, debug-location !13 :: (store (s8) into `i8* undef`, align 8)
     %33:gr8 = IMPLICIT_DEF
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
@@ -111,7 +111,7 @@
   
     %7:gr32 = nofpexcept CVTTSS2SIrr killed %1, implicit $mxcsr, debug-instr-number 1
     %8:gr8 = COPY killed %7.sub_8bit
-    DBG_INSTR_REF 2, 0, !6, !DIExpression(), debug-location !17
+    DBG_INSTR_REF !6, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !17
     TEST8rr killed %8, %8, implicit-def $eflags
     JCC_1 %bb.3, 5, implicit killed $eflags
     JMP_1 %bb.2
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
@@ -52,33 +52,33 @@
     MOV64mr $rsp, 1, $noreg, 16, $noreg, $rdi :: (store 8 into %stack.0)
     $rax = MOV64ri 0, debug-location !12
     INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 3, debug-location !DILocation(line: 0, scope: !7) :: (store (s32) into %stack.0)
-    DBG_INSTR_REF 2, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK:      DBG_INSTR_REF 2, 0
-    ; CHECK-NEXT: DBG_VALUE $rsp
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !12
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $rsp
     ;; Test that the old value (from the DBG_PHI) is not tracked anywhere. It
     ;; should not be considered as being on the stack any more.
-    DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK:      DBG_INSTR_REF 1, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
     INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-location !12 :: (store (s32) into %stack.0)
     ;; The above INC32m should be detected as clobbering the stack location,
     ;; even though it isn't debug labelled.
-    DBG_INSTR_REF 2, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK:      DBG_INSTR_REF 2, 0
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !12
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     ;; Store another debug-labelled value to the stack,
     INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 5, debug-location !DILocation(line: 0, scope: !7) :: (store (s32) into %stack.0)
     ;; Point the variable at that value.
-    DBG_INSTR_REF 4, 0, !11, !DIExpression(), debug-location !12
-    ; CHECK:      DBG_INSTR_REF 4, 0,
-    ; CHECK-NEXT: DBG_VALUE $rsp
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(4, 0), debug-location !12
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0),
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $rsp
     ;; Overwrite the stack: LiveDebugValues should explicitly undef the stack
-    ;; location with DBG_VALUE $noreg, as DbgEntityHistoryCalculator doesn't
+    ;; location with DBG_VALUE_LIST $noreg, as DbgEntityHistoryCalculator doesn't
     ;; look at the stack.
     INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-location !DILocation(line: 0, scope: !7) :: (store (s32) into %stack.0)
     ; CHECK:      INC32m $rsp
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     $rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
     RET64 $rax, debug-location !12
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir b/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
@@ -11,22 +11,22 @@
 # CHECK:       ![[FIRSTVAR:[0-9]+]] = !DILocalVariable(name: "_First",
 #
 # CHECK-LABEL: bb.0.entry:
-# CHECK:       DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
-# CHECK-SAME:        !DIExpression(DW_OP_LLVM_fragment, 64, 64)
+# CHECK:       DBG_VALUE_LIST ![[FIRSTVAR]],
+# CHECK-SAME:        !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), $rbx
 #
 # CHECK-LABEL: bb.1.if.then.i.i.i.i.i:
-# CHECK:       DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
-# CHECK-SAME:        !DIExpression(DW_OP_LLVM_fragment, 64, 64)
-# CHECK:       DBG_INSTR_REF {{.*}} ![[FIRSTVAR]],
-# CHECK:       DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
-# CHECK-SAME:        !DIExpression(DW_OP_LLVM_fragment, 64, 64)
+# CHECK:       DBG_VALUE_LIST ![[FIRSTVAR]],
+# CHECK-SAME:        !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), $rbx
+# CHECK:       DBG_INSTR_REF ![[FIRSTVAR]],
+# CHECK:       DBG_VALUE_LIST ![[FIRSTVAR]],
+# CHECK-SAME:        !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), $rbx
 
 # CHECK-LABEL: bb.2._Z17do_insert_cv_testI5_TreeEvv.exit:
-# CHECK:       DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
-# CHECK-SAME:        !DIExpression(DW_OP_LLVM_fragment, 64, 64)
-# CHECK:       DBG_INSTR_REF {{.*}} ![[FIRSTVAR]],
-# CHECK:       DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
-# CHECK-SAME:        !DIExpression(DW_OP_LLVM_fragment, 64, 64)
+# CHECK:       DBG_VALUE_LIST ![[FIRSTVAR]],
+# CHECK-SAME:        !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), $rbx
+# CHECK:       DBG_INSTR_REF ![[FIRSTVAR]],
+# CHECK:       DBG_VALUE_LIST ![[FIRSTVAR]],
+# CHECK-SAME:        !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), $rbx
 
 --- |
   source_filename = "reduced.ll"
@@ -118,7 +118,7 @@
     renamable $r14d = XOR32rr undef $r14d, undef $r14d, implicit-def dead $eflags, implicit-def $r14
     dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi
     CALL64r undef renamable $rax, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax, implicit-def dead $rdx
-    DBG_INSTR_REF 2, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !15
+    DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(2, 0), debug-location !15
     dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi, debug-location !15
     CALL64r undef renamable $rax, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def dead $al, debug-location !15
     TEST8rr renamable $r14b, renamable $r14b, implicit-def $eflags, implicit killed $r14
@@ -128,13 +128,13 @@
     dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi
     CALL64r undef renamable $rax, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax, debug-instr-number 3
     $rbx = MOV64rr killed $rax
-    DBG_INSTR_REF 3, 7, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !15
+    DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(3, 7), debug-location !15
   
   bb.2._Z17do_insert_cv_testI5_TreeEvv.exit:
     liveins: $rbx
   
     DBG_PHI $rbx, 1
-    DBG_INSTR_REF 1, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !15
+    DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(1, 0), debug-location !15
     dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi, debug-location !16
     $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags, debug-location !16
     $rdx = MOV64rr killed $rbx, debug-location !16
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
@@ -144,7 +144,7 @@
   bb.2.if.end:
     %2:gr16 = PHI %11, %bb.0, %17, %bb.1, debug-instr-number 1, debug-location !13
   ; CHECK:              DBG_PHI $bp, 1
-    DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
     %31:gr32 = MOVSX32rr16 %6, debug-location !13
     %30:gr32 = MOVSX32rr16 killed %2, debug-location !13
     %29:gr32 = ADD32rr killed %30, killed %31, implicit-def $eflags, debug-location !13
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
@@ -147,7 +147,7 @@
   bb.2.if.end:
     %2:gr64 = PHI %9, %bb.0, %10, %bb.1, debug-instr-number 1, debug-location !13
   ; CHECK:              DBG_PHI $rbx, 1
-    DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+    DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
     %14:gr64 = ADD64rr killed %2, %6, implicit-def $eflags, debug-location !13
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
     $rdi = COPY %14, debug-location !13
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
@@ -146,9 +146,9 @@
     %64:gr32 = PHI %24, %bb.0, %44, %bb.1, debug-location !18
 
     INLINEASM &"", 1, 12, %50, 12, %51, 12, %52, 12, %53, 12, %54, 12, %55, 12, %56, 12, %57, 12, %58, 12, %59, 12, %60, 12, %61, 12, %62, 12, %63, 12, %64
-    DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
     ; CHECK:      DBG_PHI %stack.0, 1, 16
-    ; CHECK:      DBG_INSTR_REF 1, 0
+    ; CHECK:      DBG_INSTR_REF {{.+}} dbg-instr-ref(1, 0)
     ; CHECK:      renamable $eax = MOV32rm %stack.0,
     $eax = COPY killed %0, debug-location !19
     RET 0, killed $eax, debug-location !19
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
@@ -145,9 +145,9 @@
     %64:gr32 = PHI %24, %bb.0, %44, %bb.1, debug-location !18
 
     INLINEASM &"", 1, 12, %50, 12, %51, 12, %52, 12, %53, 12, %54, 12, %55, 12, %56, 12, %57, 12, %58, 12, %59, 12, %60, 12, %61, 12, %62, 12, %63, 12, %64
-    DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
     ; CHECK-NOT:  DBG_PHI
-    ; CHECK:      DBG_INSTR_REF 1, 0
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
     ; CHECK-NOT:  DBG_PHI
     $eax = COPY killed %0, debug-location !19
     RET 0, killed $eax, debug-location !19
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
@@ -139,10 +139,10 @@
     %63:gr32 = PHI %23, %bb.0, %43, %bb.1, debug-location !18
     %64:gr32 = PHI %24, %bb.0, %44, %bb.1, debug-location !18
 
-    DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
     ; CHECK:      DBG_PHI %stack.1, 1, 32
     ; CHECK:      renamable $eax = MOV32rm %stack.1,
-    ; CHECK:      DBG_INSTR_REF 1, 0
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
     $eax = COPY killed %0, debug-location !19
     RET 0, killed $eax, debug-location !19
 
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
@@ -120,9 +120,9 @@
     ; CHECK-LABEL: bb.2.if.end:
   bb.2.if.end:
     %0:gr32 = PHI %1, %bb.0, %2, %bb.1, debug-instr-number 1, debug-location !18
-    DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
     ; CHECK:      DBG_PHI $ebp, 1
-    ; CHECK:      DBG_INSTR_REF 1, 0
+    ; CHECK:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
     $eax = COPY killed %0, debug-location !19
     ; Confirm that %0 is allocated in $ebp,
     ; CHECK:      $eax = COPY killed renamable $ebp
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir b/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
@@ -12,14 +12,14 @@
 # in block 5.
 #
 # CHECK-LABEL: bb.3:
-# CHECK:       DBG_INSTR_REF 7, 0
-# CHECK-NEXT:  DBG_VALUE $rdx
+# CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)
+# CHECK-NEXT:  DBG_VALUE_LIST {{.+}}, $rdx
 # CHECK-NEXT:  $rcx = MOV64rr $rdx
 # CHECK-LABEL: bb.4:
-# CHECK:       DBG_VALUE $rcx
+# CHECK:       DBG_VALUE_LIST {{.+}}, $rcx
 # CHECK-NEXT:  $rdx = MOV64rr killed $rcx
 # CHECK-LABEL: bb.5:
-# CHEKC-NOT:   DBG_VALUE
+# CHECK-NOT:   DBG_VALUE
 --- |
   target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
@@ -91,7 +91,7 @@
     liveins: $rcx, $rdi, $rdx, $eflags
   
     DBG_PHI $rcx, 2
-    DBG_INSTR_REF 2, 0, !18, !DIExpression(), debug-location !22
+    DBG_INSTR_REF !18, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !22
     JCC_1 %bb.1, 4, implicit $eflags, debug-location !22
   
   bb.2:
@@ -105,7 +105,7 @@
     liveins: $rcx, $rdi, $eflags
   
     $rdx = MOV64ri 0, debug-instr-number 7, debug-location !22
-    DBG_INSTR_REF 7, 0, !18, !DIExpression(), debug-location !22
+    DBG_INSTR_REF !18, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(7, 0), debug-location !22
     $rcx = MOV64rr $rdx
     JMP_1 %bb.5, debug-location !22
   
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir b/llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir
@@ -19,17 +19,17 @@
 # CHECK: ![[VARNUM:[0-9]+]] = !DILocalVariable
 #
 ## There should be no variable location, just a single DBG_VALUE $noreg.
-# CHECK:     DBG_VALUE $noreg
+# CHECK:     DBG_VALUE_LIST {{.+}} $noreg
 #
 ## And then another.
-# CHECK:     DBG_VALUE $noreg
+# CHECK:     DBG_VALUE_LIST {{.+}} $noreg
 #
 ## Test that if there's no limit, we _do_ get some locations.
-# NOLIMIT:      DBG_INSTR_REF 1, 0
-# NOLIMIT-NEXT: DBG_VALUE $esi
+# NOLIMIT:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+# NOLIMIT-NEXT: DBG_VALUE_LIST {{.+}} $esi
 #
-# NOLIMIT:      DBG_INSTR_REF 5,
-# NOLIMIT-NEXT: DBG_VALUE $rsp
+# NOLIMIT:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(5,
+# NOLIMIT-NEXT: DBG_VALUE_LIST {{.+}} $rsp
 --- |
   define i8 @test(i32 %bar) local_unnamed_addr !dbg !7 {
   entry:
@@ -75,7 +75,7 @@
     $rax = MOV64ri 0
     $rdi = MOV64ri 0
 
-    DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !12
     ; This shouldn't find anything -- we have disabled tracking of spills.
 
     ; In addition to plain spills, spills that are folded into instructions
@@ -83,7 +83,7 @@
     INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 5, debug-location !12 :: (store (s32) into %stack.0)
 
 
-    DBG_INSTR_REF 5, 1000000, !11, !DIExpression(), debug-location !12
+    DBG_INSTR_REF !11, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 1000000), debug-location !12
     ; Shouldn't be able to find the reference to instr 5's memory operand.
 
     RET64 $rsi, debug-location !12
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir b/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
@@ -219,7 +219,7 @@
     ;AAAAAA %4:gr32 = PHI %0, %bb.11, %10, %bb.21, debug-instr-number 1
     ;BBBBBB %4:gr32 = PHI %0, %bb.11, %10, %bb.21
     %5:gr32 = PHI undef %35:gr32, %bb.11, %9, %bb.21
-    ;AAAAAA DBG_INSTR_REF 1, 0, !10, !DIExpression(), debug-location !9
+    ;AAAAAA DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !9
     ;BBBBBB DBG_VALUE %4, 0, !10, !DIExpression(), debug-location !9
     %39:gr8 = COPY %27.sub_8bit
     TEST8rr killed %39, %39, implicit-def $eflags, debug-location !9
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir b/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
@@ -7,7 +7,7 @@
 # CHECK-NEXT: - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 #
 # CHECK:      MOV64rr $rdi, debug-instr-number 2
-# CHECK-NEXT: DBG_INSTR_REF 1, 0
+# CHECK-NEXT: DBG_INSTR_REF dbg-instr-ref(1, 0)
 ---
 name: test
 tracksRegLiveness: true
@@ -19,7 +19,7 @@
   bb.0:
   liveins: $rdi, $rax
     $rbp = MOV64rr $rdi, debug-instr-number 2
-    DBG_INSTR_REF 1, 0
+    DBG_INSTR_REF dbg-instr-ref(1, 0)
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
     RET64 $rax
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir b/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
@@ -6,16 +6,16 @@
 # livedebugvars-crossbb-interval.mir.
 #
 # CHECK-LABEL: bb.0:
-# CHECK:       DBG_INSTR_REF 1, 0
+# CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 # CHECK-NEXT:  JMP_1
 # CHECK-LABEL: bb.1:
-# CHECK:       DBG_INSTR_REF 2, 0
+# CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
 # CHECK-NEXT:  JMP_1
 # CHECK-LABEL: bb.2:
-# CHECK:       DBG_INSTR_REF 3, 0
+# CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
 # CHECK-NEXT:  CALL64pcrel32
 # CHECK-LABEL: bb.3:
-# CHECK:       DBG_INSTR_REF 4, 0
+# CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
 # CHECK-NEXT:  JMP_1
 #
 #
@@ -24,23 +24,23 @@
 # the DBG_INSTR_REF lands on.
 #
 # FASTREG-LABEL: bb.0:
-# FASTREG-DAG:   DBG_INSTR_REF 1, 0
+# FASTREG-DAG:   DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 # FASTREG-DAG:   MOV64mr
 # FASTREG-DAG:   MOV32mr
 # FASTREG-NEXT:  JMP_1
 # FASTREG-LABEL: bb.1:
-# FASTREG:       DBG_INSTR_REF 2, 0
+# FASTREG:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
 # FASTREG-NEXT:  JMP_1
 # FASTREG-LABEL: bb.2:
-# FASTREG:       DBG_INSTR_REF 3, 0
+# FASTREG:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
 # FASTREG-NEXT:  CALL64pcrel32
 # FASTREG-LABEL: bb.3:
 # FASTREG-DAG:   MOV32rm
-# FASTREG-DAG:   DBG_INSTR_REF 4, 0
+# FASTREG-DAG:   DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
 # FASTREG-DAG:   MOV32mr
 # FASTREG-NEXT:  JMP_1
 # FASTREG-LABEL: bb.4:
-# FASTREG:       DBG_INSTR_REF 5, 0
+# FASTREG:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)
 # FASTREG-NEXT:  RET64
 
 --- |
@@ -112,18 +112,18 @@
     %2:gr64 = COPY $rdi
     %3:gr64 = COPY killed %2
     %5:gr32 = COPY killed %4
-    DBG_INSTR_REF 1, 0, !9, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !9, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !16
     JMP_1 %bb.3
 
   bb.1:
-    DBG_INSTR_REF 2, 0, !9, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !9, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !16
     JMP_1 %bb.4
 
   bb.2:
     ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !19
     $edi = COPY %6, debug-location !19
     $al = MOV8ri 0, debug-location !19
-    DBG_INSTR_REF 3, 0, !9, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !9, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !16
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $al, implicit $edi, implicit-def $eax, debug-location !19
     ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !19
     %7:gr32 = COPY $eax, debug-location !19
@@ -131,12 +131,12 @@
 
   bb.3:
     %6:gr32 = MOV32rm %3, 1, $noreg, 0, $noreg, debug-location !17
-    DBG_INSTR_REF 4, 0, !9, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !9, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(4, 0), debug-location !16
     JMP_1 %bb.2
 
   bb.4:
     $eax = COPY %5, debug-location !18
-    DBG_INSTR_REF 5, 0, !9, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !9, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !16
     RET64 implicit $eax, debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir b/llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir
@@ -13,7 +13,7 @@
 # CHECK:      LEA64_32r
 # CHECK-SAME: debug-instr-number 2
 #
-# CHECK:      DBG_INSTR_REF 1, 0
+# CHECK:      DBG_INSTR_REF dbg-instr-ref(1, 0)
 ---
 name:            test1
 alignment:       16
@@ -34,7 +34,7 @@
     %0:gr32 = COPY killed $edi
     %1:gr32 = SHL32ri killed %0, 5, implicit-def dead $eflags
     %2:gr32 = ADD32ri8_DB killed %1, 3, implicit-def dead $eflags, debug-instr-number 1
-    DBG_INSTR_REF 1, 0
+    DBG_INSTR_REF dbg-instr-ref(1, 0)
     $eax = COPY killed %2
     RET 0, killed $eax
 
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir b/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
@@ -142,9 +142,9 @@
     CALLpcrel32 &_chkstk, implicit $esp, implicit $ssp, implicit $eax, implicit $esp, implicit-def dead $eax, implicit-def $esp, implicit-def dead $eflags, debug-instr-number 2, debug-location !41
     $ebx = MOV32rr $esp, debug-location !41
     $eax = MOV32ri 0
-    DBG_INSTR_REF 2, 6, !42, !DIExpression(DW_OP_deref), debug-location !46
-    ; CHECK-LABEL: DBG_INSTR_REF 2, 6
-    ; CHECK:       DBG_VALUE $esp
+    DBG_INSTR_REF !42, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref), dbg-instr-ref(2, 6), debug-location !46
+    ; CHECK-LABEL: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 6)
+    ; CHECK:       DBG_VALUE_LIST {{.+}}, $esp
 
     ;; Variable value is $esp / $ebx, will be based on $esp initially. We'll now
     ;; allocate more stack space, and several things should happen:
@@ -156,18 +156,18 @@
     ;;    $ebx, which comes from the first modified $esp.
     CALLpcrel32 &_chkstk, implicit $esp, implicit $ssp, implicit $eax, implicit $esp, implicit-def dead $eax, implicit-def $esp, implicit-def dead $eflags, debug-instr-number 3, debug-location !41
     ; CHECK-NEXT: CALLpcrel32
-    ; CHECK-NEXT: DBG_VALUE $ebx
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $ebx
 
-    DBG_INSTR_REF 3, 6, !42, !DIExpression(DW_OP_deref), debug-location !46
-    ; CHECK-NEXT: DBG_INSTR_REF 3, 6
-    ; CHECK-NEXT: DBG_VALUE $esp
+    DBG_INSTR_REF !42, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref), dbg-instr-ref(3, 6), debug-location !46
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 6)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $esp
 
     $esp = ADD32ri killed $esp, 0, implicit-def dead $eflags
     ; CHECK-NEXT: ADD32ri
 
-    DBG_INSTR_REF 3, 6, !42, !DIExpression(DW_OP_deref), debug-location !46
-    ; CHECK-NEXT: DBG_INSTR_REF 3, 6
-    ; CHECK-NEXT: DBG_VALUE $noreg
+    DBG_INSTR_REF !42, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref), dbg-instr-ref(3, 6), debug-location !46
+    ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 6)
+    ; CHECK-NEXT: DBG_VALUE_LIST {{.+}}, $noreg
 
     $esp = MOV32rr $ebp, debug-location !49
     $ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !49
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
@@ -82,7 +82,7 @@
     %0:gr64 = MOV64rm killed %1, 1, $noreg, 0, $noreg, debug-location !7 :: (load (s64) from `i8** undef`)
     %2:gr32 = COPY %0.sub_32bit, debug-location !7
     %3:gr32 = SUB32rm %2, %0, 1, $noreg, 0, $noreg, implicit-def $eflags, debug-instr-number 1, debug-location !7 :: (load (s32) from %ir._M_start.i2756, align 8)
-    DBG_INSTR_REF 1, 0, !8, !DIExpression(), debug-location !7
+    DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !7
     JCC_1 %bb.2, 5, implicit $eflags, debug-location !7
     JMP_1 %bb.1, debug-location !7
   
diff --git a/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir b/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
--- a/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
+++ b/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
@@ -12,7 +12,7 @@
 # CHECK: ![[VAR:[0-9]+]] = !DILocalVariable(name: "a"
 
 # CHECK-LABEL: bb.6
-# CHECK: DBG_VALUE $esi, $noreg, ![[VAR]], !DIExpression()
+# CHECK: DBG_VALUE_LIST ![[VAR]], !DIExpression(DW_OP_LLVM_arg, 0), $esi
 
 --- |
   target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@@ -197,7 +197,7 @@
 
     DBG_PHI $esi, 3
     DBG_PHI $edi, 2
-    DBG_INSTR_REF 3, 0, !14, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !16
     CALL64pcrel32 @"?bar@@YAHXZ", csr_win64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !19
     renamable $edi = nsw SUB32rr killed renamable $edi, killed renamable $eax, implicit-def dead $eflags, debug-instr-number 1, debug-location !19
     renamable $eax = IMUL32rri renamable $edi, -1431655765, implicit-def dead $eflags, debug-location !21
@@ -211,7 +211,7 @@
 
     CALL64pcrel32 @"?bar@@YAHXZ", csr_win64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !22
     renamable $esi = nsw ADD32rr killed renamable $esi, killed renamable $eax, implicit-def dead $eflags, debug-instr-number 4, debug-location !22
-    DBG_INSTR_REF 4, 0, !14, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(4, 0), debug-location !16
     JMP_1 %bb.3
 
   bb.4 (%ir-block.16):
@@ -226,7 +226,7 @@
     liveins: $esi
 
     CALL64pcrel32 @"?bar@@YAHXZ", csr_win64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !31
-    DBG_INSTR_REF 5, 0, !14, !DIExpression(), debug-location !16
+    DBG_INSTR_REF !14, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(5, 0), debug-location !16
 
   bb.6 (%ir-block.22):
     liveins: $esi
diff --git a/llvm/test/DebugInfo/X86/dbg-value-arg-movement.ll b/llvm/test/DebugInfo/X86/dbg-value-arg-movement.ll
--- a/llvm/test/DebugInfo/X86/dbg-value-arg-movement.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-arg-movement.ll
@@ -61,7 +61,7 @@
 ; INSTRREF: DBG_PHI $edi, 1
 ; INSTRREF: DBG_VALUE $edi, $noreg, [[BAZVAR]]
 ; INSTRREF-LABEL: bb.1.next
-; INSTRREF: DBG_INSTR_REF 1, 0, [[XYZVAR]],
+; INSTRREF: DBG_INSTR_REF [[XYZVAR]], {{.+}}, dbg-instr-ref(1, 0)
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/DebugInfo/X86/dbg-value-funcarg.ll b/llvm/test/DebugInfo/X86/dbg-value-funcarg.ll
--- a/llvm/test/DebugInfo/X86/dbg-value-funcarg.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-funcarg.ll
@@ -61,7 +61,7 @@
 ; INSTRREF-NEXT: DBG_VALUE 123, $noreg, ![[LOCAL]], !DIExpression(),
 ; INSTRREF:      CALL64pcrel32 @bar,
 ; INSTRREF-NEXT: ADJCALLSTACKUP64
-; INSTRREF:      DBG_INSTR_REF 1, 0, ![[LOCAL]], !DIExpression(),
+; INSTRREF:      DBG_INSTR_REF ![[LOCAL]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0),
 ; INSTRREF-NOT: DBG_
 ; INSTRREF:    TCRETURNdi64 @bar,
 
@@ -96,7 +96,7 @@
 ; INSTRREF: CALL64pcrel32 @bar,
 ; INSTRREF: DBG_VALUE 123, $noreg, ![[T2B]], !DIExpression(),
 ; INSTRREF: CALL64pcrel32 @bar,
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[T2B]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[T2B]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0),
 ; INSTRREF: TCRETURNdi64 @bar,
 
 entry:
@@ -125,10 +125,10 @@
 ; INSTRREF: DBG_PHI $edi, 1
 ; INSTRREF: DBG_VALUE $edi, $noreg, ![[T3A]], !DIExpression(),
 ; INSTRREF: CALL64pcrel32 @bar,
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[TMP]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[TMP]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0),
 ; INSTRREF: DBG_VALUE 123, $noreg, ![[T3A]], !DIExpression(),
 ; INSTRREF: CALL64pcrel32 @bar,
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[T3A]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[T3A]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0),
 ; INSTRREF: TCRETURNdi64 @bar,
 entry:
   call void @llvm.dbg.value(metadata i32 %t3a, metadata !33, metadata !DIExpression()), !dbg !35
diff --git a/llvm/test/DebugInfo/X86/dbg-value-funcarg2.ll b/llvm/test/DebugInfo/X86/dbg-value-funcarg2.ll
--- a/llvm/test/DebugInfo/X86/dbg-value-funcarg2.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-funcarg2.ll
@@ -60,8 +60,8 @@
 ;; of the earlier DBG_PHIs.
 ; INSTRREF:     ADJCALLSTACKUP
 ; INSTRREF-NOT: DBG_
-; INSTRREF-DAG: DBG_INSTR_REF 1, 0, ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 0, 64)
-; INSTRREF-DAG: DBG_INSTR_REF 2, 0, ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 64, 64)
+; INSTRREF-DAG: DBG_INSTR_REF ![[S1]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 64), dbg-instr-ref(1, 0)
+; INSTRREF-DAG: DBG_INSTR_REF ![[S1]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(2, 0)
 
 ; And then no more DBG_ instructions before the add.
 ; COMMON-NOT: DBG_
diff --git a/llvm/test/DebugInfo/X86/dbg-value-funcarg4.ll b/llvm/test/DebugInfo/X86/dbg-value-funcarg4.ll
--- a/llvm/test/DebugInfo/X86/dbg-value-funcarg4.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-funcarg4.ll
@@ -9,8 +9,8 @@
 
 ; CHECK: DBG_PHI $edi, 1
 
-; CHECK: DBG_INSTR_REF 1, 0, ![[LOCAL]], !DIExpression(),
-; CHECK: DBG_INSTR_REF 1, 0, ![[LOCAL2]], !DIExpression(),
+; CHECK: DBG_INSTR_REF ![[LOCAL]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
+; CHECK: DBG_INSTR_REF ![[LOCAL2]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
 
 declare void @bar(i32)
 declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll b/llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll
--- a/llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -start-after=codegenprepare -stop-before=finalize-isel -o - | FileCheck %s
+; RUN: llc %s -start-after=codegenprepare -stop-before=finalize-isel -experimental-debug-variable-locations=true -o - | FileCheck %s
 
 ;; Generated from clang -O2 -emit-llvm -S -g reduce.c -o -
 ;; $ cat reduce.c
@@ -15,8 +15,8 @@
 ;; dbg.value using the gep, but we lose that gep in SelectionDAG. Ensure that
 ;; we salvage the value.
 
-; CHECK: [[E_REG:%[0-9]+]]{{.+}} = MOV{{.+}} @b
-; CHECK: DBG_VALUE_LIST {{.*}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 4, DW_OP_minus, DW_OP_stack_value), [[E_REG]], debug-location
+; CHECK: {{%[0-9]+.+}} = MOV{{.+}} @b, {{.+}}, debug-instr-number [[INSTR_NUM:[0-9]+]]
+; CHECK: DBG_INSTR_REF {{.*}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 4, DW_OP_minus, DW_OP_stack_value), dbg-instr-ref([[INSTR_NUM]], 0), debug-location
 
 target triple = "x86_64-unknown-linux-gnu"
 
diff --git a/llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll b/llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
--- a/llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
+++ b/llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
@@ -1,6 +1,6 @@
-; RUN: llc %s -start-after=codegenprepare -stop-before=finalize-isel -o - | FileCheck --check-prefixes=CHECK,DAG %s
-; RUN: llc %s -fast-isel=true -start-after=codegenprepare -stop-before=finalize-isel -o - | FileCheck --check-prefixes=CHECK,FAST %s
-; RUN: llc %s -global-isel=true -start-after=codegenprepare -stop-before=finalize-isel -o - | FileCheck --check-prefixes=CHECK,GLOBAL %s
+; RUN: llc %s -start-after=codegenprepare -stop-before=finalize-isel -experimental-debug-variable-locations=false -o - | FileCheck --check-prefixes=CHECK,DAG %s
+; RUN: llc %s -fast-isel=true -start-after=codegenprepare -stop-before=finalize-isel -experimental-debug-variable-locations=false -o - | FileCheck --check-prefixes=CHECK,FAST %s
+; RUN: llc %s -global-isel=true -start-after=codegenprepare -stop-before=finalize-isel -experimental-debug-variable-locations=false -o - | FileCheck --check-prefixes=CHECK,GLOBAL %s
 
 ;; Test that a dbg.value that uses a DIArgList is correctly converted to a
 ;; DBG_VALUE_LIST that uses the registers corresponding to its operands.
diff --git a/llvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll b/llvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll
--- a/llvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll
+++ b/llvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll
@@ -11,7 +11,7 @@
 ;; NB: the original test has an additional spurious DW_OP_deref in the
 ;; dbg.declare's arguments, which is preserved here, translating to two derefs.
 
-; CHECK: DBG_INSTR_REF 1, 2, !{{[0-9]+}}, !DIExpression(DW_OP_deref, DW_OP_deref)
+; CHECK: DBG_INSTR_REF !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_deref), dbg-instr-ref(1, 2)
 
 source_filename = "test/DebugInfo/COFF/types-array-advanced.ll"
 target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
diff --git a/llvm/test/DebugInfo/X86/instr-ref-dyn-alloca-win32.ll b/llvm/test/DebugInfo/X86/instr-ref-dyn-alloca-win32.ll
--- a/llvm/test/DebugInfo/X86/instr-ref-dyn-alloca-win32.ll
+++ b/llvm/test/DebugInfo/X86/instr-ref-dyn-alloca-win32.ll
@@ -13,7 +13,7 @@
 ;; The alloca instruction should be labelled, and we should refer to operand 2,
 ;; which happens to be a def of $esp
 ; DYN_LABEL: DYN_ALLOCA_32 {{.*}} debug-instr-number 1,
-; DYN_LABEL: DBG_INSTR_REF 1, 2
+; DYN_LABEL: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 2)
 
 ;; Once lowered, on win32 _chkstk alters the stack pointer. We should label the
 ;; call and it's SP operand, plus check for a value substitution.
diff --git a/llvm/test/DebugInfo/X86/instr-ref-ir-reg-read.ll b/llvm/test/DebugInfo/X86/instr-ref-ir-reg-read.ll
--- a/llvm/test/DebugInfo/X86/instr-ref-ir-reg-read.ll
+++ b/llvm/test/DebugInfo/X86/instr-ref-ir-reg-read.ll
@@ -9,7 +9,7 @@
 ; Just examine to see that we read something from $rsp.
 ; CHECK-LABEL: bb.1.if.then:
 ; CHECK:       DBG_PHI $rsp, 1
-; CHECK:       DBG_INSTR_REF 1, 0
+; CHECK:       DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 
 source_filename = "tlb-9e7172.c"
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll b/llvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll
--- a/llvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll
+++ b/llvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll
@@ -7,7 +7,7 @@
 ;; vreg that is never defined, which risks a crash. Check that we don't crash,
 ;; and produce an empty variable location.
 
-; CHECK: DBG_VALUE $noreg
+; CHECK: DBG_VALUE_LIST {{.+}}, $noreg
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll b/llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
--- a/llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
+++ b/llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
@@ -37,10 +37,10 @@
 
 ; INSTRREF:      ADD32rr
 ; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 ; INSTRREF-NEXT: ADD32rr
 ; INSTRREF-SAME: debug-instr-number 2
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
 
 ; Test that fast-isel will produce DBG_INSTR_REFs too.
 
@@ -48,10 +48,10 @@
 
 ; FASTISEL-INSTRREF:      ADD32rr
 ; FASTISEL-INSTRREF-SAME: debug-instr-number 1
-; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 ; FASTISEL-INSTRREF-NEXT: ADD32rr
 ; FASTISEL-INSTRREF-SAME: debug-instr-number 2
-; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF 2, 0
+; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
 
 @glob32 = global i32 0
 @glob16 = global i16 0
@@ -107,9 +107,9 @@
 ;; Don't test the location of these instr-refs, only that the three non-argument
 ;; dbg.values become DBG_INSTR_REFs. We previously checked that these numbers
 ;; get substituted, with appropriate subregister qualifiers.
-; INSTRREF:      DBG_INSTR_REF 2, 0
-; INSTRREF:      DBG_INSTR_REF 4, 0
-; INSTRREF:      DBG_INSTR_REF 6, 0
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)
 
 ;; In fast-isel, we get four DBG_INSTR_REFs (compared to three and one
 ;; DBG_VALUE with normal isel). We get additional substitutions as a result:
@@ -129,10 +129,10 @@
 ; FASTISEL-INSTRREF-NEXT: DBG_PHI $rdi, 2
 ; FASTISEL-INSTRREF-NEXT: DBG_PHI $rdi, 1
 
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 1, 0
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 3, 0
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 6, 0
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 10, 0
+; FASTISEL-INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+; FASTISEL-INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+; FASTISEL-INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)
+; FASTISEL-INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(10, 0)
 
 define i32 @bar(i64 %bar) !dbg !20 {
 entry:
@@ -172,7 +172,7 @@
 ; INSTRREF-NEXT:  - { srcinst: 2, srcop: 0, dstinst: 1, dstop: 6, subreg: 4 }
 
 ; INSTRREF:      CALL64pcrel32 target-flags(x86-plt) @xyzzy, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax, debug-instr-number 1
-; INSTRREF:      DBG_INSTR_REF 2, 0
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
 
 ;; Fast-isel produces the same arrangement, a DBG_INSTR_REF pointing back to
 ;; the call instruction. However: the operand numbers are different (6 for
@@ -186,7 +186,7 @@
 ; FASTISEL-INSTRREF-NEXT:  - { srcinst: 2, srcop: 0, dstinst: 1, dstop: 4, subreg: 4 }
 
 ; FASTISEL-INSTRREF:      CALL64pcrel32 target-flags(x86-plt) @xyzzy, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax, debug-instr-number 1
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 2, 0
+; FASTISEL-INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
 
 declare i64 @xyzzy()
 
@@ -231,17 +231,17 @@
 ; INSTRREF:      DBG_PHI $rdi, 1
 ; INSTRREF-NEXT: DBG_VALUE $rdi, 0, ![[SOCKS]], !DIExpression(),
 ; INSTRREF-NEXT: %0:gr64 = COPY $rdi
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[KNEES]], !DIExpression(DW_OP_deref),
+; INSTRREF-NEXT: DBG_INSTR_REF ![[KNEES]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref), dbg-instr-ref(1, 0),
 
 ; In fast-isel mode, neither variable are hoisted or forwarded to a physreg.
 
 ; FASTISEL-INSTRREF-LABEL: name: qux
 
 ; FASTISEL-INSTRREF:      DBG_PHI $rdi, 1
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 1, 0, ![[SOCKS]], !DIExpression(DW_OP_deref),
+; FASTISEL-INSTRREF:      DBG_INSTR_REF ![[SOCKS]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref), dbg-instr-ref(1, 0),
 
 ; FASTISEL-INSTRREF-LABEL: bb.1.lala:
-; FASTISEL-INSTRREF:      DBG_INSTR_REF 1, 0, ![[KNEES]], !DIExpression(DW_OP_deref),
+; FASTISEL-INSTRREF:      DBG_INSTR_REF ![[KNEES]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref), dbg-instr-ref(1, 0),
 declare i64 @cheddar(i32 *%arg)
 
 define void @qux(i32* noalias sret(i32) %agg.result) !dbg !40 {
diff --git a/llvm/test/DebugInfo/X86/live-debug-values-expr-conflict.ll b/llvm/test/DebugInfo/X86/live-debug-values-expr-conflict.ll
--- a/llvm/test/DebugInfo/X86/live-debug-values-expr-conflict.ll
+++ b/llvm/test/DebugInfo/X86/live-debug-values-expr-conflict.ll
@@ -30,10 +30,12 @@
 ; CHECK-LABEL: bb.2.if.else:
 ; CHECK:       DBG_VALUE {{[0-9a-zA-Z$%_]*}}, $noreg, ![[BAZVAR]], 
 ; CHECK-SAME:     !DIExpression()
-; CHECK:       DBG_VALUE {{[0-9a-zA-Z$%_]*}}, $noreg, ![[BAZVAR]],
-; CHECK-SAME:     !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)
+; CHECK:       DBG_VALUE_LIST ![[BAZVAR]], 
+; CHECK-SAME:     !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 1, DW_OP_stack_value)
+; CHECK-SAME:     {{[0-9a-zA-Z$%_]*}}
 ; CHECK-LABEL: bb.3.if.end:
 ; CHECK-NOT:   DBG_VALUE
+; CHECK-NOT:   DBG_VALUE_LIST
 
 declare void @escape1(i32)
 declare void @escape2(i32)
diff --git a/llvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll b/llvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll
--- a/llvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll
+++ b/llvm/test/DebugInfo/X86/live-debug-vars-loc-limit.ll
@@ -1,4 +1,4 @@
-; RUN: llc --stop-after=virtregrewriter -o - %s | FileCheck %s
+; RUN: llc --stop-after=virtregrewriter -experimental-debug-variable-locations=false -o - %s | FileCheck %s
 
 ; Check that any debug value with 64+ unique machine location operands is set
 ; undef by LiveDebugVariables.
@@ -11,7 +11,7 @@
 ; CHECK: ![[VAR_A:[0-9]+]] = !DILocalVariable(name: "a"
 
 ; CHECK-NOT: DBG_VALUE
-; CHECK: DBG_VALUE_LIST ![[VAR_A]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_stack_value), $noreg
+; CHECK: DBG_VALUE_LIST ![[VAR_A]], !DIExpression(DW_OP_LLVM_arg, 0), $noreg
 ; CHECK-NOT: DBG_VALUE
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/DebugInfo/X86/pieces-4.ll b/llvm/test/DebugInfo/X86/pieces-4.ll
--- a/llvm/test/DebugInfo/X86/pieces-4.ll
+++ b/llvm/test/DebugInfo/X86/pieces-4.ll
@@ -16,7 +16,7 @@
 ; CHECK-LABEL: bitpiece_spill:                         # @bitpiece_spill
 ; CHECK:               callq   g
 ; CHECK:               movl    %eax, [[offs:[0-9]+]](%rsp)          # 4-byte Spill
-; CHECK:               #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offs]], DW_OP_LLVM_fragment 0 32] [$rsp+0]
+; CHECK:               #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offs]], DW_OP_deref, DW_OP_LLVM_fragment 0 32] $rsp
 ; CHECK:               #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_LLVM_fragment 32 32] 0
 ; CHECK:               #APP
 ; CHECK:               #NO_APP
diff --git a/llvm/test/DebugInfo/X86/pr34545.ll b/llvm/test/DebugInfo/X86/pr34545.ll
--- a/llvm/test/DebugInfo/X86/pr34545.ll
+++ b/llvm/test/DebugInfo/X86/pr34545.ll
@@ -9,18 +9,22 @@
 
 ; CHECK:         $eax = MOV32rm
 ; INSTRREF-SAME:      debug-instr-number 1
-; INSTRREF:      DBG_INSTR_REF 1, 0
-; CHECK:         DBG_VALUE $eax
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+; VARLOCS:         DBG_VALUE $eax
+; INSTRREF:        DBG_VALUE_LIST {{.+}} $eax
 ; CHECK:         $eax = SHL32rCL killed renamable $eax,
 ; INSTRREF-SAME:      debug-instr-number 2
-; INSTRREF:      DBG_INSTR_REF 2, 0
-; CHECK:         DBG_VALUE $eax
-; CHECK:         DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+; VARLOCS:       DBG_VALUE $eax
+; INSTRREF:      DBG_VALUE_LIST {{.+}} $eax
+; VARLOCS:       DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
+; INSTRREF:      DBG_VALUE_LIST !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_constu, 4, DW_OP_minus, DW_OP_deref), $rsp
 ; VARLOCS:       DBG_VALUE $eax
 ; CHECK:         $eax = SHL32rCL killed renamable $eax,
 ; INSTRREF-SAME:      debug-instr-number 3
-; INSTRREF:      DBG_INSTR_REF 3, 0
-; CHECK:         DBG_VALUE $eax
+; INSTRREF:      DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+; VARLOCS:       DBG_VALUE $eax
+; INSTRREF:      DBG_VALUE_LIST {{.+}} $eax
 ; CHECK:         RET64 $eax
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/DebugInfo/X86/pr40427.ll b/llvm/test/DebugInfo/X86/pr40427.ll
--- a/llvm/test/DebugInfo/X86/pr40427.ll
+++ b/llvm/test/DebugInfo/X86/pr40427.ll
@@ -30,7 +30,7 @@
 ; CHECK-NEXT: [[LOADR:%[0-9]+]]:gr16 = MOV16rm %0,
 ; INSTRREF-SAME: debug-instr-number 1
 ; DBGVALUE-NEXT: DBG_VALUE [[LOADR]], $noreg, ![[DBGVAR]]
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[DBGVAR]]
+; INSTRREF-NEXT: DBG_INSTR_REF ![[DBGVAR]], {{.+}}, dbg-instr-ref(1, 0)
 ; CHECK-NEXT: %{{[0-9]+}}:gr32 = IMPLICIT_DEF
   %foo = phi i64 *[%bees, %trueb], [%more, %falseb]
   %forks = bitcast i64 *%foo to i32 *
diff --git a/llvm/test/DebugInfo/X86/sdag-combine.ll b/llvm/test/DebugInfo/X86/sdag-combine.ll
--- a/llvm/test/DebugInfo/X86/sdag-combine.ll
+++ b/llvm/test/DebugInfo/X86/sdag-combine.ll
@@ -17,7 +17,7 @@
   %0 = alloca %TSb, align 1
   %1 = call swiftcc i1 @f(), !dbg !7
   ; CHECK: DBG_VALUE $rcx, $noreg, !8, !DIExpression(),
-  ; INSTRREF: DBG_VALUE $ecx, $noreg, !8, !DIExpression(),
+  ; INSTRREF: DBG_VALUE_LIST !8, !DIExpression(DW_OP_LLVM_arg, 0), $ecx
   call void @llvm.dbg.value(metadata i1 %1, metadata !8, metadata !DIExpression()), !dbg !7
   %2 = getelementptr inbounds %TSb, %TSb* %0, i32 0, i32 0, !dbg !7
   store i1 %1, i1* %2, align 1, !dbg !7
diff --git a/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll b/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
--- a/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
+++ b/llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
@@ -73,7 +73,7 @@
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[BAR1]], !DIExpression()
 ; CHECK-NEXT:    [[REG1:%[0-9]+]]:gr64 = LEA64r 
 ; INSTRREF-SAME:    debug-instr-number 1
-; INSTRREF-NEXT:  DBG_INSTR_REF 1, 0, ![[FOO1]], !DIExpression()
+; INSTRREF-NEXT:  DBG_INSTR_REF ![[FOO1]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT:  DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression()
 entry1:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !20, metadata !DIExpression()), !dbg !23
@@ -86,8 +86,8 @@
 ; CHECK-LABEL: bb.0.entry2
 ; CHECK-NEXT:    [[REG2:%[0-9]+]]:gr64 = LEA64r
 ; INSTRREF-SAME:    debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO2]], !DIExpression()
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR2]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO2]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR2]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression
 ; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression
 entry2:
@@ -101,8 +101,8 @@
 ; CHECK-LABEL: bb.0.entry3
 ; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr64 = LEA64r
 ; INSTRREF-SAME:    debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR3]], !DIExpression()
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO3]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR3]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO3]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression()
 ; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression()
 entry3:
@@ -118,7 +118,7 @@
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[FOO4]], !DIExpression()
 ; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr64 = LEA64r
 ; INSTRREF-SAME:    debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR4]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR4]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression()
 entry4:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !42, metadata !DIExpression()), !dbg !44
@@ -134,7 +134,7 @@
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[FOO5]], !DIExpression()
 ; CHECK-NEXT:    [[REG5:%[0-9]+]]:gr64 = LEA64r
 ; INSTRREF-SAME:    debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR5]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR5]], !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression()
 ; CHECK-NOT:     DBG_{{.*}} ![[FOO5]], !DIExpression()
 ; CHECK:         RET
diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
--- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
+++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
@@ -55,7 +55,7 @@
 ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
 ; CHECK:         [[REG1:%[0-9]+]]:gr32 = PHI
 ; INSTRREF-SAME:    debug-instr-number 7
-; INSTRREF-NEXT: DBG_INSTR_REF 7, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG1]]
   %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
@@ -73,9 +73,9 @@
 ; INSTRREF-SAME:   debug-instr-number 4
 ; CHECK-NEXT:   [[REG4:%[0-9]+]]:gr32 = PHI
 ; INSTRREF-SAME:   debug-instr-number 5
-; INSTRREF-NEXT: DBG_INSTR_REF 3, 0
-; INSTRREF-NEXT: DBG_INSTR_REF 4, 0
-; INSTRREF-NEXT: DBG_INSTR_REF 5, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG2]]
 ; DBGVALUE-NEXT: DBG_VALUE [[REG3]]
 ; DBGVALUE-NEXT: DBG_VALUE [[REG4]]
diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
--- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
+++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
@@ -34,7 +34,7 @@
 ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
 ; CHECK:         [[REG1:%[0-9]+]]:gr32 = PHI
 ; INSTRREF-SAME:      debug-instr-number 7
-; INSTRREF-NEXT: DBG_INSTR_REF 7, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG1]]
   %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
@@ -52,27 +52,27 @@
 ; INSTRREF-SAME:    debug-instr-number 3
 ; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr32 = PHI
 ; INSTRREF-SAME:    debug-instr-number 6
-; INSTRREF-NEXT: DBG_INSTR_REF 3, 0, !16
+; INSTRREF-NEXT: DBG_INSTR_REF !16, {{.+}}, dbg-instr-ref(3, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !16
 ; CHECK-NEXT:    DBG_VALUE 555, $noreg, !17
 ; CHECK-NEXT:    [[ADDREG:%[0-9]+]]:gr32 = nuw nsw ADD32rr
 ; INSTRREF-SAME:    debug-instr-number 5
-; INSTRREF-NEXT: DBG_INSTR_REF 4, 0, !17
+; INSTRREF-NEXT: DBG_INSTR_REF !17, {{.+}}, dbg-instr-ref(4, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !17
 ; CHECK:         [[MULREG:%[0-9]+]]:gr32 = LEA64_32r
 ; INSTRREF-SAME:    debug-instr-number 1
 ; CHECK-NEXT:    DBG_VALUE 777, $noreg, !17
 ;;; XXX: The following DBG_INSTR_REF should have stayed below the INC32r
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !16
+; INSTRREF-NEXT: DBG_INSTR_REF !16, {{.+}}, dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[MULREG]], $noreg, !16
 ; CHECK-NEXT:    [[INCREG:%[0-9]+]]:gr32 = nuw nsw INC32r
 ; INSTRREF-SAME:    debug-instr-number 2
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !17
-; INSTRREF-NEXT: DBG_INSTR_REF 5, 0, !15
+; INSTRREF-NEXT: DBG_INSTR_REF !17, {{.+}}, dbg-instr-ref(2, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !15, {{.+}}, dbg-instr-ref(5, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[INCREG]], $noreg, !17
 ; DBGVALUE-NEXT: DBG_VALUE [[ADDREG]], $noreg, !15
 ; CHECK-NEXT:    implicit-def $eflags,
-; INSTRREF-NEXT: DBG_INSTR_REF 6, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG4]]
   %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
--- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
+++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
@@ -76,12 +76,12 @@
 ; INSTRREF-SAME:    debug-instr-number 9
 ; CHECK-NEXT:    [[REG7:%[0-9]+]]:gr32 = PHI
 ; INSTRREF-SAME:    debug-instr-number 10
-; INSTRREF-NEXT: DBG_INSTR_REF 5, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 6, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 7, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 8, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 9, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 10, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF !19, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(5, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !19, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(6, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !18, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(7, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !18, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(8, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !17, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(9, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !17, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(10, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
--- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
+++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
@@ -19,11 +19,11 @@
 ; INSTRREF-SAME:    debug-instr-number 2
 ; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr32 = PHI
 ; INSTRREF-SAME:    debug-instr-number 3
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 3, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
+; INSTRREF-NEXT: DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(1, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(2, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 16), dbg-instr-ref(3, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 10, 32), dbg-instr-ref(1, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 42, 13), dbg-instr-ref(2, 0)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG1]], $noreg,  !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg,  !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 ; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg,  !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
diff --git a/llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll b/llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
--- a/llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
+++ b/llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
@@ -30,7 +30,7 @@
   %2 = mul i32 %0, %arg1, !dbg !26
 ; CHECK: IMUL32rr
   call void @llvm.dbg.value(metadata i32 %1, metadata !16, metadata !DIExpression()), !dbg !27
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE
   br label %exit, !dbg !26
 
diff --git a/llvm/test/DebugInfo/X86/sdag-ir-salvage.ll b/llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
--- a/llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
+++ b/llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
@@ -14,7 +14,7 @@
 ; CHECK-LABEL: bb.0.entry:
 ; INSTRREF:    DBG_PHI $rdi, 1
 ; CHECK-LABEL: bb.1.next:
-; INSTRREF:    DBG_INSTR_REF 1, 0, ![[AAAVAR]]
+; INSTRREF:    DBG_INSTR_REF ![[AAAVAR]], {{.+}}, dbg-instr-ref(1, 0)
 ; DBGVALUE:    DBG_VALUE %{{[0-9]+}}, $noreg, ![[AAAVAR]]
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/DebugInfo/X86/sdag-salvage-add.ll b/llvm/test/DebugInfo/X86/sdag-salvage-add.ll
--- a/llvm/test/DebugInfo/X86/sdag-salvage-add.ll
+++ b/llvm/test/DebugInfo/X86/sdag-salvage-add.ll
@@ -34,13 +34,17 @@
 ; CHECK:         ![[MYVAR:.*]] = !DILocalVariable(name: "myVar", 
 ; CHECK:         $rax = MOV64rm
 ; INSTRREF-SAME: debug-instr-number 2,
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, ![[S4]],
+; INSTRREF-NEXT: DBG_INSTR_REF ![[S4]],
 ; DBGVALUE-NEXT: DBG_VALUE $rax, $noreg, ![[MYVAR]],
-; CHECK-SAME:       !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; DBGVALUE-SAME:       !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; INSTRREF-SAME:       !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; INSTRREF-SAME: dbg-instr-ref(2, 0)
 
-; INSTRREF:      DBG_INSTR_REF 2, 0, ![[MYVAR]],
+; INSTRREF:      DBG_INSTR_REF ![[MYVAR]],
 ; DBGVALUE:      DBG_VALUE $rax, $noreg, ![[S4]],
-; CHECK-SAME:           !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; DBGVALUE-SAME:           !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; INSTRREF-SAME:           !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; INSTRREF-SAME: dbg-instr-ref(2, 0)
 ; CHECK-NEXT: $rdi = MOV64rm killed renamable $rax, 1, $noreg, 4096, $noreg,
 
 source_filename = "test.c"
diff --git a/llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll b/llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
--- a/llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
+++ b/llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
@@ -24,7 +24,7 @@
 ; CHECK-LABEL: bb.0.entry:
 ; CHECK:         %[[REG:[0-9]+]]:gr32 = ADD32ri %1, 512,
 ; INSTRREF-SAME:   debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
 ; DBGVALUE-NEXT: DBG_VALUE %[[REG]]
 
 ; Function Attrs: nofree norecurse nounwind uwtable writeonly
diff --git a/llvm/test/DebugInfo/X86/sdagsplit-1.ll b/llvm/test/DebugInfo/X86/sdagsplit-1.ll
--- a/llvm/test/DebugInfo/X86/sdagsplit-1.ll
+++ b/llvm/test/DebugInfo/X86/sdagsplit-1.ll
@@ -13,8 +13,8 @@
 ;      return 0;
 ;    }
 ;
-; CHECK-DAG: DBG_VALUE ${{[a-z]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location
-; CHECK-DAG: DBG_VALUE ${{[a-z]+}}, $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location
+; CHECK-DAG: DBG_VALUE_LIST !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 0, 32), ${{[a-z]+}}, debug-location
+; CHECK-DAG: DBG_VALUE_LIST !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 32, 32), ${{[a-z]+}}, debug-location
 
 ; ModuleID = 'sdagsplit-1.c'
 target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
diff --git a/llvm/test/DebugInfo/X86/spill-nospill.ll b/llvm/test/DebugInfo/X86/spill-nospill.ll
--- a/llvm/test/DebugInfo/X86/spill-nospill.ll
+++ b/llvm/test/DebugInfo/X86/spill-nospill.ll
@@ -24,7 +24,7 @@
 ; CHECK-LABEL: f: # @f
 ; CHECK: callq   g
 ; CHECK: movl    %eax, [[X_OFFS:[0-9]+]](%rsp)          # 4-byte Spill
-; CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[X_OFFS]]] [$rsp+0]
+; CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[X_OFFS]], DW_OP_deref] $rsp
 ; CHECK: #APP
 ; CHECK: #NO_APP
 ; CHECK: callq   g