diff --git a/llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll b/llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll
--- a/llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll
@@ -109,4 +109,57 @@
   ret void
 }
 
+; Error pattern will be fixed in https://reviews.llvm.org/D133466
+; CHECK-LABEL: name: virtualCall
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v31'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v30'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v29'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v28'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v27'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v26'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v25'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v24'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v23'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v22'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v21'
+; CHECK: spill-slot
+; CHECK-NEXT: callee-saved-register: '$v20'
+
+; CHECK-VEXT-LABEL: name: virtualCall
+; CHECK-VEXT-NOT: spill-slot
+; CHECK-VEXT-NOT: callee-saved-register: '$v31'
+; CHECK-VEXT-NOT: callee-saved-register: '$v30'
+; CHECK-VEXT-NOT: callee-saved-register: '$v29'
+; CHECK-VEXT-NOT: callee-saved-register: '$v28'
+; CHECK-VEXT-NOT: callee-saved-register: '$v27'
+; CHECK-VEXT-NOT: callee-saved-register: '$v26'
+; CHECK-VEXT-NOT: callee-saved-register: '$v25'
+; CHECK-VEXT-NOT: callee-saved-register: '$v24'
+; CHECK-VEXT-NOT: callee-saved-register: '$v23'
+; CHECK-VEXT-NOT: callee-saved-register: '$v22'
+; CHECK-VEXT-NOT: callee-saved-register: '$v21'
+; CHECK-VEXT-NOT: callee-saved-register: '$v20'
+define dso_local noundef signext i32 @virtualCall(ptr noundef %b) #0 {
+entry:
+  %b.addr = alloca ptr, align 8
+  store ptr %b, ptr %b.addr, align 8
+  %0 = load ptr, ptr %b.addr, align 8
+  %vtable = load ptr, ptr %0, align 8
+  %vfn = getelementptr inbounds ptr, ptr %vtable, i64 0
+  %1 = load ptr, ptr %vfn, align 8
+  %call = call noundef signext i32 %1(ptr noundef nonnull align 8 dereferenceable(8) %0)
+  ret i32 %call
+}
+
 declare void @bar(i32)