diff --git a/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp b/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp --- a/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp @@ -52,8 +52,8 @@ #include "mlir/Dialect/LLVMIR/LLVMConversionEnumsToLLVM.inc" /// Translates the given data layout spec attribute to the LLVM IR data layout. -/// Only integer, float and endianness entries are currently supported. -FailureOr +/// Only integer, float, pointer and endianness entries are currently supported. +static FailureOr translateDataLayout(DataLayoutSpecInterface attribute, const DataLayout &dataLayout, Optional loc = llvm::None) { @@ -102,6 +102,9 @@ }) .Case([](Type) { return std::string("f"); }) + .Case([](LLVMPointerType ptrType) { + return llvm::formatv("p{0}:", ptrType.getAddressSpace()).str(); + }) .Default([loc](Type type) -> FailureOr { emitError(*loc) << "unsupported type in data layout: " << type; return failure(); diff --git a/mlir/test/Target/LLVMIR/data-layout.mlir b/mlir/test/Target/LLVMIR/data-layout.mlir --- a/mlir/test/Target/LLVMIR/data-layout.mlir +++ b/mlir/test/Target/LLVMIR/data-layout.mlir @@ -4,11 +4,15 @@ // CHECK: E- // CHECK: i64:64:128 // CHECK: f80:128:256 +// CHECK: p0:32:64:128 +// CHECK: p256:256:256 module attributes {dlti.dl_spec = #dlti.dl_spec< #dlti.dl_entry<"dlti.endianness", "big">, #dlti.dl_entry, #dlti.dl_entry : vector<2xi32>>, -#dlti.dl_entry : vector<2xi32>> +#dlti.dl_entry : vector<2xi32>>, +#dlti.dl_entry : vector<3xi32>>, +#dlti.dl_entry, dense<[256,256,256]> : vector<3xi32>> >} { llvm.func @foo() { llvm.return