Index: include/polly/ScopInfo.h =================================================================== --- include/polly/ScopInfo.h +++ include/polly/ScopInfo.h @@ -473,8 +473,6 @@ /// @brief Is this MemoryAccess modeling special PHI node accesses? bool isPHI() const { return Origin == PHI; } - void setStatement(ScopStmt *Stmt) { this->Statement = Stmt; } - __isl_give isl_basic_map *createBasicAccessMap(ScopStmt *Statement); void assumeNoOutOfBound(); @@ -535,6 +533,7 @@ public: /// @brief Create a new MemoryAccess. /// + /// @param Stmt The parent statement. /// @param AccessInst The instruction doing the access. /// @param Id Identifier that is guranteed to be unique within the /// same ScopStmt. @@ -546,10 +545,11 @@ /// @param Subscripts Subscipt expressions /// @param Sizes Dimension lengths of the accessed array. /// @param BaseName Name of the acessed array. - MemoryAccess(Instruction *AccessInst, __isl_take isl_id *Id, AccessType Type, - Value *BaseAddress, unsigned ElemBytes, bool Affine, - ArrayRef Subscripts, ArrayRef Sizes, - Value *AccessValue, AccessOrigin Origin, StringRef BaseName); + MemoryAccess(ScopStmt *Stmt, Instruction *AccessInst, __isl_take isl_id *Id, + AccessType Type, Value *BaseAddress, unsigned ElemBytes, + bool Affine, ArrayRef Subscripts, + ArrayRef Sizes, Value *AccessValue, + AccessOrigin Origin, StringRef BaseName); ~MemoryAccess(); /// @brief Get the type of a memory access. @@ -721,6 +721,9 @@ /// Create an overapproximating ScopStmt for the region @p R. ScopStmt(Scop &parent, Region &R); + /// Initialize members after all MemoryAccesses have been added. + void init(); + private: /// Polyhedral description //@{ @@ -789,14 +792,8 @@ /// @brief Fill NestLoops with loops surrounding this statement. void collectSurroundingLoops(); - /// @brief Create the accesses for instructions in @p Block. - /// - /// @param Block The basic block for which accesses should be - /// created. - /// @param isApproximated Flag to indicate blocks that might not be executed, - /// hence for which write accesses need to be modeled as - /// may-write accesses. - void buildAccesses(BasicBlock *Block, bool isApproximated = false); + /// @brief Build the access relation of all memory accesses. + void buildAccessRelations(); /// @brief Detect and mark reductions in the ScopStmt void checkForReductions(); @@ -925,6 +922,9 @@ BB = Block; } + /// @brief Add @p Access to this statement's list of accesses. + void addAccess(MemoryAccess *Access); + /// @brief Move the memory access in @p InvMAs to @p TargetList. /// /// Note that scalar accesses that are caused by any access in @p InvMAs will @@ -1208,8 +1208,10 @@ /// @brief Simplify the SCoP representation /// /// At the moment we perform the following simplifications: - /// - removal of empty statements (due to invariant load hoisting) - void simplifySCoP(); + /// - removal of no-op statements + /// @param RemoveIgnoredStmts If true, also removed ignored statments. + /// @see isIgnored() + void simplifySCoP(bool RemoveIgnoredStmts); /// @brief Hoist all invariant memory loads. void hoistInvariantLoads(); @@ -1592,6 +1594,13 @@ Scop *scop; isl_ctx *ctx; + /// @brief Return the SCoP region that is currently processed. + Region *getRegion() const { + if (!scop) + return nullptr; + return &scop->getRegion(); + } + // Clear the context. void clear(); @@ -1634,6 +1643,12 @@ /// @param SR A subregion of @p R. void buildAccessFunctions(Region &R, Region &SR); + /// @brief Create ScopStmt for all BBs and non-affine subregions of @p SR. + /// + /// Some of the statments might be optimized away later when they do not + /// access any memory and thus have no effect. + void buildStmts(Region &SR); + /// @brief Build the access functions for the basic block @p BB /// /// @param R The SCoP region. Index: lib/Analysis/ScopInfo.cpp =================================================================== --- lib/Analysis/ScopInfo.cpp +++ lib/Analysis/ScopInfo.cpp @@ -645,16 +645,16 @@ isl_space_free(Space); } -MemoryAccess::MemoryAccess(Instruction *AccessInst, __isl_take isl_id *Id, - AccessType Type, Value *BaseAddress, - unsigned ElemBytes, bool Affine, +MemoryAccess::MemoryAccess(ScopStmt *Stmt, Instruction *AccessInst, + __isl_take isl_id *Id, AccessType Type, + Value *BaseAddress, unsigned ElemBytes, bool Affine, ArrayRef Subscripts, ArrayRef Sizes, Value *AccessValue, AccessOrigin Origin, StringRef BaseName) - : Id(Id), Origin(Origin), AccType(Type), RedType(RT_NONE), - Statement(nullptr), BaseAddr(BaseAddress), BaseName(BaseName), - ElemBytes(ElemBytes), Sizes(Sizes.begin(), Sizes.end()), - AccessInstruction(AccessInst), AccessValue(AccessValue), IsAffine(Affine), + : Id(Id), Origin(Origin), AccType(Type), RedType(RT_NONE), Statement(Stmt), + BaseAddr(BaseAddress), BaseName(BaseName), ElemBytes(ElemBytes), + Sizes(Sizes.begin(), Sizes.end()), AccessInstruction(AccessInst), + AccessValue(AccessValue), IsAffine(Affine), Subscripts(Subscripts.begin(), Subscripts.end()), AccessRelation(nullptr), NewAccessRelation(nullptr) {} @@ -820,31 +820,27 @@ Domain = NewDomain; } -void ScopStmt::buildAccesses(BasicBlock *Block, bool isApproximated) { - AccFuncSetType *AFS = Parent.getAccessFunctions(Block); - if (!AFS) - return; - - for (auto &Access : *AFS) { - Instruction *AccessInst = Access.getAccessInstruction(); - Type *ElementType = Access.getAccessValue()->getType(); +void ScopStmt::buildAccessRelations() { + for (MemoryAccess *Access : MemAccs) { + Type *ElementType = Access->getAccessValue()->getType(); const ScopArrayInfo *SAI = getParent()->getOrCreateScopArrayInfo( - Access.getBaseAddr(), ElementType, Access.Sizes, Access.isPHI()); + Access->getBaseAddr(), ElementType, Access->Sizes, Access->isPHI()); - if (isApproximated && Access.isMustWrite()) - Access.AccType = MemoryAccess::MAY_WRITE; - - MemoryAccessList *&MAL = InstructionToAccess[AccessInst]; - if (!MAL) - MAL = new MemoryAccessList(); - Access.setStatement(this); - Access.buildAccessRelation(SAI); - MAL->emplace_front(&Access); - MemAccs.push_back(MAL->front()); + Access->buildAccessRelation(SAI); } } +void ScopStmt::addAccess(MemoryAccess *Access) { + Instruction *AccessInst = Access->getAccessInstruction(); + + MemoryAccessList *&MAL = InstructionToAccess[AccessInst]; + if (!MAL) + MAL = new MemoryAccessList(); + MAL->emplace_front(Access); + MemAccs.push_back(MAL->front()); +} + void ScopStmt::realignParams() { for (MemoryAccess *MA : *this) MA->realignParams(); @@ -1134,31 +1130,32 @@ } ScopStmt::ScopStmt(Scop &parent, Region &R) - : Parent(parent), BB(nullptr), R(&R), Build(nullptr) { + : Parent(parent), Domain(nullptr), BB(nullptr), R(&R), Build(nullptr) { BaseName = getIslCompatibleName("Stmt_", R.getNameStr(), ""); - - buildDomain(); - collectSurroundingLoops(); - - BasicBlock *EntryBB = R.getEntry(); - for (BasicBlock *Block : R.blocks()) { - buildAccesses(Block, Block != EntryBB); - deriveAssumptions(Block); - } - if (DetectReductions) - checkForReductions(); } ScopStmt::ScopStmt(Scop &parent, BasicBlock &bb) - : Parent(parent), BB(&bb), R(nullptr), Build(nullptr) { + : Parent(parent), Domain(nullptr), BB(&bb), R(nullptr), Build(nullptr) { BaseName = getIslCompatibleName("Stmt_", &bb, ""); +} + +void ScopStmt::init() { + assert(!Domain && "init must be called only once"); buildDomain(); collectSurroundingLoops(); - buildAccesses(BB); - deriveAssumptions(BB); + buildAccessRelations(); + + if (BB) { + deriveAssumptions(BB); + } else { + for (BasicBlock *Block : R->blocks()) { + deriveAssumptions(Block); + } + } + if (DetectReductions) checkForReductions(); } @@ -2311,12 +2308,20 @@ BoundaryContext(nullptr) {} void Scop::init(LoopInfo &LI, ScopDetection &SD, AliasAnalysis &AA) { - buildContext(); + // Remove statments without accesses. + simplifySCoP(false); + buildContext(); buildDomains(&R, LI, SD, DT); - DenseMap> LoopSchedules; + // Remove ignored statements. + simplifySCoP(true); + + // The ScopStmts now have enough information to initialize themselves. + for (ScopStmt &Stmt : Stmts) + Stmt.init(); + DenseMap> LoopSchedules; Loop *L = getLoopSurroundingRegion(R, LI); LoopSchedules[L]; buildSchedule(&R, LI, SD, LoopSchedules); @@ -2331,7 +2336,7 @@ buildAliasChecks(AA); hoistInvariantLoads(); - simplifySCoP(); + simplifySCoP(false); } Scop::~Scop() { @@ -2365,23 +2370,26 @@ Access->updateDimensionality(); } -void Scop::simplifySCoP() { - +void Scop::simplifySCoP(bool RemoveIgnoredStmts) { for (auto StmtIt = Stmts.begin(), StmtEnd = Stmts.end(); StmtIt != StmtEnd;) { ScopStmt &Stmt = *StmtIt; + RegionNode *RN = Stmt.isRegionStmt() + ? Stmt.getRegion()->getNode() + : getRegion().getBBNode(Stmt.getBasicBlock()); + + if (StmtIt->isEmpty() || (RemoveIgnoredStmts && isIgnored(RN))) { + // Remove the statement because it is unnecessary. + if (Stmt.isRegionStmt()) + for (BasicBlock *BB : Stmt.getRegion()->blocks()) + StmtMap.erase(BB); + else + StmtMap.erase(Stmt.getBasicBlock()); - if (!StmtIt->isEmpty()) { - StmtIt++; + StmtIt = Stmts.erase(StmtIt); continue; } - if (Stmt.isRegionStmt()) - for (BasicBlock *BB : Stmt.getRegion()->blocks()) - StmtMap.erase(BB); - else - StmtMap.erase(Stmt.getBasicBlock()); - - StmtIt = Stmts.erase(StmtIt); + StmtIt++; } } @@ -2876,11 +2884,20 @@ DenseMap> &LoopSchedules) { if (SD.isNonAffineSubRegion(R, &getRegion())) { - auto *Stmt = addScopStmt(nullptr, R); - auto *UDomain = isl_union_set_from_set(Stmt->getDomain()); - auto *StmtSchedule = isl_schedule_from_domain(UDomain); Loop *L = getLoopSurroundingRegion(*R, LI); auto &LSchedulePair = LoopSchedules[L]; + ScopStmt *Stmt = getStmtForBasicBlock(R->getEntry()); + isl_set *Domain; + if (Stmt) { + Domain = Stmt->getDomain(); + } else { + // This case happens when the SCoP consists of only one non-affine region + // which doesn't contain any accesses and has hence been optimized away. + // We use a dummy domain for this case. + Domain = isl_set_empty(isl_space_set_alloc(IslCtx, 0, 0)); + } + auto *UDomain = isl_union_set_from_set(Domain); + auto *StmtSchedule = isl_schedule_from_domain(UDomain); LSchedulePair.first = StmtSchedule; return; } @@ -2901,14 +2918,9 @@ auto &LSchedulePair = LoopSchedules[L]; LSchedulePair.second += getNumBlocksInRegionNode(RN); - if (!isIgnored(RN)) { - - ScopStmt *Stmt; - if (RN->isSubRegion()) - Stmt = addScopStmt(nullptr, RN->getNodeAs()); - else - Stmt = addScopStmt(RN->getNodeAs(), nullptr); - + BasicBlock *BB = getRegionNodeBasicBlock(RN); + ScopStmt *Stmt = getStmtForBasicBlock(BB); + if (Stmt) { auto *UDomain = isl_union_set_from_set(Stmt->getDomain()); auto *StmtSchedule = isl_schedule_from_domain(UDomain); LSchedulePair.first = @@ -3197,6 +3209,21 @@ buildAccessFunctions(R, *I->getNodeAs()); } +void ScopInfo::buildStmts(Region &SR) { + Region *R = getRegion(); + + if (SD->isNonAffineSubRegion(&SR, R)) { + scop->addScopStmt(nullptr, &SR); + return; + } + + for (auto I = SR.element_begin(), E = SR.element_end(); I != E; ++I) + if (I->isSubRegion()) + buildStmts(*I->getNodeAs()); + else + scop->addScopStmt(I->getNodeAs(), nullptr); +} + void ScopInfo::buildAccessFunctions(Region &R, BasicBlock &BB, Region *NonAffineSubRegion, bool IsExitBlock) { @@ -3236,6 +3263,13 @@ ArrayRef Subscripts, ArrayRef Sizes, MemoryAccess::AccessOrigin Origin) { + ScopStmt *Stmt = scop->getStmtForBasicBlock(BB); + + // Do not create a memory access for anything not in the SCoP. It would be + // ignored anyway. + if (!Stmt) + return; + AccFuncSetType &AccList = AccFuncMap[BB]; size_t Identifier = AccList.size(); @@ -3245,8 +3279,14 @@ std::string IdName = "__polly_array_ref_" + std::to_string(Identifier); isl_id *Id = isl_id_alloc(ctx, IdName.c_str(), nullptr); - AccList.emplace_back(Inst, Id, Type, BaseAddress, ElemBytes, Affine, + bool isApproximated = + Stmt->isRegionStmt() && (Stmt->getRegion()->getEntry() != BB); + if (isApproximated && Type == MemoryAccess::MUST_WRITE) + Type = MemoryAccess::MAY_WRITE; + + AccList.emplace_back(Stmt, Inst, Id, Type, BaseAddress, ElemBytes, Affine, Subscripts, Sizes, AccessValue, Origin, BaseName); + Stmt->addAccess(&AccList.back()); } void ScopInfo::addExplicitAccess( @@ -3293,6 +3333,7 @@ unsigned MaxLoopDepth = getMaxLoopDepthInRegion(R, *LI, *SD); scop = new Scop(R, AccFuncMap, *SE, DT, ctx, MaxLoopDepth); + buildStmts(R); buildAccessFunctions(R, R); // In case the region does not have an exiting block we will later (during Index: test/ScopInfo/NonAffine/non_affine_loop_used_later.ll =================================================================== --- test/ScopInfo/NonAffine/non_affine_loop_used_later.ll +++ test/ScopInfo/NonAffine/non_affine_loop_used_later.ll @@ -27,10 +27,6 @@ ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> [i0, 1] }; ; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; -; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] }; ; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] @@ -39,6 +35,10 @@ ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_smax[] }; ; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] }; +; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] }; +; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] }; ; CHECK: Stmt_bb18 ; CHECK: Schedule := ; CHECK: [N] -> { Stmt_bb18[i0] -> [i0, 2] }; Index: test/ScopInfo/cond_constant_in_loop.ll =================================================================== --- test/ScopInfo/cond_constant_in_loop.ll +++ test/ScopInfo/cond_constant_in_loop.ll @@ -43,9 +43,9 @@ ret void } -; CHECK: Stmt_bb2 -; CHECK: Domain := -; CHECK: [M, N] -> { Stmt_bb2[i0] : 1 = 0 }; ; CHECK: Stmt_bb1 ; CHECK: Domain := ; CHECK: [M, N] -> { Stmt_bb1[i0] : i0 >= 0 and i0 <= -1 + M }; +; CHECK: Stmt_bb2 +; CHECK: Domain := +; CHECK: [M, N] -> { Stmt_bb2[i0] : 1 = 0 }; Index: test/ScopInfo/non_affine_region_1.ll =================================================================== --- test/ScopInfo/non_affine_region_1.ll +++ test/ScopInfo/non_affine_region_1.ll @@ -19,15 +19,15 @@ ; } ; ; CHECK: Region: %bb1---%bb21 -; CHECK: Stmt_bb8 +; CHECK: Stmt_bb3 ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] }; +; CHECK: [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] }; ; CHECK: Stmt_bb7 ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: [b] -> { Stmt_bb7[i0] -> MemRef_x_1__phi[] }; -; CHECK: Stmt_bb3 +; CHECK: Stmt_bb8 ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] }; +; CHECK: [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] }; ; CHECK: Stmt_bb10__TO__bb18 ; CHECK-NEXT: Domain := ; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] : Index: test/ScopInfo/non_affine_region_2.ll =================================================================== --- test/ScopInfo/non_affine_region_2.ll +++ test/ScopInfo/non_affine_region_2.ll @@ -35,11 +35,11 @@ ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; -; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; Index: test/ScopInfo/non_affine_region_3.ll =================================================================== --- test/ScopInfo/non_affine_region_3.ll +++ test/ScopInfo/non_affine_region_3.ll @@ -31,14 +31,14 @@ ; CHECK: { Stmt_bb3__TO__bb18[i0] -> [i0, 0] }; ; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; +; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK: Stmt_bb18 ; CHECK: Domain := ; CHECK: { Stmt_bb18[i0] : Index: test/ScopInfo/non_affine_region_4.ll =================================================================== --- test/ScopInfo/non_affine_region_4.ll +++ test/ScopInfo/non_affine_region_4.ll @@ -39,10 +39,10 @@ ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_A[i0] }; ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_x[] }; -; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] }; ; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] }; +; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] +; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] }; ; CHECK: Stmt_bb7 ; CHECK: Domain := ; CHECK: { Stmt_bb7[i0] : Index: test/ScopInfo/phi_condition_modeling_1.ll =================================================================== --- test/ScopInfo/phi_condition_modeling_1.ll +++ test/ScopInfo/phi_condition_modeling_1.ll @@ -12,15 +12,15 @@ ; } ; ; CHECK: Statements { -; CHECK-LABEL: Stmt_bb7 +; CHECK-LABEL: Stmt_bb6 ; CHECK-NOT: Access ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] }; +; CHECK: [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NOT: Access -; CHECK-LABEL: Stmt_bb6 +; CHECK-LABEL: Stmt_bb7 ; CHECK-NOT: Access ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] }; +; CHECK: [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NOT: Access ; CHECK-LABEL: Stmt_bb8 ; CHECK-NOT: Access Index: test/ScopInfo/phi_condition_modeling_2.ll =================================================================== --- test/ScopInfo/phi_condition_modeling_2.ll +++ test/ScopInfo/phi_condition_modeling_2.ll @@ -12,15 +12,15 @@ ; } ; ; CHECK: Statements { -; CHECK-LABEL: Stmt_bb7 +; CHECK-LABEL: Stmt_bb6 ; CHECK-NOT: Access ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] }; +; CHECK: [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NOT: Access -; CHECK-LABEL: Stmt_bb6 +; CHECK-LABEL: Stmt_bb7 ; CHECK-NOT: Access ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] }; +; CHECK: [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NOT: Access ; CHECK-LABEL: Stmt_bb8 ; CHECK-NOT: Access Index: test/ScopInfo/phi_conditional_simple_1.ll =================================================================== --- test/ScopInfo/phi_conditional_simple_1.ll +++ test/ScopInfo/phi_conditional_simple_1.ll @@ -10,15 +10,15 @@ ; } ; ; CHECK: Statements { -; CHECK-LABEL: Stmt_if_then +; CHECK-LABEL: Stmt_if_else ; CHECK-NOT: Access ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [c] -> { Stmt_if_then[i0] -> MemRef_phi__phi[] }; +; CHECK: [c] -> { Stmt_if_else[i0] -> MemRef_phi__phi[] }; ; CHECK-NOT: Access -; CHECK-LABEL: Stmt_if_else +; CHECK-LABEL: Stmt_if_then ; CHECK-NOT: Access ; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] -; CHECK: [c] -> { Stmt_if_else[i0] -> MemRef_phi__phi[] }; +; CHECK: [c] -> { Stmt_if_then[i0] -> MemRef_phi__phi[] }; ; CHECK-NOT: Access ; CHECK-LABEL: Stmt_if_end ; CHECK-NOT: Access Index: test/ScopInfo/switch-1.ll =================================================================== --- test/ScopInfo/switch-1.ll +++ test/ScopInfo/switch-1.ll @@ -19,21 +19,21 @@ ; } ; ; CHECK: Statements { -; CHECK: Stmt_sw_bb_6 +; CHECK: Stmt_sw_bb_1 ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_6[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) }; +; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) }; ; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_6[i0] -> [i0, 0] }; +; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] }; ; CHECK: Stmt_sw_bb_2 ; CHECK: Domain := ; CHECK: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; ; CHECK: Schedule := ; CHECK: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 1] }; -; CHECK: Stmt_sw_bb_1 +; CHECK: Stmt_sw_bb_6 ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) }; +; CHECK: [N] -> { Stmt_sw_bb_6[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) }; ; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] }; +; CHECK: [N] -> { Stmt_sw_bb_6[i0] -> [i0, 0] }; ; CHECK: } ; ; Index: test/ScopInfo/switch-2.ll =================================================================== --- test/ScopInfo/switch-2.ll +++ test/ScopInfo/switch-2.ll @@ -19,18 +19,18 @@ ; ; CHECK: Statements { ; CHECK-NOT: Stmt_sw_bb1 -; CHECK: Stmt_sw_bb_2 -; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; -; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 0] }; -; CHECK-NOT: Stmt_sw_bb1 ; CHECK: Stmt_sw_bb ; CHECK: Domain := ; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; ; CHECK: Schedule := ; CHECK: [N] -> { Stmt_sw_bb[i0] -> [i0, 1] }; ; CHECK-NOT: Stmt_sw_bb1 +; CHECK: Stmt_sw_bb_2 +; CHECK: Domain := +; CHECK: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; +; CHECK: Schedule := +; CHECK: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 0] }; +; CHECK-NOT: Stmt_sw_bb1 ; CHECK: } ; ; AST: if (1) Index: test/ScopInfo/switch-3.ll =================================================================== --- test/ScopInfo/switch-3.ll +++ test/ScopInfo/switch-3.ll @@ -18,16 +18,6 @@ ; } ; ; CHECK: Statements { -; CHECK: Stmt_sw_bb_5 -; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; -; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 0] }; -; CHECK: Stmt_sw_bb_9 -; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -3 + i0 and 4e0 <= -2 + i0) }; -; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 1] }; ; CHECK: Stmt_sw_bb ; CHECK: Domain := ; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; @@ -38,6 +28,16 @@ ; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((2 + i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -1 + i0 and 4e0 <= i0) }; ; CHECK: Schedule := ; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 3] }; +; CHECK: Stmt_sw_bb_5 +; CHECK: Domain := +; CHECK: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; +; CHECK: Schedule := +; CHECK: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 0] }; +; CHECK: Stmt_sw_bb_9 +; CHECK: Domain := +; CHECK: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -3 + i0 and 4e0 <= -2 + i0) }; +; CHECK: Schedule := +; CHECK: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 1] }; ; CHECK: } ; ; AST: if (1) Index: test/ScopInfo/switch-4.ll =================================================================== --- test/ScopInfo/switch-4.ll +++ test/ScopInfo/switch-4.ll @@ -22,29 +22,29 @@ ; } ; ; CHECK: Statements { -; CHECK: Stmt_sw_bb_9 +; CHECK: Stmt_sw_default ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) }; -; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 0] }; -; CHECK: Stmt_sw_bb_5 +; CHECK: [N] -> { Stmt_sw_default[i0] : 1 = 0 }; +; CHECK: Stmt_sw_bb ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; +; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; ; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] }; +; CHECK: [N] -> { Stmt_sw_bb[i0] -> [i0, 3] }; ; CHECK: Stmt_sw_bb_1 ; CHECK: Domain := ; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) }; ; CHECK: Schedule := ; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] }; -; CHECK: Stmt_sw_bb +; CHECK: Stmt_sw_bb_5 ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; +; CHECK: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; ; CHECK: Schedule := -; CHECK: [N] -> { Stmt_sw_bb[i0] -> [i0, 3] }; -; CHECK: Stmt_sw_default +; CHECK: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] }; +; CHECK: Stmt_sw_bb_9 ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_default[i0] : 1 = 0 }; +; CHECK: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) }; +; CHECK: Schedule := +; CHECK: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 0] }; ; CHECK: } ; ; AST: if (1) Index: test/ScopInfo/switch-6.ll =================================================================== --- test/ScopInfo/switch-6.ll +++ test/ScopInfo/switch-6.ll @@ -22,18 +22,18 @@ ; } ; ; CHECK: Statements { -; CHECK: Stmt_sw_bb_9 -; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_9[3] : N >= 4 }; -; CHECK: Stmt_sw_bb_5 +; CHECK: Stmt_sw_bb ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb_5[2] : N >= 3 }; +; CHECK: [N] -> { Stmt_sw_bb[0] : N >= 1 }; ; CHECK: Stmt_sw_bb_1 ; CHECK: Domain := ; CHECK: [N] -> { Stmt_sw_bb_1[1] : N >= 2 }; -; CHECK: Stmt_sw_bb +; CHECK: Stmt_sw_bb_5 ; CHECK: Domain := -; CHECK: [N] -> { Stmt_sw_bb[0] : N >= 1 }; +; CHECK: [N] -> { Stmt_sw_bb_5[2] : N >= 3 }; +; CHECK: Stmt_sw_bb_9 +; CHECK: Domain := +; CHECK: [N] -> { Stmt_sw_bb_9[3] : N >= 4 }; ; CHECK: } ; ; AST: if (1) Index: test/ScopInfo/switch-7.ll =================================================================== --- test/ScopInfo/switch-7.ll +++ test/ScopInfo/switch-7.ll @@ -1,3 +1,4 @@ + ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-ast -analyze < %s | FileCheck %s --check-prefix=AST ; @@ -17,16 +18,16 @@ ; } ; ; CHECK: Statements { -; CHECK: Stmt_for_body_7 -; CHECK: Domain := -; CHECK: [c, N] -> { Stmt_for_body_7[i0] : c = 1 and i0 >= 0 and i0 <= -1 + N }; -; CHECK: Schedule := -; CHECK: [c, N] -> { Stmt_for_body_7[i0] -> [0, i0] }; ; CHECK: Stmt_for_body ; CHECK: Domain := ; CHECK: [c, N] -> { Stmt_for_body[i0] : c = -1 and i0 >= 0 and i0 <= -1 + N }; ; CHECK: Schedule := ; CHECK: [c, N] -> { Stmt_for_body[i0] -> [1, i0] }; +; CHECK: Stmt_for_body_7 +; CHECK: Domain := +; CHECK: [c, N] -> { Stmt_for_body_7[i0] : c = 1 and i0 >= 0 and i0 <= -1 + N }; +; CHECK: Schedule := +; CHECK: [c, N] -> { Stmt_for_body_7[i0] -> [0, i0] }; ; CHECK: } ; ; AST: if (1)