Index: llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
+++ llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
@@ -50,7 +50,13 @@
 };
 
 /// This implementation is used for AArch64 COFF targets.
-class AArch64_COFFTargetObjectFile : public TargetLoweringObjectFileCOFF {};
+class AArch64_COFFTargetObjectFile : public TargetLoweringObjectFileCOFF {
+public:
+  AArch64_COFFTargetObjectFile() {}
+
+  MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
+                                    const TargetMachine &TM) const override;
+};
 
 } // end namespace llvm
 
Index: llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
@@ -8,12 +8,16 @@
 
 #include "AArch64TargetObjectFile.h"
 #include "AArch64TargetMachine.h"
+#include "llvm/BinaryFormat/COFF.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/IR/Mangler.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCObjectFileInfo.h"
+#include "llvm/MC/MCSectionCOFF.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCValue.h"
+
 using namespace llvm;
 using namespace dwarf;
 
@@ -78,3 +82,20 @@
   // be accessed via at least a linker-private symbol.
   getMangler().getNameWithPrefix(OutName, GV, /* CannotUsePrivateLabel */ true);
 }
+
+MCSection *AArch64_COFFTargetObjectFile::SelectSectionForGlobal(
+    const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
+  if (TM.getTargetTriple().isWindowsArm64EC()) {
+    if (const auto *F = dyn_cast<Function>(GO)) {
+      if (F->hasFnAttribute("arm64ec-thunk-type") && F->hasComdat()) {
+        unsigned Flags =
+            (COFF::IMAGE_SCN_MEM_EXECUTE | COFF::IMAGE_SCN_MEM_READ |
+             COFF::IMAGE_SCN_CNT_CODE | COFF::IMAGE_SCN_LNK_COMDAT);
+
+        return getContext().getCOFFSection(".wowthk", Flags, Kind, F->getName(),
+                                           COFF::IMAGE_COMDAT_SELECT_ANY);
+      }
+    }
+  }
+  return TargetLoweringObjectFileCOFF::SelectSectionForGlobal(GO, Kind, TM);
+}
Index: llvm/test/CodeGen/AArch64/arm64ec-cfg.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-cfg.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-cfg.ll
@@ -218,8 +218,8 @@
 ; CHECK-NEXT:    .seh_save_reg x30, 16
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$varargs.1)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$varargs.1)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$varargs)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$varargs)
 ; CHECK-NEXT:    mov x11, x0
 ; CHECK-NEXT:    ldr x8, [x8, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -313,7 +313,7 @@
 ; CHECK-NEXT:    .seh_add_fp 48
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, __os_arm64x_dispatch_call_no_redirect
-; CHECK-NEXT:    str w4, [sp, #32]
+; CHECK-NEXT:    str x4, [sp, #32]
 ; CHECK-NEXT:    ldr x8, [x8, :lo12:__os_arm64x_dispatch_call_no_redirect]
 ; CHECK-NEXT:    blr x8
 ; CHECK-NEXT:    .seh_startepilogue
@@ -478,7 +478,7 @@
 ; CHECK-NEXT:    fmov d2, x2
 ; CHECK-NEXT:    fmov d3, x3
 ; CHECK-NEXT:    blr x26
-; CHECK-NEXT:    mov w0, w8
+; CHECK-NEXT:    mov x0, x8
 ; CHECK-NEXT:    .seh_startepilogue
 ; CHECK-NEXT:    sub sp, x29, #48
 ; CHECK-NEXT:    .seh_add_fp 48
@@ -495,65 +495,6 @@
 ; CHECK-NEXT:    .seh_endfunclet
 ; CHECK-NEXT:    .seh_endproc
 ;
-; CHECK-LABEL: $iexit_thunk$cdecl$i8$varargs.1:
-; CHECK:       .seh_proc $iexit_thunk$cdecl$i8$varargs.1
-; CHECK-NEXT:  // %bb.0:
-; CHECK-NEXT:    stp x19, x20, [sp, #-64]! // 16-byte Folded Spill
-; CHECK-NEXT:    .seh_save_regp_x x19, 64
-; CHECK-NEXT:    stp x21, x22, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    .seh_save_regp x21, 16
-; CHECK-NEXT:    str x25, [sp, #32] // 8-byte Folded Spill
-; CHECK-NEXT:    .seh_save_reg x25, 32
-; CHECK-NEXT:    stp x29, x30, [sp, #40] // 16-byte Folded Spill
-; CHECK-NEXT:    .seh_save_fplr 40
-; CHECK-NEXT:    add x29, sp, #40
-; CHECK-NEXT:    .seh_add_fp 40
-; CHECK-NEXT:    sub sp, sp, #16
-; CHECK-NEXT:    .seh_stackalloc 16
-; CHECK-NEXT:    .seh_endprologue
-; CHECK-NEXT:    adrp x8, __os_arm64x_dispatch_call_no_redirect
-; CHECK-NEXT:    mov x19, x2
-; CHECK-NEXT:    mov x20, x1
-; CHECK-NEXT:    mov x21, x0
-; CHECK-NEXT:    mov x22, x9
-; CHECK-NEXT:    ldr x25, [x8, :lo12:__os_arm64x_dispatch_call_no_redirect]
-; CHECK-NEXT:    add x8, x5, #55
-; CHECK-NEXT:    lsr x15, x8, #4
-; CHECK-NEXT:    bl __chkstk_arm64ec
-; CHECK-NEXT:    sub x8, sp, x15, lsl #4
-; CHECK-NEXT:    mov sp, x8
-; CHECK-NEXT:    add x0, x8, #40
-; CHECK-NEXT:    mov x1, x4
-; CHECK-NEXT:    mov x2, x5
-; CHECK-NEXT:    str x3, [x8, #32]
-; CHECK-NEXT:    bl "#memcpy"
-; CHECK-NEXT:    sub x0, x29, #56
-; CHECK-NEXT:    mov x1, x21
-; CHECK-NEXT:    mov x2, x20
-; CHECK-NEXT:    mov x3, x19
-; CHECK-NEXT:    mov x9, x22
-; CHECK-NEXT:    fmov d0, x0
-; CHECK-NEXT:    fmov d1, x1
-; CHECK-NEXT:    fmov d2, x2
-; CHECK-NEXT:    fmov d3, x3
-; CHECK-NEXT:    blr x25
-; CHECK-NEXT:    ldp x0, x1, [x29, #-56]
-; CHECK-NEXT:    .seh_startepilogue
-; CHECK-NEXT:    sub sp, x29, #40
-; CHECK-NEXT:    .seh_add_fp 40
-; CHECK-NEXT:    ldp x29, x30, [sp, #40] // 16-byte Folded Reload
-; CHECK-NEXT:    .seh_save_fplr 40
-; CHECK-NEXT:    ldr x25, [sp, #32] // 8-byte Folded Reload
-; CHECK-NEXT:    .seh_save_reg x25, 32
-; CHECK-NEXT:    ldp x21, x22, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    .seh_save_regp x21, 16
-; CHECK-NEXT:    ldp x19, x20, [sp], #64 // 16-byte Folded Reload
-; CHECK-NEXT:    .seh_save_regp_x x19, 64
-; CHECK-NEXT:    .seh_endepilogue
-; CHECK-NEXT:    ret
-; CHECK-NEXT:    .seh_endfunclet
-; CHECK-NEXT:    .seh_endproc
-;
 ; CHECK-LABEL: $iexit_thunk$cdecl$m17$varargs:
 ; CHECK:       .seh_proc $iexit_thunk$cdecl$m17$varargs
 ; CHECK-NEXT:  // %bb.0:
Index: llvm/test/CodeGen/AArch64/arm64ec-mangle-align.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-mangle-align.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-mangle-align.ll
@@ -234,8 +234,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct6
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8.1)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8.1)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct6]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -262,8 +262,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct7
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8.2)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8.2)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct7]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -290,8 +290,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct8
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16a16$m16a16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16a16$m16a16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct8]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -440,8 +440,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstruct12]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.3)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.3)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -472,8 +472,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct13
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16.4)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16.4)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct13]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -500,8 +500,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct14
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16.5)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16.5)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct14]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -528,8 +528,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct15
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16.6)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16.6)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16a16$m16a16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16a16$m16a16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct15]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -565,8 +565,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstruct16]
 ; CHECK-NEXT:    stp q0, q1, [sp]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8.7)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8.7)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -608,8 +608,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstruct17]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.8)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.8)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -865,8 +865,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructf3]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.9)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.9)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -905,8 +905,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructf4]
 ; CHECK-NEXT:    stp q0, q1, [sp]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8.10)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8.10)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -945,8 +945,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructf5]
 ; CHECK-NEXT:    stp q0, q1, [sp]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8.11)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8.11)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -987,8 +987,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructd2]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.12)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.12)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -1029,8 +1029,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructd3]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.13)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.13)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
Index: llvm/test/CodeGen/AArch64/arm64ec-mangle-basic.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-mangle-basic.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-mangle-basic.ll
@@ -50,8 +50,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnchar
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.1)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.1)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnchar]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -78,8 +78,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnshort
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.2)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.2)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnshort]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -106,8 +106,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnwchar_t
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.3)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.3)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnwchar_t]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -134,8 +134,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnint
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.4)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.4)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnint]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -162,8 +162,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfni64
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.5)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.5)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfni64]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -246,8 +246,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnlongdouble
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$d$d.6)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$d$d.6)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$d$d)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$d$d)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnlongdouble]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -274,8 +274,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnVOIDP
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.7)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.7)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnVOIDP]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
Index: llvm/test/CodeGen/AArch64/arm64ec-mangle-struct.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-mangle-struct.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-mangle-struct.ll
@@ -1362,4 +1362,4 @@
   call void @llvm.memcpy.p0.p0.i64(ptr align 1 %agg.tmp, ptr align 1 %x, i64 40, i1 false)
   call arm64ec_x86sign(40) void %0(ptr sret(%struct.d5) align 1 %agg.result, ptr arm64ec_x86sign(40) %agg.tmp)
   ret void
-}
\ No newline at end of file
+}