Index: llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
@@ -55,6 +55,7 @@
   Constant *GuardFnGlobal = nullptr;
   Module *M = nullptr;
 
+  Type *CanonicalizeThunkType(Type *T);
   void mangleArm64ECThunk(FunctionType *FT, AttributeList AttrList, bool entry,
                           raw_ostream &Out);
   void mangleArm64ECThunkRetType(FunctionType *FT, AttributeList AttrList,
@@ -110,7 +111,8 @@
   for (unsigned E = FT->getNumParams(); I != E; ++I) {
     Align ParamAlign = AttrList.getParamAlignment(I).valueOrOne();
     uint64_t ArgSizeBytes = AttrList.getParamArm64ECArgSizeBytes(I);
-    mangleArm64ECThunkType(FT->getParamType(I), ParamAlign, EntryThunk,
+    Type *ParamType = CanonicalizeThunkType(FT->getParamType(I));
+    mangleArm64ECThunkType(ParamType, ParamAlign, EntryThunk,
                            /*Ret*/ false, ArgSizeBytes, Out);
   }
 }
@@ -118,7 +120,7 @@
 void AArch64Arm64ECCallLowering::mangleArm64ECThunkRetType(
     FunctionType *FT, AttributeList AttrList, bool EntryThunk,
     raw_ostream &Out) {
-  Type *T = FT->getReturnType();
+  Type *T = CanonicalizeThunkType(FT->getReturnType());
   uint64_t ArgSizeBytes = AttrList.getRetArm64ECArgSizeBytes();
   if (T->isVoidTy()) {
     if (FT->getNumParams()) {
@@ -184,9 +186,32 @@
   }
 }
 
+Type *AArch64Arm64ECCallLowering::CanonicalizeThunkType(Type *T) {
+  if (T->isVoidTy())
+    return T;
+
+  auto &DL = M->getDataLayout();
+  uint64_t Size = DL.getTypeSizeInBits(T);
+  if ((T->isIntegerTy() && Size < 64) || T->isPointerTy())
+    return Type::getInt64Ty(M->getContext());
+
+  if (auto *StructTy = dyn_cast<StructType>(T)) {
+    if (StructTy->getNumElements() == 1)
+      return StructTy->getElementType(0);
+  }
+
+  return T;
+}
+
 Function *AArch64Arm64ECCallLowering::buildExitThunk(CallBase *CB) {
   FunctionType *FT = CB->getFunctionType();
-  Type *RetTy = FT->getReturnType();
+  SmallString<256> ExitThunkName;
+  llvm::raw_svector_ostream Out(ExitThunkName);
+  mangleArm64ECThunk(FT, CB->getAttributes(), /*EntryThunk*/ false, Out);
+  Function *F = M->getFunction(ExitThunkName);
+  if (F)
+    return F;
+
   bool IsVarArg = FT->isVarArg();
   Type *PtrTy = Type::getInt8PtrTy(M->getContext());
   Type *I64Ty = Type::getInt64Ty(M->getContext());
@@ -215,20 +240,23 @@
     DefArgTypes.push_back(I64Ty);
   } else {
     for (unsigned i = 0; i < CB->arg_size(); ++i) {
-      DefArgTypes.push_back(CB->getArgOperand(i)->getType());
+      Type *ArgType = CB->getArgOperand(i)->getType();
+      if (!CB->getParamAttr(i, Attribute::StructRet).isValid())
+        ArgType = CanonicalizeThunkType(ArgType);
+      DefArgTypes.push_back(ArgType);
     }
   }
 
-  SmallString<256> ExitThunkName;
-  llvm::raw_svector_ostream Out(ExitThunkName);
-  mangleArm64ECThunk(FT, CB->getAttributes(), /*EntryThunk*/ false, Out);
-
+  Type *RetTy = CanonicalizeThunkType(FT->getReturnType());
   FunctionType *Ty = FunctionType::get(RetTy, DefArgTypes, false);
-  Function *F =
-      Function::Create(Ty, GlobalValue::InternalLinkage, 0, ExitThunkName, M);
+
+  F = Function::Create(Ty, GlobalValue::ExternalLinkage, 0, ExitThunkName, M);
   F->setCallingConv(CallingConv::ARM64EC_Thunk_Native);
   // Copy MSVC, and always set up a frame pointer. (Maybe this isn't necessary.)
   F->addFnAttr("frame-pointer", "all");
+  F->setSection(".wowthk$aa");
+  F->setLinkage(GlobalValue::LinkOnceODRLinkage);
+  F->setComdat(M->getOrInsertComdat(ExitThunkName));
   // Only copy sret from the first argument. For C++ instance methods, clang can
   // stick an sret marking on a later argument, but it doesn't actually affect
   // the ABI, so we can omit it. This avoids triggering a verifier assertion.
Index: llvm/test/CodeGen/AArch64/arm64ec-cfg.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-cfg.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-cfg.ll
@@ -218,8 +218,8 @@
 ; CHECK-NEXT:    .seh_save_reg x30, 16
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$varargs.1)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$varargs.1)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$varargs)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$varargs)
 ; CHECK-NEXT:    mov x11, x0
 ; CHECK-NEXT:    ldr x8, [x8, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -313,7 +313,7 @@
 ; CHECK-NEXT:    .seh_add_fp 48
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, __os_arm64x_dispatch_call_no_redirect
-; CHECK-NEXT:    str w4, [sp, #32]
+; CHECK-NEXT:    str x4, [sp, #32]
 ; CHECK-NEXT:    ldr x8, [x8, :lo12:__os_arm64x_dispatch_call_no_redirect]
 ; CHECK-NEXT:    blr x8
 ; CHECK-NEXT:    .seh_startepilogue
@@ -478,7 +478,7 @@
 ; CHECK-NEXT:    fmov d2, x2
 ; CHECK-NEXT:    fmov d3, x3
 ; CHECK-NEXT:    blr x26
-; CHECK-NEXT:    mov w0, w8
+; CHECK-NEXT:    mov x0, x8
 ; CHECK-NEXT:    .seh_startepilogue
 ; CHECK-NEXT:    sub sp, x29, #48
 ; CHECK-NEXT:    .seh_add_fp 48
@@ -495,65 +495,6 @@
 ; CHECK-NEXT:    .seh_endfunclet
 ; CHECK-NEXT:    .seh_endproc
 ;
-; CHECK-LABEL: $iexit_thunk$cdecl$i8$varargs.1:
-; CHECK:       .seh_proc $iexit_thunk$cdecl$i8$varargs.1
-; CHECK-NEXT:  // %bb.0:
-; CHECK-NEXT:    stp x19, x20, [sp, #-64]! // 16-byte Folded Spill
-; CHECK-NEXT:    .seh_save_regp_x x19, 64
-; CHECK-NEXT:    stp x21, x22, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    .seh_save_regp x21, 16
-; CHECK-NEXT:    str x25, [sp, #32] // 8-byte Folded Spill
-; CHECK-NEXT:    .seh_save_reg x25, 32
-; CHECK-NEXT:    stp x29, x30, [sp, #40] // 16-byte Folded Spill
-; CHECK-NEXT:    .seh_save_fplr 40
-; CHECK-NEXT:    add x29, sp, #40
-; CHECK-NEXT:    .seh_add_fp 40
-; CHECK-NEXT:    sub sp, sp, #16
-; CHECK-NEXT:    .seh_stackalloc 16
-; CHECK-NEXT:    .seh_endprologue
-; CHECK-NEXT:    adrp x8, __os_arm64x_dispatch_call_no_redirect
-; CHECK-NEXT:    mov x19, x2
-; CHECK-NEXT:    mov x20, x1
-; CHECK-NEXT:    mov x21, x0
-; CHECK-NEXT:    mov x22, x9
-; CHECK-NEXT:    ldr x25, [x8, :lo12:__os_arm64x_dispatch_call_no_redirect]
-; CHECK-NEXT:    add x8, x5, #55
-; CHECK-NEXT:    lsr x15, x8, #4
-; CHECK-NEXT:    bl __chkstk_arm64ec
-; CHECK-NEXT:    sub x8, sp, x15, lsl #4
-; CHECK-NEXT:    mov sp, x8
-; CHECK-NEXT:    add x0, x8, #40
-; CHECK-NEXT:    mov x1, x4
-; CHECK-NEXT:    mov x2, x5
-; CHECK-NEXT:    str x3, [x8, #32]
-; CHECK-NEXT:    bl "#memcpy"
-; CHECK-NEXT:    sub x0, x29, #56
-; CHECK-NEXT:    mov x1, x21
-; CHECK-NEXT:    mov x2, x20
-; CHECK-NEXT:    mov x3, x19
-; CHECK-NEXT:    mov x9, x22
-; CHECK-NEXT:    fmov d0, x0
-; CHECK-NEXT:    fmov d1, x1
-; CHECK-NEXT:    fmov d2, x2
-; CHECK-NEXT:    fmov d3, x3
-; CHECK-NEXT:    blr x25
-; CHECK-NEXT:    ldp x0, x1, [x29, #-56]
-; CHECK-NEXT:    .seh_startepilogue
-; CHECK-NEXT:    sub sp, x29, #40
-; CHECK-NEXT:    .seh_add_fp 40
-; CHECK-NEXT:    ldp x29, x30, [sp, #40] // 16-byte Folded Reload
-; CHECK-NEXT:    .seh_save_fplr 40
-; CHECK-NEXT:    ldr x25, [sp, #32] // 8-byte Folded Reload
-; CHECK-NEXT:    .seh_save_reg x25, 32
-; CHECK-NEXT:    ldp x21, x22, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    .seh_save_regp x21, 16
-; CHECK-NEXT:    ldp x19, x20, [sp], #64 // 16-byte Folded Reload
-; CHECK-NEXT:    .seh_save_regp_x x19, 64
-; CHECK-NEXT:    .seh_endepilogue
-; CHECK-NEXT:    ret
-; CHECK-NEXT:    .seh_endfunclet
-; CHECK-NEXT:    .seh_endproc
-;
 ; CHECK-LABEL: $iexit_thunk$cdecl$m17$varargs:
 ; CHECK:       .seh_proc $iexit_thunk$cdecl$m17$varargs
 ; CHECK-NEXT:  // %bb.0:
Index: llvm/test/CodeGen/AArch64/arm64ec-mangle-align.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-mangle-align.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-mangle-align.ll
@@ -234,8 +234,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct6
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8.1)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8.1)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct6]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -262,8 +262,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct7
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8.2)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8.2)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$m8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$m8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct7]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -440,8 +440,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstruct12]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.3)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.3)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -500,8 +500,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct14
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16.4)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16.4)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$m16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$m16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct14]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -528,8 +528,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstruct15
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16a16$m16a16.5)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16a16$m16a16.5)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16a16$m16a16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16a16$m16a16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstruct15]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -565,8 +565,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstruct16]
 ; CHECK-NEXT:    stp q0, q1, [sp]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8.6)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8.6)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -608,8 +608,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstruct17]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.7)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.7)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -822,8 +822,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructf2
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$F8)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$F8)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$F8$F8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$F8$F8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructf2]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -865,8 +865,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructf3]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.8)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.8)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -905,8 +905,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructf4]
 ; CHECK-NEXT:    stp q0, q1, [sp]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8.9)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8.9)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -945,8 +945,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructf5]
 ; CHECK-NEXT:    stp q0, q1, [sp]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8.10)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8.10)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32a32$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32a32$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -987,8 +987,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructd2]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.11)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.11)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
@@ -1029,8 +1029,8 @@
 ; CHECK-NEXT:    ldr x11, [x9, :lo12:pfnstructd3]
 ; CHECK-NEXT:    stp q2, q3, [sp, #32]
 ; CHECK-NEXT:    ldr x9, [x10, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8.12)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8.12)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m64a64$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m64a64$i8)
 ; CHECK-NEXT:    blr x9
 ; CHECK-NEXT:    mov x0, sp
 ; CHECK-NEXT:    blr x11
Index: llvm/test/CodeGen/AArch64/arm64ec-mangle-basic.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-mangle-basic.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-mangle-basic.ll
@@ -50,8 +50,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnchar
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.1)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.1)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnchar]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -78,8 +78,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnshort
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.2)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.2)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnshort]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -106,8 +106,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnwchar_t
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.3)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.3)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnwchar_t]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -134,8 +134,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnint
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.4)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.4)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnint]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -162,8 +162,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfni64
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.5)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.5)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfni64]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -246,8 +246,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnlongdouble
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$d$d.6)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$d$d.6)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$d$d)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$d$d)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnlongdouble]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -274,8 +274,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnVOIDP
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8.7)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8.7)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$i8$i8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$i8$i8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnVOIDP]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
Index: llvm/test/CodeGen/AArch64/arm64ec-mangle-struct.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64ec-mangle-struct.ll
+++ llvm/test/CodeGen/AArch64/arm64ec-mangle-struct.ll
@@ -1084,8 +1084,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructf2
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m8$F8)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m8$F8)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$F8$F8)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$F8$F8)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructf2]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -1117,8 +1117,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructf3
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m12$F12)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m12$F12)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$F12$F12)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$F12$F12)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructf3]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -1152,8 +1152,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructf4
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$F16)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$F16)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$F16$F16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$F16$F16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructf4]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -1229,8 +1229,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructd2
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m16$D16)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m16$D16)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$D16$D16)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$D16$D16)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructd2]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -1262,8 +1262,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructd3
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m24$D24)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m24$D24)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$D24$D24)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$D24$D24)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructd3]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8
@@ -1297,8 +1297,8 @@
 ; CHECK-NEXT:    .seh_endprologue
 ; CHECK-NEXT:    adrp x8, pfnstructd4
 ; CHECK-NEXT:    adrp x9, __os_arm64x_check_icall
-; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$m32$D32)
-; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$m32$D32)
+; CHECK-NEXT:    adrp x10, ($iexit_thunk$cdecl$D32$D32)
+; CHECK-NEXT:    add x10, x10, :lo12:($iexit_thunk$cdecl$D32$D32)
 ; CHECK-NEXT:    ldr x11, [x8, :lo12:pfnstructd4]
 ; CHECK-NEXT:    ldr x8, [x9, :lo12:__os_arm64x_check_icall]
 ; CHECK-NEXT:    blr x8