diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp --- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -1046,6 +1046,15 @@ namespace { +/// Helper class to attach debug information of the given instruction onto new +/// instructions inserted after. +class NextNodeIRBuilder : public IRBuilder<> { +public: + explicit NextNodeIRBuilder(Instruction *IP) : IRBuilder<>(IP->getNextNode()) { + SetCurrentDebugLocation(IP->getDebugLoc()); + } +}; + /// This class does all the work for a given function. Store and Load /// instructions store and load corresponding shadow and origin /// values. Most instructions propagate shadow from arguments to their @@ -1928,7 +1937,7 @@ void visitLoadInst(LoadInst &I) { assert(I.getType()->isSized() && "Load type must have size"); assert(!I.getMetadata(LLVMContext::MD_nosanitize)); - IRBuilder<> IRB(I.getNextNode()); + NextNodeIRBuilder IRB(&I); Type *ShadowTy = getShadowTy(&I); Value *Addr = I.getPointerOperand(); Value *ShadowPtr = nullptr, *OriginPtr = nullptr; @@ -3600,9 +3609,7 @@ IRB.CreateExtractElement(makeAddAcquireOrderingTable(IRB), Ordering); CB.setArgOperand(3, NewOrdering); - IRBuilder<> NextIRB(CB.getNextNode()); - NextIRB.SetCurrentDebugLocation(CB.getDebugLoc()); - + NextNodeIRBuilder NextIRB(&CB); Value *SrcShadowPtr, *SrcOriginPtr; std::tie(SrcShadowPtr, SrcOriginPtr) = getShadowOriginPtr(SrcPtr, NextIRB, NextIRB.getInt8Ty(), Align(1), @@ -3957,8 +3964,7 @@ void instrumentAlloca(AllocaInst &I, Instruction *InsPoint = nullptr) { if (!InsPoint) InsPoint = &I; - IRBuilder<> IRB(InsPoint->getNextNode()); - IRB.SetCurrentDebugLocation(InsPoint->getDebugLoc()); + NextNodeIRBuilder IRB(InsPoint); const DataLayout &DL = F.getParent()->getDataLayout(); uint64_t TypeSize = DL.getTypeAllocSize(I.getAllocatedType()); Value *Len = ConstantInt::get(MS.IntptrTy, TypeSize); @@ -4435,7 +4441,7 @@ // Copy va_list shadow from the backup copy of the TLS contents. for (size_t i = 0, n = VAStartInstrumentationList.size(); i < n; i++) { CallInst *OrigInst = VAStartInstrumentationList[i]; - IRBuilder<> IRB(OrigInst->getNextNode()); + NextNodeIRBuilder IRB(OrigInst); Value *VAListTag = OrigInst->getArgOperand(0); Type *RegSaveAreaPtrTy = Type::getInt64PtrTy(*MS.C); @@ -4577,7 +4583,7 @@ // Copy va_list shadow from the backup copy of the TLS contents. for (size_t i = 0, n = VAStartInstrumentationList.size(); i < n; i++) { CallInst *OrigInst = VAStartInstrumentationList[i]; - IRBuilder<> IRB(OrigInst->getNextNode()); + NextNodeIRBuilder IRB(OrigInst); Value *VAListTag = OrigInst->getArgOperand(0); Type *RegSaveAreaPtrTy = Type::getInt64PtrTy(*MS.C); Value *RegSaveAreaPtrPtr = @@ -4766,7 +4772,7 @@ // the TLS contents. for (size_t i = 0, n = VAStartInstrumentationList.size(); i < n; i++) { CallInst *OrigInst = VAStartInstrumentationList[i]; - IRBuilder<> IRB(OrigInst->getNextNode()); + NextNodeIRBuilder IRB(OrigInst); Value *VAListTag = OrigInst->getArgOperand(0); @@ -5007,7 +5013,8 @@ // Copy va_list shadow from the backup copy of the TLS contents. for (size_t i = 0, n = VAStartInstrumentationList.size(); i < n; i++) { CallInst *OrigInst = VAStartInstrumentationList[i]; - IRBuilder<> IRB(OrigInst->getNextNode()); + NextNodeIRBuilder IRB(OrigInst); + IRB.SetCurrentDebugLocation(OrigInst->getDebugLoc()); Value *VAListTag = OrigInst->getArgOperand(0); Type *RegSaveAreaPtrTy = Type::getInt64PtrTy(*MS.C); Value *RegSaveAreaPtrPtr = @@ -5327,7 +5334,8 @@ for (size_t VaStartNo = 0, VaStartNum = VAStartInstrumentationList.size(); VaStartNo < VaStartNum; VaStartNo++) { CallInst *OrigInst = VAStartInstrumentationList[VaStartNo]; - IRBuilder<> IRB(OrigInst->getNextNode()); + NextNodeIRBuilder IRB(OrigInst); + IRB.SetCurrentDebugLocation(OrigInst->getDebugLoc()); Value *VAListTag = OrigInst->getArgOperand(0); copyRegSaveArea(IRB, VAListTag); copyOverflowArea(IRB, VAListTag); diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll --- a/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll @@ -52,14 +52,14 @@ ; CHECK-NEXT: call void @llvm.donothing(), !dbg [[DBG1]] ; CHECK-NEXT: call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]]), !dbg [[DBG1]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[A:%.*]], align 4, !dbg [[DBG1]] -; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint i32* [[A]] to i64, !dbg [[DBG7:![0-9]+]] -; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to i32*, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to i32*, !dbg [[DBG7]] -; CHECK-NEXT: [[_MSLD:%.*]] = load i32, i32* [[TMP5]], align 4, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP9:%.*]] = xor i32 [[TMP2]], 0, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP3:%.*]] = ptrtoint i32* [[A]] to i64, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to i32*, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to i32*, !dbg [[DBG1]] +; CHECK-NEXT: [[_MSLD:%.*]] = load i32, i32* [[TMP5]], align 4, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP9:%.*]] = xor i32 [[TMP2]], 0, !dbg [[DBG7:![0-9]+]] ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[_MSLD]], 0, !dbg [[DBG7]] ; CHECK-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0, !dbg [[DBG7]] ; CHECK-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], -1, !dbg [[DBG7]] @@ -142,14 +142,14 @@ ; CHECK-NEXT: call void @llvm.donothing(), !dbg [[DBG1]] ; CHECK-NEXT: call void @__msan_maybe_warning_8(i64 zeroext [[TMP0]], i32 zeroext [[TMP1]]), !dbg [[DBG1]] ; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[B:%.*]], align 2, !dbg [[DBG1]] -; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint i16* [[B]] to i64, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to i16*, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP6]], 17592186044416, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -4, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to i32*, !dbg [[DBG7]] -; CHECK-NEXT: [[_MSLD:%.*]] = load i16, i16* [[TMP7]], align 2, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint i16* [[B]] to i64, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to i16*, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP6]], 17592186044416, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -4, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to i32*, !dbg [[DBG1]] +; CHECK-NEXT: [[_MSLD:%.*]] = load i16, i16* [[TMP7]], align 2, !dbg [[DBG1]] +; CHECK-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4, !dbg [[DBG1]] ; CHECK-NEXT: [[_MSPROP:%.*]] = sext i16 [[_MSLD]] to i32, !dbg [[DBG7]] ; CHECK-NEXT: [[TMP12:%.*]] = sext i16 [[TMP4]] to i32, !dbg [[DBG7]] ; CHECK-NEXT: call void @__msan_maybe_warning_8(i64 zeroext [[TMP2]], i32 zeroext [[TMP3]]), !dbg [[DBG8]] @@ -413,13 +413,13 @@ ; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[Y]] to i8*, !dbg [[DBG1]] ; CHECK-NEXT: call void @__msan_set_alloca_origin_with_descr(i8* [[TMP7]], i64 4, i8* bitcast (i32* @[[GLOB0:[0-9]+]] to i8*), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @[[GLOB1:[0-9]+]], i32 0, i32 0)), !dbg [[DBG1]] ; CHECK-NEXT: [[TMP8:%.*]] = load volatile i32, i32* [[Y]], align 64, !dbg [[DBG7]] -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint i32* [[Y]] to i64 -; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080 -; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to i32* -; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP10]], 17592186044416 -; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to i32* -; CHECK-NEXT: [[_MSLD:%.*]] = load i32, i32* [[TMP11]], align 64 -; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 64 +; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint i32* [[Y]] to i64, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 87960930222080, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to i32*, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP10]], 17592186044416, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to i32*, !dbg [[DBG7]] +; CHECK-NEXT: [[_MSLD:%.*]] = load i32, i32* [[TMP11]], align 64, !dbg [[DBG7]] +; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 64, !dbg [[DBG7]] ; CHECK-NEXT: store i32 [[_MSLD]], i32* bitcast ([100 x i64]* @__msan_retval_tls to i32*), align 8 ; CHECK-NEXT: store i32 [[TMP14]], i32* @__msan_retval_origin_tls, align 4 ; CHECK-NEXT: ret i32 [[TMP8]] @@ -550,32 +550,32 @@ ; CHECK-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to i32*, !dbg [[DBG11]] ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP28]], i8 0, i64 24, i1 false), !dbg [[DBG11]] ; CHECK-NEXT: call void @llvm.va_start(i8* [[ARRAYDECAY1]]), !dbg [[DBG11]] -; CHECK-NEXT: [[TMP31:%.*]] = ptrtoint i8* [[ARRAYDECAY1]] to i64 -; CHECK-NEXT: [[TMP32:%.*]] = add i64 [[TMP31]], 16 -; CHECK-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP32]] to i64** -; CHECK-NEXT: [[TMP34:%.*]] = load i64*, i64** [[TMP33]], align 8 -; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint i64* [[TMP34]] to i64 -; CHECK-NEXT: [[TMP36:%.*]] = xor i64 [[TMP35]], 87960930222080 -; CHECK-NEXT: [[TMP37:%.*]] = inttoptr i64 [[TMP36]] to i8* -; CHECK-NEXT: [[TMP38:%.*]] = add i64 [[TMP36]], 17592186044416 -; CHECK-NEXT: [[TMP39:%.*]] = inttoptr i64 [[TMP38]] to i32* -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP37]], i8* align 16 [[TMP2]], i64 176, i1 false) -; CHECK-NEXT: [[TMP40:%.*]] = bitcast i32* [[TMP39]] to i8* -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP40]], i8* align 16 [[TMP3]], i64 176, i1 false) -; CHECK-NEXT: [[TMP41:%.*]] = ptrtoint i8* [[ARRAYDECAY1]] to i64 -; CHECK-NEXT: [[TMP42:%.*]] = add i64 [[TMP41]], 8 -; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP42]] to i64** -; CHECK-NEXT: [[TMP44:%.*]] = load i64*, i64** [[TMP43]], align 8 -; CHECK-NEXT: [[TMP45:%.*]] = ptrtoint i64* [[TMP44]] to i64 -; CHECK-NEXT: [[TMP46:%.*]] = xor i64 [[TMP45]], 87960930222080 -; CHECK-NEXT: [[TMP47:%.*]] = inttoptr i64 [[TMP46]] to i8* -; CHECK-NEXT: [[TMP48:%.*]] = add i64 [[TMP46]], 17592186044416 -; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i64 [[TMP48]] to i32* -; CHECK-NEXT: [[TMP50:%.*]] = getelementptr i8, i8* [[TMP2]], i32 176 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP47]], i8* align 16 [[TMP50]], i64 [[TMP0]], i1 false) -; CHECK-NEXT: [[TMP51:%.*]] = getelementptr i8, i8* [[TMP3]], i32 176 -; CHECK-NEXT: [[TMP52:%.*]] = bitcast i32* [[TMP49]] to i8* -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP52]], i8* align 16 [[TMP51]], i64 [[TMP0]], i1 false) +; CHECK-NEXT: [[TMP31:%.*]] = ptrtoint i8* [[ARRAYDECAY1]] to i64, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP32:%.*]] = add i64 [[TMP31]], 16, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP32]] to i64**, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP34:%.*]] = load i64*, i64** [[TMP33]], align 8, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint i64* [[TMP34]] to i64, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP36:%.*]] = xor i64 [[TMP35]], 87960930222080, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP37:%.*]] = inttoptr i64 [[TMP36]] to i8*, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP38:%.*]] = add i64 [[TMP36]], 17592186044416, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP39:%.*]] = inttoptr i64 [[TMP38]] to i32*, !dbg [[DBG11]] +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP37]], i8* align 16 [[TMP2]], i64 176, i1 false), !dbg [[DBG11]] +; CHECK-NEXT: [[TMP40:%.*]] = bitcast i32* [[TMP39]] to i8*, !dbg [[DBG11]] +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP40]], i8* align 16 [[TMP3]], i64 176, i1 false), !dbg [[DBG11]] +; CHECK-NEXT: [[TMP41:%.*]] = ptrtoint i8* [[ARRAYDECAY1]] to i64, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP42:%.*]] = add i64 [[TMP41]], 8, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP42]] to i64**, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP44:%.*]] = load i64*, i64** [[TMP43]], align 8, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP45:%.*]] = ptrtoint i64* [[TMP44]] to i64, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP46:%.*]] = xor i64 [[TMP45]], 87960930222080, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP47:%.*]] = inttoptr i64 [[TMP46]] to i8*, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP48:%.*]] = add i64 [[TMP46]], 17592186044416, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i64 [[TMP48]] to i32*, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP50:%.*]] = getelementptr i8, i8* [[TMP2]], i32 176, !dbg [[DBG11]] +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP47]], i8* align 16 [[TMP50]], i64 [[TMP0]], i1 false), !dbg [[DBG11]] +; CHECK-NEXT: [[TMP51:%.*]] = getelementptr i8, i8* [[TMP3]], i32 176, !dbg [[DBG11]] +; CHECK-NEXT: [[TMP52:%.*]] = bitcast i32* [[TMP49]] to i8*, !dbg [[DBG11]] +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP52]], i8* align 16 [[TMP51]], i64 [[TMP0]], i1 false), !dbg [[DBG11]] ; CHECK-NEXT: ret void ; entry: